TW200719141A - Flash memory access method and circuit of an embedded system - Google Patents

Flash memory access method and circuit of an embedded system

Info

Publication number
TW200719141A
TW200719141A TW094138921A TW94138921A TW200719141A TW 200719141 A TW200719141 A TW 200719141A TW 094138921 A TW094138921 A TW 094138921A TW 94138921 A TW94138921 A TW 94138921A TW 200719141 A TW200719141 A TW 200719141A
Authority
TW
Taiwan
Prior art keywords
mcu
access circuit
flash memory
instruction
embedded system
Prior art date
Application number
TW094138921A
Other languages
English (en)
Other versions
TWI304173B (zh
Inventor
jin-fu Xu
Original Assignee
Cheertek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cheertek Inc filed Critical Cheertek Inc
Priority to TW094138921A priority Critical patent/TW200719141A/zh
Priority to US11/344,201 priority patent/US20070011394A1/en
Publication of TW200719141A publication Critical patent/TW200719141A/zh
Application granted granted Critical
Publication of TWI304173B publication Critical patent/TWI304173B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
TW094138921A 2005-07-11 2005-11-07 Flash memory access method and circuit of an embedded system TW200719141A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW094138921A TW200719141A (en) 2005-11-07 2005-11-07 Flash memory access method and circuit of an embedded system
US11/344,201 US20070011394A1 (en) 2005-07-11 2006-02-01 Access method and access circuit for flash memory in embedded system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094138921A TW200719141A (en) 2005-11-07 2005-11-07 Flash memory access method and circuit of an embedded system

Publications (2)

Publication Number Publication Date
TW200719141A true TW200719141A (en) 2007-05-16
TWI304173B TWI304173B (zh) 2008-12-11

Family

ID=37619544

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094138921A TW200719141A (en) 2005-07-11 2005-11-07 Flash memory access method and circuit of an embedded system

Country Status (2)

Country Link
US (1) US20070011394A1 (zh)
TW (1) TW200719141A (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5728292B2 (ja) * 2011-02-04 2015-06-03 株式会社東芝 メモリデバイス及びホストシステム
FR3006094A1 (fr) 2013-05-21 2014-11-28 St Microelectronics Rousset Ecriture d'une memoire eeprom sur bus i2c
FR3006097A1 (fr) * 2013-05-21 2014-11-28 St Microelectronics Rousset Mecanisme d'ecriture d'une memoire eeprom sur bus i2c
CN105531682A (zh) * 2014-08-15 2016-04-27 联发科技股份有限公司 管理多通道存储设备以具有改进的通道切换响应时间的方法及相关的存储控制***

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW368626B (en) * 1998-04-17 1999-09-01 Winbond Electronics Corp Microprocessor with self-programmed embedded flash memory and programming method
GB2369464B (en) * 2000-11-27 2005-01-05 Advanced Risc Mach Ltd A data processing apparatus and method for saving return state
TWI268473B (en) * 2004-11-04 2006-12-11 Realtek Semiconductor Corp Display controlling device and controlling method

Also Published As

Publication number Publication date
TWI304173B (zh) 2008-12-11
US20070011394A1 (en) 2007-01-11

Similar Documents

Publication Publication Date Title
TW200614049A (en) Pipelined data relocation and improved chip architectures
IN2013CN00694A (zh)
US20070198768A1 (en) Apparatus and method for operating flash memory according to priority order
TW200643955A (en) Semiconductor memory device and information processing system
JP2005339561A5 (zh)
TW200943176A (en) System and method of data forwarding within an execution unit
WO2006095184A3 (en) Data processing system
EP2040159A3 (en) Processor and interface
US8996788B2 (en) Configurable flash interface
TW200703105A (en) System and method for handling multi-cycle non-pipelined instruction sequencing
CN105144122A (zh) 外部可编程存储器管理单元
RU2015151131A (ru) Загрузка парциальной ширины, зависящая от режима, в процессорах с регистрами с большим числом разрядов, способы и системы
US20130212334A1 (en) Determining Optimal Preload Distance at Runtime
WO2006082154A3 (en) System and method for a memory with combined line and word access
TW200620152A (en) Hierarchical processor architecture for video processing
TW200719141A (en) Flash memory access method and circuit of an embedded system
TW200703097A (en) Processor and method of indirect register read and write operations
TW200619926A (en) Partition area architecture of an operation system common used disk and the method thereof
WO2004072848A8 (en) Method and apparatus for hazard detection and management in a pipelined digital processor
WO2012037439A3 (en) Single step processing of memory mapped accesses in a hypervisor
WO2006120408A3 (en) Memory caching in data processing
TW200625072A (en) On-chip electronic hardware debug support units having execution halting capabilities
US9395962B2 (en) Apparatus and method for executing external operations in prologue or epilogue of a software-pipelined loop
WO2008120537A1 (ja) 情報処理装置
JP6474196B2 (ja) 静的スケジュールプロセッサのノンブロッキング実行装置及び方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees