TW200713266A - Open-loop slew-rate controlled output driver - Google Patents

Open-loop slew-rate controlled output driver

Info

Publication number
TW200713266A
TW200713266A TW095123972A TW95123972A TW200713266A TW 200713266 A TW200713266 A TW 200713266A TW 095123972 A TW095123972 A TW 095123972A TW 95123972 A TW95123972 A TW 95123972A TW 200713266 A TW200713266 A TW 200713266A
Authority
TW
Taiwan
Prior art keywords
driving
variation
pvt
rate controlled
selection signal
Prior art date
Application number
TW095123972A
Other languages
Chinese (zh)
Other versions
TWI310186B (en
Inventor
Dong-Suk Shin
In-Hwa Jung
Jin-Han Kim
Chul-Woo Kim
Hyung-Dong Lee
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200713266A publication Critical patent/TW200713266A/en
Application granted granted Critical
Publication of TWI310186B publication Critical patent/TWI310186B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Databases & Information Systems (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Dram (AREA)

Abstract

A slew-rate controlled output driver for use in a semiconductor device includes a PVT variation detection unit having a delay line for receiving a reference clock in order to detect a delay amount variation of the delay line determined according to process, voltage and temperature (PVT) variation; a selection signal generation unit for generating a driving selection signal which corresponds to a detection signal generated by the PVT variation detection unit; and an output driving unit having a plurality of driver units controlled by an output data and the driving selection signal for driving an output terminal with a driving strength which corresponds to the PVT variation.
TW095123972A 2005-09-28 2006-06-30 Open-loop slew-rate controlled output driver TWI310186B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20050090853 2005-09-28
KR1020050133986A KR100668515B1 (en) 2005-09-28 2005-12-29 Open-loop slew-rate controlled output driver

Publications (2)

Publication Number Publication Date
TW200713266A true TW200713266A (en) 2007-04-01
TWI310186B TWI310186B (en) 2009-05-21

Family

ID=37867937

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095123972A TWI310186B (en) 2005-09-28 2006-06-30 Open-loop slew-rate controlled output driver

Country Status (3)

Country Link
KR (1) KR100668515B1 (en)
CN (1) CN1941630B (en)
TW (1) TWI310186B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9564878B2 (en) 2012-03-27 2017-02-07 Micron Technology, Inc. Apparatuses including scalable drivers and methods

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100890384B1 (en) * 2007-12-26 2009-03-25 주식회사 하이닉스반도체 Semiconductor device that controls its own slewrate depending on temperature, and data outputting method of the same
KR101848758B1 (en) * 2011-12-08 2018-04-16 에스케이하이닉스 주식회사 Semiconductor device and method operation of the same
KR102546186B1 (en) * 2016-05-18 2023-06-22 에스케이하이닉스 주식회사 Image sensing device and method of driving the same
CN114155893B (en) * 2020-09-07 2023-07-14 长鑫存储技术有限公司 Driving circuit
US12028073B2 (en) 2022-09-27 2024-07-02 Analog Devices International Unlimited Company Driver controlling slew rate and switching of a switching output stage

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5949259A (en) * 1997-11-19 1999-09-07 Atmel Corporation Zero-delay slew-rate controlled output buffer
KR100532414B1 (en) * 2003-01-10 2005-12-02 삼성전자주식회사 Output driver having automatic slew rate control scheme and slew rate control method thereof
US6906567B2 (en) * 2003-05-30 2005-06-14 Hewlett-Packard Development Company, L.P. Method and structure for dynamic slew-rate control using capacitive elements

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9564878B2 (en) 2012-03-27 2017-02-07 Micron Technology, Inc. Apparatuses including scalable drivers and methods

Also Published As

Publication number Publication date
CN1941630B (en) 2010-07-28
CN1941630A (en) 2007-04-04
TWI310186B (en) 2009-05-21
KR100668515B1 (en) 2007-01-12

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees