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Application filed by Via Tech IncfiledCriticalVia Tech Inc
Publication of TW200636570ApublicationCriticalpatent/TW200636570A/en
Application grantedgrantedCritical
Publication of TWI315489BpublicationCriticalpatent/TWI315489B/en
The present invention is generally directed to method and apparatus for reducing power consumption in a processor through disabling unused arithmetic logic units. A typical processor has several arithmetic logic units (ALU) in the execute unit for executing arithmetic or logic operations. Logic units are implemented in each arithmetic logic unit to control which arithmetic logic unit needs to be activated for performing the arithmetic or logic operation. As a result, only the requisite arithmetic logic unit is activated to execute the instructed arithmetic or logic operation, while the other arithmetic logic units are prevented from receiving input data. Therefore, all unused arithmetic logic units are disabled to reduce power consumption in a processor.
TW95112950A2005-04-132006-04-12A processor and a system for reducing power through disabling unused arithmetic logic units
TWI315489B
(en)