200540787 九、發明說明： 【發明所屬之技術領域】 本發明涉及液晶顯示裝置或電漿（plasma)顯示裝置等 的顯示裝置，尤其涉及將由閘極驅動用1C以至源極驅動用 IC構成的分別承載有多個驅動用IC的驅動電路串聯連接 而安裝在顯示面板的周圍邊緣上的顯示裝置。 【先前技術】 液晶顯示裝置和電漿顯示裝置等的顯示裝置，一般地， 將顯示面板和驅動這個顯示面板的控制電路，通過將驅動 用1C安裝在帶狀基板上的多個TCP(Tape Carrier Package) 進行連接。這些TCP，分別由多個源極驅動用TCP和閘極 驅動用TCP構成，這些TCP與外部電路基板連接，從該外 部電路基板向各個TCP供給圖像資料信號、電源電壓等， 通過在各個TCP上承載的由閘極驅動用1C以至源極驅動用 1C構成的液晶驅動用1C來驅動液晶顯示面板（參見下面的 專利文獻1和2 )。 這樣的T C P方式的液晶顯示裝置的工作原理在第7圖（包 括第7A圖和第7B圖）和第8圖中表示。第7A圖是TCP 方式的液晶顯示裝置的槪略圖，第7 B圖是在第7 A圖中承 載的源極驅動用TCP (或者閘極驅動用TCP)的槪略圖， 第8圖是說明各個源極驅動用TCP中的各個資料的流動的 時間圖。 在第7圖中，TCP方式的液晶顯示裝置5〇具備：安裝有 TFT ( Thm Film Transistor)的主動矩陣型的液晶顯示面板 51的周圍邊緣上的用於向液晶顯示面板51的閘極信號線 200540787 以及源極信號線供給信號的多個閘極驅動用TCP52以及源 極驅動用TCP53 ;用於向各個TCP52、53供給圖像資料信 號、時鐘信號、1C驅動用電源電壓、對置電極驅動用電源 電壓等的液晶顯示面板驅動信號的外部電路基板5 4。 閘極驅動用TCP52和源極驅動用TCP53，如第7B圖所示 具備：在撓性基板56上的比如源極驅動用1C55 ;用於向該 源極驅動用IC55供給液晶顯示面板的各種驅動信號的信號 供給佈線57;用於將從源極驅動用1C55輸出的信號向液晶 φ 顯示面板5 1供給的信號輸出佈線5 8。 前述各個TCP52、53的信號供給佈線57，如第7A圖所 示，與在液晶顯示面板5 1的附近的外部電路基板54上的 端子電連接，從設置在外部電路基板54上的圖像資料處理 用IC5 9 (參見第8圖）以及圖中未示出的電源電路等，將 液晶顯示面板驅動用信號導入到源極驅動用IC55。而且， 將來自沒有另外在圖中示出的PC等的圖像信號發生裝置 的圖像信號輸入到圖像資料處理用IC59。 φ 以源極驅動用TCP53的場合爲例，對該TCP方式的液晶 顯示裝置5 0的工作原理，用第8圖進行說明。第8圖所示 的液晶顯示裝置50，比如具備4個源極驅動用TCP53 A〜 53D，在這些源極驅動用TCP53A〜53D上分別承載有源極 驅動用IC55A〜55D。而且，液晶顯示裝置50中，還連接 有多個閘極驅動用TCP52，但在第8圖中僅僅記載了 1個。 來自PC等的圖像信號發生裝置的圖像信號，通過圖像資 料處理用IC 5 9進行處理，在與時鐘信號同步的一個掃描期 200540787 供給佈線57A〜57D同時供給到在各個源極驅動用TCP53A 〜5 3 D上承載的源極驅動用I c 5 5 A〜5 5 D。而且，該圖像資 料信號a〜d，是對應于原來與各個源極驅動用IC55A〜55D 連接的液晶顯示面板5 1的源極信號線的條數的數目的脈 衝序列而形成的信號，但是在第8圖中爲了容易進行說 明，表示爲包含圖像資料信號a〜d的單一的脈衝。 另一方面，向各個源極驅動用IC55A〜55D分別供給與個 別的預定的時間匹配的起始脈衝，比如，在向源極驅動用 φ IC55A輸入圖像資料信號時，與圖像資料信號a匹配地將 起始脈衝供給到源極驅動用IC55A，使得源極驅動用IC55A 對處理圖像資料信號進行處理，並向液晶顯示面板5 1的與 各個圖元連接的預定的源極信號線進行個別的輸出。綜上 所述，雖然僅對源極驅動用TCP53A〜53D進行說明，但是 對閘極驅動用T C P 5 2也進行同樣的處理並在液晶顯示面板 5 1上進行預定的圖像顯示。 可是，設置了這樣的TCP52、53A〜53D的液晶顯示裝 φ 置50的圖像資料信號以及電源電壓等，由於從外部電路基 板54向各個TCP個別地供給，所以在外部電路基板54上 需要很多佈線。因此，存在會產生外部電路基板54' TCP52、 5 3 A〜5 3 D以及液晶顯示面板5 1的製造工序複雜化，提高 成本以及降低可靠性等的問題。 因此，近年來，爲了減少相對於這樣的TCP的佈線數量’ 開發了一種將輸入到一個TCP的信號等依次向鄰接的TCP 傳送的、採用所謂信號傳送方式的液晶顯示裝置（參見下 面的專利文獻2 )。 200540787 因此，爲了便於對下面的本發明的理解，用第9圖對下 面的專利文獻2中揭示的採用信號傳送方式的液晶顯示裝 置1進行說明。而且，第9圖是在下面的專利文獻2中揭 示的液晶顯示裝置的槪略的俯視圖。 該液晶顯示裝置1具備：安裝有TFT ( Thin Film T r a n s i s t o r )的主動矩陣型的液晶顯示面板2 ;配置在該液 晶顯示面板2的周圍邊緣部分附近的控制電路基板3 ;與 該控制電路基板3連接的、配置在液晶顯示面板2的一個 g 周圍邊緣部分的多個、比如6個TCP上分別承載的源極驅 動電路ST1〜ST6。 而且，各個TCP上的源極驅動電路ST1〜ST6，由配置在 各個TCP上的源極驅動用IC SD1〜SD6,和配置有用於向源 極驅動用1C輸入信號的信號輸入佈線、用於將來自源極驅 動用1C的輸出信號向液晶面板2輸出的第1信號輸出線、 用於將來自源極驅動用1C的輸出信號向鄰接的TCP傳送的 第2信號輸出線、用於驅動源極驅動用1C的電源佈線等的 物體構成。 ® 而且，這些多個源極驅動電路ST1〜ST6分別通過連接線 L 1〜L6來串聯連接，最初的源極驅動電路ST 1和控制電路 基板3用設置在撓性佈線基板FPC上的信號等的供給線7 來連接。控制電路基板3由圖像資料信號控制用IC5以及 電源電路6等構成，使得從圖中未示出的PC等的圖像信號 生成裝置傳輸過來的圖像信號由IC 5進行處理。 此外，在液晶顯示面板2的其他的周圍邊緣上，同樣地 設置有在多個TCP上個別地承載的閘極驅動電路GT1(第9 200540787 圖中僅示出1個），它們也是串聯連接的，f 動電路GT 1與源極驅動電路的場合同樣地，3 出的信號等的供給線並經過撓性佈線基板與 ICGD1連接。 設置這樣的TCP的液晶顯示裝置1，比如， 基板3將圖像資料信號、電源電壓等經過供艇 線L1而向第1源極驅動用ICSD1輸入，此時， 分的圖像資料信號用源極驅動用ICSD1進行處 φ 的液晶顯示面板2的各個圖元的源電極輸出， 的部分的信號以及電源電壓等經過TCP上的佈 面板基板上的連接佈線L2〜L6依次向源極驅震 SD6輸出，同樣地通過各個源極驅動用ICSD2〜 的圖像資料信號向液晶顯示面板2的各個圖元 出。 該場合，在設置於液晶顯示面板2的其他纪 上的閘極驅動電路 GT1中，也同樣地通過 ICGD1對閘極控制信號進行處理，並向對應白1 板2的各個圖元的柵電極輸出。 因此，根據該液晶顯示裝置1，與使用在失 基板和TCP的裝置相比較，由於能夠大幅度源 制電路基板3向TCP供給信號等而所需的佈竊 能夠謀求製造成本的降低。 然而，使用這樣的TCP的液晶顯不裝置1， 入到特定的TCP的信號等依次向鄰接的TCP fl 所以用於傳輸信號等的佈線變長’存在佈線距 :初的閘極驅 .過圖中未示 閘極驅動用 從控制電路 ?線7、連接 其中的一部 理並向對應 同時，其他 線以及液晶 用 ICSD2 〜 < SD6將對應 的源電極輸 周圍邊緣部 閘極驅動用 液晶顯示面 的控制電路 少爲了從控 數量，所以 由於是將輸 輸的方式， 抗增高的問 -10· 200540787 f 此外，TCP以及液晶顯示面板，由於形成多個 驅動用1C、閘極驅動用1C等的液晶驅動用1C的 用於液晶顯示面板的驅動的佈線，所以用於形成 等的佈線的空間受到限制。由此，不能增加傳輸 佈線的寬度或厚度，其結果，佈線阻抗增高。該 阻抗化，導致傳輸的信號、尤其電源電壓的電壓 成爲液晶驅動用1C的誤動作的原因。換句話說， Φ 壓下降的量，隨著向傳輸方向下流側而依次增大 液晶驅動用IC輸出到液晶顯示面板的電源電壓 的串聯連接組之中的上流側和下流側之間產生 此，比如想要在液晶顯示面板的整個顯示區域上 灰度等級的顯示的場合，在上流側和下流側中產 級的偏差，也成爲顯示品質降低的原因。 而且，在該液晶顯示裝置1中，發現在使用時 常大的電磁干擾（Electro-Magnetic Interference. I [EMI])。該EMI產生的原因是，由於源極驅動用 〜SD6的各個圖像資料信號用輸入端子，電並聯 供給圖像資料信號，所以存在沿著液晶顯示面板 的從一個端部的連接佈線L 1到另一個端部的源 IC S D 6的範圍中延伸的長的圖像資料信號佈線， 長的圖像資料信號佈線中流動著向源極驅動用 SD6同時並列供給的圖像資料信號，其成爲EMI 因。該液晶顯示裝置1中，在液晶顯示面板2的 置有多條佈線，且該邊緣的大小的增大關係到會 用於源極 佈線以及 傳輸信號 信號等的 佈線的高 下降，而 由於該電 ，所以從 ，在 TCP 差異。因 進行同樣 生灰度等 產生在非 以下稱爲 的 ICSD1 連接同時 2的邊緣 極驅動用 由於在該 ICSD1〜 產生的原 邊緣上設 無用地增 -11- 200540787 加液晶顯示面板2的圖像顯示無關的面積所以不能 因此不容易採用另外設置遮罩線（shield line )等那 於改善EMI的公知的手段。 另一方面，作爲解決這樣的問題的液晶顯示裝置 將串聯連接的多個TCP的串聯連接組在中央部被分 分，從各個分開的TCP的串聯連接組的其中一側向 向供給圖像資料信號等的液晶顯示裝置。比如，考 第1 0圖的液晶顯示裝置1’所示，將串聯連接的多 φ 的串聯連接組在中央部分每邊3個地分成2部分， 由形成有源極驅動電路ST1〜ST3的TCP構成的串 組，和由形成有源極驅動電路ST4〜ST6的TCP構 聯連接組，將各個串聯連接組的最初的TCP的源極 路ST1以及ST4通過在FPC2以及FPCi上形成的信 供給線7 ’和7與控制電路基板3連接，而構成爲從 電路基板3向各個源極驅動電路S T 1以及S T4進行 的供給。 $ 根據採用該方法的液晶顯示裝置1 ’，由於將串聯 分成2部分，所以分開的2個串聯連接組的長度也 可以減少直到串聯連接組的端部的電壓下降，同時 給到各個串聯連接組的圖像資料信號減少了 一半， 能實現減少EMI的效果。 但是，在這種結構的液晶顯示裝置Γ中，在分開 串聯連接組之中的端部位於液晶顯示面板的中央; TCP的源極驅動電路ST3的附近，由於與源極驅動電 附近相比佈線阻抗大，所以到該部分的電壓下降也 採用， 樣的用 ，考慮 成2部 同一方 慮到如 個 TCP 即分成 聯連接 成的串 驅動電 號等的 該控制 信號等 連接組 變短， ，將供 所以也 的2個 部分的 路ST1 變大。 -12- 200540787 ? 與此相對，由於在鄰接源極驅動電路s T 3的另一側的源極 驅動電路S Τ 4附近實際上不產生電壓降低，所以導致在最 顯眼的液晶顯示面板的顯示區域的中央部中，電源電壓下 降大的圖元區域和電源電壓下降小的圖元區域成一線連 接，會讓人擔心在這個部分產生顯示不均勻現象。此外， 由於控制電路基板3必須與處於分離的位置上的2個串聯 連接組的最初的TCP的源極驅動電路ST1和ST4連接，所 以控制電路基板3的長度增加，而導致形成大型裝置。 φ 此外，下面的專利文獻2中揭示的液晶顯示裝置，雖然 通過在TCP上形成的信號佈線或電源佈線的配置處或形狀 上面想辦法來謀求實現信號佈線或電源佈線的低阻抗化， 但是不能說做得充分。而且，在上述的在先技術中涉及的 問題，雖然以液晶顯示裝置爲例進行了說明，但在使用電 漿顯示面板的電漿顯示裝置中也會產生同樣的問題。 [專利文獻1 ] 日本專利特開昭62 — 23 8 684號公報（第1頁右下欄1〜 | 1 3行，第2圖） [專利文獻2] 日本專利特開200 1 - 05648 1號公報（申請專利範圍，段 落[0002]〜[0013]，[0043]〜[0047]，第 1 圖） 【發明內容】 本發明是著眼於這些在先技術中的問題而成的，本發明 的第1目的是，對於將向具有驅動用1C的一個驅動電路輸 入的信號等依次向鄰接的驅動電路傳輸的、採用所謂信號 傳輸方式的顯示裝置，提供一種能夠防止依次傳輸的電源 -13- 200540787 電壓的電壓下降，並防止驅動用1C的誤動作，而提高顯示 品質的顯示裝置。 本發明的第2目的是，對於將向具有驅動用1C的一個驅 動電路輸入的信號等依次向鄰接的驅動電路的傳輸的、採 用所謂信號傳輸方式的顯示裝置，提供一種通過將流動在 圖像資料信號佈線中的圖像資料信號自身進行處理，從而 顯著地減少EMI的產生的顯示裝置。 本發明的第3目的是，對於將向具有驅動用1C的一個驅 g 動電路輸入的信號等依次向鄰接的驅動電路的傳輸的、採 用所謂信號傳輸方式的顯示裝置，將前述串聯連接的驅動 電路的串聯連接組分成2部分，從分開的2個驅動電路的 串聯連接組的各自一側供給圖像資料信號等的液晶顯示裝 置，提供一種減少在顯示面板中央部以及周圍邊緣部中的 顯示不均勻的顯示裝置。 本發明的上述第1目的可通過下述結構來實現。即，根 據本發明的第1方式，提供一種下述的顯示裝置，其構成 I 爲：在顯示面板的周圍邊緣部上連接多個具有驅動用1C的 驅動電路，鄰接的驅動電路彼此之間通過在前述顯示面板 上形成的連接用佈線連接，將驅動前述驅動用1C和前述顯 示面板所需要的電源電壓從外部控制電路供給到前述多個 驅動電路的至少一個，從該驅動電路向鄰接的驅動電路依 次供給前述電源電壓，其中：對位於電壓供給方向上流側 的驅動用1C，形成與從該驅動用1C到與電壓供給方向下流 側鄰接的驅動電路的驅動用1C的信號佈線大致等價的佈 線阻抗算出用佈線，前述上流側驅動用I c，通過向前述佈 -14 - 200540787 線阻抗算出用佈線的一端輸出算出用電壓並檢測另一端的 電壓來算出佈線阻抗値，基於算出的佈線阻抗値算出電壓 下降値，向下流側驅動電路輸出只提高算出的電壓下降値 的量的電壓値的電源電壓。 在所述方式中，較佳爲，前述驅動電路由將前述驅動用 1C安裝在帶狀基板上的電路構成，前述佈線阻抗算出用佈 線以從構成驅動電路的帶狀基板經由前述顯示面板再返回 到前述帶狀基板上的方式形成。此外，所述方式中，還可 g 以由將前述驅動用1C安裝在前述顯示面板的周圍邊緣部 上的電路構成。 此外，所述方式中，較佳爲，前述驅動用1C具備：電源 電壓輸入的電源電壓輸入端子；生成算出佈線阻抗値用的 算出用電壓的算出用電壓生成部；將來自該算出用電壓生 成部的算出用電壓輸出到前述佈線阻抗算出用佈線的一端 的算出用電壓輸出端子；來自前述佈線阻抗算出用佈線的 另一端的輸出電壓輸入的檢出端子；基於前述算出用電壓 和來自前述檢出端子的檢出電壓而算出佈線阻抗値的佈線 ® 阻抗算出部；在供給從前述電源電壓輸入端子輸入的電源 電壓的同時，基於算出的佈線阻抗値算出電壓下降値，並 將前述電源電壓的電壓値只增加算出的電壓下降値的電源 電壓加算部；輸出來自該電源電壓加算部的電源電壓的電 源電壓輸出端子，進而較佳爲，前述電源電壓是驅動用1C 的工作用電源電壓以.及向顯示面板供給的顯示用電源電 壓。 這些第1方式的顯示裝置，可以適用於液晶顯示裝置或 -15- 200540787 電漿顯示裝置。 此外’本發明的上述第2目的能夠通過下:麵的結構來實 現。即’根據本發明的第2形式，提供一種下述的顯示裝 置’其構成爲··在顯示面板的周圍邊緣部上連接多個具有 驅動用1C的驅動電路，鄰接的驅動電路彼此之間通過在前 述顯示面板上形成的連接用佈線連接，將驅動前述驅動用 1C和前述顯示面板所需要的電源電壓從外部控制電路供給 到前述多個驅動電路的至少一個，從該驅動電路向鄰接的 φ 驅動電路依次供給前述電源電壓，其中：前述驅動用1C， 在輸入的圖像資料信號之中，將除了處理的圖像資料信號 之外的其他圖像資料信號輸出到鄰接的下一個驅動用1C。 在所述方式中，較佳爲，前述驅動電路由將前述驅動用 1C安裝在帶狀基板上的電路構成，前述佈線阻抗算出用佈 線以從構成驅動電路的帶狀基板經由前述顯示面板再返回 到前述帶狀基板上的方式形成。此外，所述方式中，還可 以由將前述驅動用1C安裝在前述顯示面板的周圍邊緣部 0 上的電路構成。 此外，所述方式的液晶顯示裝置中，較佳爲，前述驅動 用1C具備圖像資料輸出控制電路，前述圖像資料輸出控制 電路，將對應輸入到前述驅動用1C的初始脈衝的圖像資料 信號之外的其他圖像資料信號向鄰接的下一個驅動用1C 輸出，此外，較佳爲，前述圖像資料輸出控制電路’由在 向前述源極驅動用1C輸入起始脈衝的期間不通過圖像資 料信號，在沒有向前述源極驅動用1C輸入起始脈衝的期間 通過前述圖像資料信號的電路構成。 -16- 200540787 這些第2方式的顯示裝置，也可以適用於液晶顯示裝置 或電漿顯示裝置。 本發明的上述第3目的能夠通過下琴的結構來實現。 即，根據本發明的第3形式，提供一種下述的液晶顯示裝 置，該顯示裝置構成爲：在顯示面板的周圍邊緣部連接N 個（其中，N〉2 )具有驅動用1C的驅動電路，鄰接的驅動 電路彼此之間通過在前述顯示面板上形成的連接用佈線連 接，將驅動前述驅動用1C和前述顯示面板所需要的電源電 φ 壓從外部控制電路供給到前述多個驅動電路的至少一個， 從該驅動電路向鄰接的驅動電路依次供給前述電源電壓， 其中：將串聯連接前述N個驅動電路的串聯連接組在中央 部分成2部分，將來自前述控制電路的信號以及電壓分別 供給到夾住前述分割處而鄰接的2個驅動電路。 所述方式中，較佳爲，前述驅動電路由將前述驅動用1C 安裝在帶狀基板上的電路構成，較佳爲，前述佈線阻抗算 出用佈線以從構成驅動電路的帶狀基板經由前述顯示面板 I 再返回到前述帶狀基板的方式形成。此外，所述方式中， 還可以由將前述驅動用1C安裝在前述顯示面板的周圍邊 緣部上的電路構成。 此外，所述方式中，較佳爲，將連接前述控制電路和前 述液晶顯示面板的1條或2條撓性佈線基板配置在液晶顯 示面板的周圍邊緣的中央。200540787 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a display device such as a liquid crystal display device or a plasma display device, and more particularly to a separate carrier composed of a gate driving IC and a source driving IC. A driving device having a plurality of driving ICs connected in series and mounted on a peripheral edge of a display panel. [Prior Art] In general, display devices such as a liquid crystal display device and a plasma display device generally include a display panel and a control circuit for driving the display panel. A plurality of TCP (Tape Carrier) devices are mounted on a strip substrate with 1C for driving. Package) to connect. These TCPs are composed of a plurality of source driving TCPs and gate driving TCPs. These TCPs are connected to an external circuit board, and image data signals, power supply voltages, and the like are supplied from the external circuit board to each TCP. The liquid crystal driving panel 1C, which is composed of 1C for gate driving and 1C for source driving, is used to drive a liquid crystal display panel (see Patent Documents 1 and 2 below). The operation principle of such a T C P type liquid crystal display device is shown in FIG. 7 (including FIGS. 7A and 7B) and FIG. 8. FIG. 7A is a schematic diagram of a TCP-type liquid crystal display device, FIG. 7B is a schematic diagram of a source driving TCP (or a gate driving TCP) carried in FIG. 7A, and FIG. 8 is a diagram illustrating each Time chart of the flow of each data in source drive TCP. In FIG. 7, the TCP-type liquid crystal display device 50 is provided with a gate signal line to the liquid crystal display panel 51 on the peripheral edge of an active matrix liquid crystal display panel 51 on which a TFT (Thm Film Transistor) is mounted. 200540787 and multiple gate drive TCP52 and source drive TCP53 for source signal line supply; used to supply image data signals, clock signals, 1C drive power supply voltage, and counter electrode drive to each of TCP52 and 53 The external circuit board 54 of the liquid crystal display panel drive signal such as the power supply voltage. As shown in FIG. 7B, the gate driving TCP52 and the source driving TCP53 are provided on a flexible substrate 56 such as 1C55 for source driving; and various drivers for supplying a liquid crystal display panel to the source driving IC55 Signal supply wiring 57 for signals; signal output wiring 58 for supplying a signal output from the source driving 1C55 to the liquid crystal φ display panel 51. The signal supply wiring 57 of each of the aforementioned TCPs 52 and 53 is electrically connected to a terminal on the external circuit substrate 54 near the liquid crystal display panel 51 as shown in FIG. 7A, and image data provided on the external circuit substrate 54 The processing IC 5 9 (see FIG. 8) and a power supply circuit (not shown) and the like drive the liquid crystal display panel driving signal to the source driving IC 55. Then, an image signal from an image signal generating device such as a PC or the like not shown in the figure is input to the image data processing IC 59. φ Taking the case of TCP53 for source driving as an example, the operation principle of the TCP-type liquid crystal display device 50 will be described with reference to FIG. 8. The liquid crystal display device 50 shown in FIG. 8 includes, for example, four source driving TCP53A to 53D, and source driving ICs 55A to 55D are carried on the source driving TCP53A to 53D, respectively. In the liquid crystal display device 50, a plurality of gate driving TCP52s are connected, but only one is shown in FIG. The image signal from the image signal generating device such as a PC is processed by the image data processing IC 59, and is supplied to the wirings 57A to 57D at the same time in a scanning period synchronized with the clock signal. Ic 5 5 A to 5 5 D for source driving carried on TCP53A to 5 3 D. In addition, the image data signals a to d are signals formed by a pulse sequence corresponding to the number of source signal lines of the liquid crystal display panel 51 connected to each of the source driving ICs 55A to 55D. For ease of explanation, FIG. 8 shows a single pulse including the image data signals a to d. On the other hand, each of the source driving ICs 55A to 55D is supplied with a start pulse that matches an individual predetermined time. For example, when an image data signal is input to the source driving φ IC55A, the image data signal a The start pulse is matchedly supplied to the source driving IC 55A, so that the source driving IC 55A processes the processed image data signal and performs the predetermined source signal lines on the liquid crystal display panel 51 connected to each graphic element. Individual output. In summary, although only TCP53A to 53D for source driving are described, the same processing is performed for gate driving T C P 5 2 and a predetermined image is displayed on the liquid crystal display panel 51. However, since the image data signals and power supply voltage of the liquid crystal display device φ50 of such TCP52, 53A to 53D are provided separately from the external circuit board 54 to each TCP, a large amount of external circuit board 54 is required. wiring. For this reason, there are problems that the manufacturing process of the external circuit board 54 'TCP52, 5 3 A to 5 3 D, and the liquid crystal display panel 51 is complicated, and the cost and reliability are reduced. Therefore, in recent years, in order to reduce the number of wirings with respect to such TCPs, a liquid crystal display device employing a so-called signal transmission method that sequentially transmits a signal input to one TCP and the like to an adjacent TCP has been developed (see the patent document below). 2 ). 200540787 Therefore, in order to facilitate the understanding of the present invention below, a liquid crystal display device 1 using a signal transmission method disclosed in Patent Document 2 below will be described with reference to FIG. 9. 9 is a schematic plan view of a liquid crystal display device disclosed in Patent Document 2 below. The liquid crystal display device 1 includes an active matrix liquid crystal display panel 2 on which a TFT (Thin Film Transistor) is mounted; a control circuit substrate 3 disposed near a peripheral edge portion of the liquid crystal display panel 2; and the control circuit substrate 3 A plurality of connected source driving circuits ST1 to ST6, which are respectively carried on a peripheral portion of one g of the liquid crystal display panel 2, such as six TCPs, are connected. Further, the source driving circuits ST1 to ST6 on each TCP include source driving ICs SD1 to SD6 arranged on each TCP, and signal input wirings for inputting signals to the source driving 1C, and First signal output line for output signal from source driving 1C to liquid crystal panel 2; second signal output line for transmitting output signal from source driving 1C to adjacent TCP; for driving source It is constituted by objects such as 1C power supply wiring. ® In addition, these multiple source driving circuits ST1 to ST6 are connected in series through connection lines L 1 to L6, respectively. The original source driving circuit ST 1 and the control circuit board 3 use signals provided on the flexible wiring board FPC, etc. Supply line 7 to connect. The control circuit board 3 is composed of an image data signal control IC 5 and a power supply circuit 6 so that an image signal transmitted from an image signal generating device such as a PC (not shown) is processed by the IC 5. In addition, the other peripheral edges of the liquid crystal display panel 2 are similarly provided with a gate driving circuit GT1 individually carried on a plurality of TCPs (only one is shown in FIG. 9 200540787), and they are also connected in series. In the same manner as in the case of the source driving circuit, the f-moving circuit GT 1 is connected to the ICGD 1 through a flexible wiring board through which three supply lines such as signals are supplied. The liquid crystal display device 1 provided with such a TCP, for example, the substrate 3 inputs image data signals, power supply voltage, and the like to the first source driving ICSD1 through the supply line L1. At this time, the divided image data signal sources The ICSD1 is used for the pole drive to output the source electrodes of the various elements of the liquid crystal display panel 2 at φ, and the signals and power voltages of the components pass through the connection wirings L2 to L6 on the panel substrate on the TCP to sequentially drive the SD6 to the source. The output is similarly output to each picture element of the liquid crystal display panel 2 through the image data signals of the source driving ICSDs 2 to 2. In this case, in the gate driving circuit GT1 provided in other periods of the liquid crystal display panel 2, the gate control signal is also processed by ICGD1, and is output to the gate electrode corresponding to each picture element of white 1 plate 2. . Therefore, according to this liquid crystal display device 1, compared with a device using a missing substrate and TCP, the tampering required for the circuit substrate 3 to supply a signal to the TCP and the like can be largely generated, and the manufacturing cost can be reduced. However, using such a TCP liquid crystal display device 1, a signal entering a specific TCP, etc., are sequentially sent to an adjacent TCP fl, so the wiring used for transmitting signals, etc. becomes longer. There is a wiring distance: the initial gate driver. The gate driving slave control circuit is not shown in the figure. 7. Connect one of them and connect to the other. At the same time, other wires and liquid crystal ICSD2 ~ < SD6 will input the corresponding source electrode to the peripheral edge gate LCD driver. There are few control circuits on the surface in order to control the number. Therefore, it is a method of input and output, which increases the resistance. -10 · 200540787 f In addition, TCP and liquid crystal display panels have multiple 1C for driving, 1C for gate driving, etc. 1C is used for the wiring of 1C for driving the liquid crystal display panel, so the space for wiring for forming and the like is limited. This makes it impossible to increase the width or thickness of the transmission wiring, and as a result, the wiring impedance increases. This impedance makes the transmitted signal, especially the voltage of the power supply voltage, a cause of malfunction of the liquid crystal driving 1C. In other words, the amount of decrease in the Φ pressure increases between the upstream side and the downstream side in the series connection group of the power supply voltage that the liquid crystal driving IC outputs to the liquid crystal display panel in order to increase toward the downstream side in the transmission direction. For example, when it is desired to display the gray scale on the entire display area of the liquid crystal display panel, the deviation of the production level between the upstream side and the downstream side also causes the display quality to decrease. Furthermore, in this liquid crystal display device 1, it is found that electromagnetic interference (Electro-Magnetic Interference. I [EMI]) that is often large during use. The cause of this EMI is that each of the image data signal input terminals for source driving to SD6 supplies the image data signals electrically in parallel, so there is a connection wiring L 1 to A long image data signal wiring extending in the range of the source IC SD 6 at the other end. The image data signal supplied in parallel to the source driving SD 6 flows in the long image data signal wiring, which becomes EMI. because. In the liquid crystal display device 1, a plurality of wirings are arranged on the liquid crystal display panel 2, and the increase in the size of the edge is related to the high drop in wirings that are used for source wiring and transmission of signals and signals. So from the difference in TCP. Due to the same gray scale, ICSD1 connected at the same time as the edge 2 is not used hereinafter. At the same time, it is used for edge pole driving. Because of the ICSD1 ~ the original edge is used to increase uselessly. 11- 200540787 image display with LCD panel 2 Irrelevant area, therefore, it is not easy to adopt a well-known method such as providing a shield line separately to improve EMI. On the other hand, a liquid crystal display device that solves such problems divides a series connection group of a plurality of TCPs connected in series at a central portion, and supplies image data to one side of each of the series connection groups of separate TCPs. Signal and other liquid crystal display devices. For example, as shown in the liquid crystal display device 1 'in FIG. 10, a series connection group of multiple φs connected in series is divided into two parts on each side of the central part, and the TCPs forming the source driver circuits ST1 to ST3 are formed. The formed string group is connected to the TCP connection group formed by the source driver circuits ST4 to ST6, and the source lines ST1 and ST4 of the first TCP of each series connection group are passed through the letter supply lines formed on FPC2 and FPCi. 7 ′ and 7 are connected to the control circuit substrate 3, and are configured to be supplied from the circuit substrate 3 to the source driving circuits ST 1 and S T4. According to the liquid crystal display device 1 ′ using this method, since the series is divided into two parts, the length of the separated two series connection groups can also be reduced until the voltage of the end of the series connection group is reduced, and each series connection group is simultaneously given. The image data signal is reduced by half, which can achieve the effect of reducing EMI. However, in the liquid crystal display device Γ of this structure, the end portion in the separated series connection group is located in the center of the liquid crystal display panel; the vicinity of the source driving circuit ST3 of TCP is wiring compared to the vicinity of the source driving electric The impedance is large, so the voltage drop to this part is also used. For the same purpose, consider the two groups. The connection group such as the TCP, which is divided into a series of connected drive electric signals and the control signal, is shortened. The two-way road ST1 is increased. -12- 200540787? On the other hand, since the voltage drop does not actually occur near the source drive circuit S T 4 on the other side adjacent to the source drive circuit s T 3, the display on the most prominent liquid crystal display panel is caused. In the central part of the region, the picture element area with a large drop in power supply voltage and the picture element area with a small drop in power supply voltage are connected in a line, which may cause people to worry about display unevenness in this part. In addition, since the control circuit board 3 must be connected to the source driving circuits ST1 and ST4 of the first TCP of the two serially connected groups at separate positions, the length of the control circuit board 3 is increased, resulting in the formation of a large-scale device. φ In addition, although the liquid crystal display device disclosed in the following Patent Document 2 attempts to reduce the impedance of the signal wiring or power wiring through the arrangement or shape of the signal wiring or power wiring formed on the TCP, it cannot Well done. In addition, although the problems involved in the above-mentioned prior art have been described using a liquid crystal display device as an example, the same problem occurs in a plasma display device using a plasma display panel. [Patent Document 1] Japanese Patent Laid-Open No. 62 — 23 8 684 (bottom right column on page 1 1-| 1 3 lines, Figure 2) [Patent Document 2] Japanese Patent Laid-Open No. 200 1-05648 No. 1 Gazette (Scope of patent application, paragraphs [0002] to [0013], [0043] to [0047], Fig. 1) [Summary of the Invention] The present invention is made by focusing on the problems in the prior art. A first object is to provide a power supply capable of preventing sequential transmission of a display device employing a so-called signal transmission method in which a signal input to one driving circuit having 1C for driving is sequentially transmitted to an adjacent driving circuit. 13-200540787 A display device in which the voltage of the voltage is reduced, and a malfunction of the driving 1C is prevented to improve the display quality. A second object of the present invention is to provide a display device employing a so-called signal transmission method for sequentially transmitting a signal inputted to one driving circuit having 1C for driving to an adjacent driving circuit in a so-called signal transmission method. A display device in which the image data signal in the data signal wiring itself is processed, thereby significantly reducing the generation of EMI. A third object of the present invention is to provide a display device employing a so-called signal transmission method for sequentially transmitting a signal inputted to one driver circuit having 1C for driving to an adjacent driver circuit in a so-called signal transmission method, and driving the serially connected driver. The liquid crystal display device in which the series connection group of the circuit is divided into two parts, and the image data signal and the like are supplied from each side of the series connection group of the two separate driving circuits, provides a display which is reduced in the central portion of the display panel and the peripheral edge portion. Uneven display device. The first object of the present invention can be achieved by the following structure. That is, according to the first aspect of the present invention, there is provided a display device having a configuration I in which a plurality of driving circuits having 1C for driving are connected to a peripheral edge portion of a display panel, and adjacent driving circuits pass through each other. The connection wiring formed on the display panel is connected to supply a power supply voltage required to drive the driving 1C and the display panel from an external control circuit to at least one of the plurality of driving circuits, and from the driving circuit to the adjacent driving The circuit supplies the aforementioned power supply voltages in sequence, and the signal wiring for the driving 1C on the upstream side in the voltage supply direction is formed to be approximately equivalent to the signal wiring from the driving 1C to the driving 1C on the driving circuit adjacent to the voltage supply direction on the downstream side. The wiring impedance calculation wiring, the upstream drive IC, outputs the calculation voltage to one end of the above-mentioned cloth-14-200540787 line impedance calculation wiring and detects the voltage at the other end to calculate the wiring impedance 値, based on the calculated wiring impedance.値 Calculated voltage drop 値, the output of the downstream drive circuit is only increased by the calculated voltage Zhi Zhi amount of voltage supply voltage. In the aspect, preferably, the driving circuit is configured by a circuit in which the driving 1C is mounted on a strip substrate, and the wiring impedance calculation wiring is returned from the strip substrate constituting the driving circuit through the display panel. It is formed on the aforementioned strip substrate. Further, in the aspect, it may be configured by a circuit in which the driving 1C is mounted on a peripheral edge portion of the display panel. Further, in the aspect, it is preferable that the driving 1C includes a power supply voltage input terminal for inputting a power supply voltage, a calculation voltage generating section that generates a calculation voltage for calculating wiring impedance, and generates the voltage from the calculation. The calculation voltage output terminal of the calculation impedance output terminal is output to one end of the wiring impedance calculation wiring; the detection terminal of the output voltage input from the other end of the wiring impedance calculation wiring; based on the calculation voltage and the detection voltage The wiring ® impedance calculation unit that calculates the wiring impedance by detecting the detected voltage of the terminal; while supplying the power supply voltage input from the power supply voltage input terminal, calculates the voltage drop 基于 based on the calculated wiring impedance 値, and The voltage 値 only increases the calculated voltage drop 値 of the power supply voltage addition unit; the power supply voltage output terminal that outputs the power supply voltage from the power supply voltage addition unit, and further preferably, the aforementioned power supply voltage is a driving power supply voltage of 1C. And a display power supply voltage supplied to the display panel. These display devices of the first aspect can be applied to a liquid crystal display device or a -15-200540787 plasma display device. In addition, the second object of the present invention can be achieved by the following structure. That is, according to the second aspect of the present invention, a display device described below is provided. The display device has a structure in which a plurality of driving circuits having 1C for driving are connected to a peripheral edge portion of a display panel, and adjacent driving circuits pass through each other. The connection wiring formed on the display panel is connected to supply a power supply voltage required to drive the driving 1C and the display panel from an external control circuit to at least one of the plurality of driving circuits, and from the driving circuit to the adjacent φ The driving circuit sequentially supplies the aforementioned power supply voltage, among which the aforementioned driving 1C outputs the image data signals other than the processed image data signal to the next adjacent driving 1C among the input image data signals. . In the aspect, preferably, the driving circuit is configured by a circuit in which the driving 1C is mounted on a strip substrate, and the wiring impedance calculation wiring is returned from the strip substrate constituting the driving circuit through the display panel. It is formed on the aforementioned strip substrate. In addition, in the aspect, it may be configured by a circuit in which the driving 1C is mounted on the peripheral edge portion 0 of the display panel. In the liquid crystal display device according to the aspect, preferably, the driving 1C is provided with an image data output control circuit, and the image data output control circuit is adapted to input image data corresponding to an initial pulse input to the driving 1C. The image data signal other than the signal is output to the adjacent next driving 1C, and it is preferable that the image data output control circuit does not pass while the start pulse is input to the source driving 1C. The image data signal is configured by a circuit of the image data signal in a period when a start pulse is not input to the source driving 1C. -16- 200540787 These second display devices can also be applied to liquid crystal display devices or plasma display devices. The third object of the present invention can be achieved by the structure of the harp. That is, according to a third aspect of the present invention, there is provided a liquid crystal display device configured to connect N (where N> 2) driving circuits having a driving circuit for 1C to a peripheral edge portion of a display panel, Adjacent drive circuits are connected to each other through connection wirings formed on the display panel, and the power supply voltage φ required to drive the drive 1C and the display panel is supplied from an external control circuit to at least the plurality of drive circuits. One, sequentially supplying the aforementioned power supply voltage from the driving circuit to an adjacent driving circuit, wherein a series connection group connected in series with the N driving circuits is divided into two parts at a central portion, and a signal and a voltage from the control circuit are respectively supplied to Two driving circuits adjacent to each other by sandwiching the division. In the aspect, preferably, the driving circuit is configured by a circuit in which the driving 1C is mounted on a strip substrate, and the wiring for calculating the impedance of the wiring is preferably routed from the strip substrate constituting the driving circuit through the display. The panel I is formed so as to return to the aforementioned strip substrate. In addition, in the aspect, it may be configured by a circuit in which the driving 1C is mounted on a peripheral edge portion of the display panel. In the above aspect, it is preferable that one or two flexible wiring substrates connecting the control circuit and the liquid crystal display panel are arranged at the center of the peripheral edge of the liquid crystal display panel.
進而，所述方式中，較佳爲，將從前述控制電路向夾住 前述分割處而鄰接的2個TCP供給的信號的送出順序設 爲，向一邊的TCP爲正方向的送出順序，向另一邊的TCP -17- 200540787 爲逆方向的送出順序，在該場合，較佳爲，在前 路和另一個TCP之間配置由線路記億體和匯流排 方向開關構成的定時控制器，通過前述定時控制 述控制電路送出的正方向的送出順序的信號轉 向。 根據本發明的第1方式的顯示裝置，電壓供給 側的驅動用1C，向下流側驅動電路輸出電壓値上 電壓，該上升的電壓値僅爲利用佈線阻抗算出用 P 的電壓下降値。輸出的電源電壓，通過構成驅動 板上的信號佈線或顯示面板上的連接用佈線，供 側驅動電路的驅動用1C。 供給到下流側驅動用1C的電源電壓，雖然通過 電壓値下降，但由於在從上流側驅動用1C輸出的 電流下降値預先提高了電壓値，所以供給到下流 1C的電源電壓，成爲驅動用1C正常工作所需要的 因此，在下流側驅動用1C中，由於分別供給了合 0 値的電源電壓，所以能夠防止驅動用1C的誤動作 能夠使顯示裝置正常地工作。 該場合，驅動電路爲由將驅動用1C安裝在帶狀 電路、即TCP電路構成的場合，由於形成從該帶 由顯示面板再返回到前述基板上的佈線阻抗算出 所以能夠與從上流側驅動用1C到下流側驅動用 佈線以大致等價的條件形成佈線阻抗算出用佈線 說’在上流側驅動用1C和下流側驅動用1C之間 區分爲上流側驅動電路的基板上的佈線、顯示面 述控制電 驅動器的 器將從前 換成逆方 方向上流 升的電源 佈線算出 電路的基 給到下流 佈線導致 時刻按照 側驅動用 電壓値。 適的電壓 f。由此， 基板上的 狀基板經 用佈線， 1C的信號 。換句話 的佈線， 板上的連 -18- 200540787 接用佈線、下流側驅動電路的基板上的佈線等3種佈線。 另一方面，由於佈線阻抗算出用佈線，也以從構成驅動電 路的基板經由顯示面板再返回到前述基板上的方式形成， 所以區分爲構成驅動電路的基板上的第1佈線、顯示面板 上的佈線、前述基板上的第2佈線等3種佈線。 而且<，第1佈線與上流側驅動電路的基板上的佈線對 應，顯示面板上的佈線與顯示面板上的連接用佈線對應， 第2佈線與下流側驅動電路的基板上的佈線對應。因此， φ 能夠與從上流側驅動用1C到下流側驅動用1C的信號佈線 以大致等價的條件形成佈線阻抗算出用佈線。由此，能夠 高精度地求出，從上流側驅動用1C到下流側驅動用1C的 信號佈線的佈線阻抗値和電壓下降値。 此外，根據第1方式的顯示裝置，電壓供給方向上流側 的驅動用IC ’向下流側驅動電路輸出電壓値上升的電源電 壓’該上升的電壓値僅爲利用佈線阻抗算出用佈線算出的 電壓下降値。輸出的電源電壓，通過連接用佈線，供給到 φ 下流側驅動用I c。供給到下流側驅動用IC的電源電壓，雖 然通過連接用佈線導致電壓値下降，但由於在上流側驅動 用IC輸出的時刻按照電壓下降値預先提高了電壓値，所以 供給到下流側驅動用1C的電源電壓，成爲驅動用IC正常 工作所需要的電壓値。因此，在下流側驅動用IC中，由於 分別供給了具有合適的電壓値的電源電壓，能夠防止驅動 用1C的誤動作。由此，能夠使顯示裝置正常地工作。 此外’根據所述第1方式的顯示裝置，在上流側從鄰接 的驅動用1C供給的電源電壓，通過連接用佈線從電源電壓 -19- 200540787 輸入端子輸入到驅動用1C。驅動用IC，基於輸入的電源電 壓執行預定的動作，並將驅動信號輸出到顯示面板。另一 方面，驅動用1C中，將用算出用電壓生成部生成的算出用 電壓從算出用電壓輸出端子輸出到佈線阻抗算出用佈線的 一端，將來自該佈線阻抗算出用佈線的另一端的輸出電壓 從檢出端子輸入。在佈線阻抗算出部中，基於輸出的算出 用電壓和從檢出端子輸入的檢出電壓來算出佈線阻抗値， 進而在電源電壓加算部中，基於算出的佈線阻抗値來算出 Φ 電壓下降値，將電源電壓的電壓値僅按照算出的電壓下降 値進行增加。來自電源電壓加算部的電源電壓，從電源電 壓輸出端子輸出，通過連接用佈線，供給到在下流側鄰接 的驅動用1C。根據這樣的結構，能夠將根據佈線阻抗導致 的電壓下降値進行了增加的電源電壓供給到下流側的驅動 用1C。 此外，根據本發明的第1方式的顯示裝置，由於以合適 的電壓値供給了各個驅動用IC工作用的電源電壓，所以能 • 夠防止驅動用IC的誤動作，使顯示裝置正常地工作。此 外’由於以合適的電壓値向各個驅動用1C供給了顯示用電 源電壓，所以能夠從各個驅動用1C向顯示面板分別供給合 適的驅動信號，降低灰度的等級偏差等的顯示不均勻現 象，能夠提高顯示裝置的顯示品質。 根據本發明的第2方式，由於在預定的驅動用IC中處理 的圖像資料信號對於其他驅動用1C來說是不需要的信 號’所以從驅動用1C輸出的圖像資料信號在每通過驅動用 1C時就會減少，所以即使存在沿著顯示面板的邊緣的從一 -20- 200540787 個端部的驅動電路到另一個端部的驅動電路延伸 像資料信號用佈線，也能大量減少該圖像資料信 EMI的產生。 此外，所述第2方式中，由於前述源極驅動用 與輸入的初始脈衝對應的圖像資料信號並輸出 板，所以能夠通過將除了與該初始脈衝對應的圖 號之外的其他圖像資料信號輸出到鄰接的下一 1C，來容易地將需要的圖像資料信號輸出到鄰接 φ 1C，而且，能夠通過簡單的開關電路就可以僅選 需要的圖像資料信號。 此外，根據本發明的第3方式，由於將串聯連 動電路的串聯連接組在中央部分成2部分，所以 開的各個串聯連接組的長度，而且，由於來自前 路的信號等分別供給到夾住分開處而鄰接的2 路，所以在減小了直到分開的各個串聯連接組的 壓下降的同時使各自的電壓下降量實際上相同， ^ 作爲最顯眼的處所的液晶顯示面板的中央部中的 勻現象的同時減少了在周圍邊緣部的顯示不均勻 生。此外，由於與控制電路連接的2個驅動電路 處而鄰接，所以能夠用1條FPC至2條短的FPC 路連接的同時，使得佈線的連接容易進行。 進而，所述方式中，控制電路，由於與在分割虔 個驅動電路連接，所以不必將佈線一直延伸到液 板的端部，就能夠使控制電路基板變小。而且， 連接多個驅動電路的串聯連接組在中央部被分成 的長的圖 號引起的 1C，處理 到顯示面 像資料信 個驅動用 的驅動用 擇並輸出 接多個驅 縮短了分 述控制電 個驅動電 端部的電 所以消除 顯示不均 現象的產 夾住分開 與控制電 ;鄰接的2 晶顯示面 由於串聯 2部分， -21- 200540787 所以分別供給到2個串聯連接組的圖像資料信號減少了一 半，所以EMI也減少。 該場合，如果將串聯連接驅動電路的串聯連接組在中央 部被分成2部分，將來自控制電路的信號分別按原樣供給 到夾住前述分開處而鄰接的2個驅動電路上的驅動用1C的 話，由於供給到一個驅動電路的信號爲正方向的送出順序 而在另一個方向中爲逆方向的送出順序，所以在另一方向 中不能進行正常的圖像顯示，但可以通過將供給到前述另 g —個的驅動電路的信號的送出順序轉換成逆方向，就能夠 進行正常的圖像顯示。而且，通過使用由線路記憶體和匯 流排驅動用的雙方向開關構成的定時控制器，能夠用簡單 的結構，將向前述另一個驅動電路供給的信號的送出順序 設成逆方向。 【實施方式】 下面，對與本發明相關的液晶顯示裝置的實施形式參照 附圖進行詳細說明。但是，下面所示的實施形式，僅僅是 $ 示出作爲用於將本發明的技術思想具體化的顯示裝置的液 晶顯示裝置的一個例子，並不是將本發明特定於該液晶顯 示裝置的，還可以同樣地適用於使用電漿顯示面板的電漿 顯示裝置等中的。而且，下面的說明中，與第9圖〜第10 圖所示的在先的例子的液晶顯示裝置同樣的構成元件賦予 相同的附圖標記而進行說明。 [實施例1] 由於實施例1的液晶顯示裝置1 A的槪略的構成與第9圖 所示的在先的例子的液晶顯示裝置1大部分相同’所以對 -22- 200540787 其進行採用，進而參照第1圖和第2圖對本實施例1的液 晶顯示裝置1 A進行說明。而且，第1圖是表示構成實施例 1的液晶顯示裝置1 A的液晶顯示面板和源極驅動電路之間 的連接關係的俯視圖，第2圖是表示具備源極驅動電路的 驅動用I C的構成的方塊圖。 如第9圖所示，本實施例1的液晶顯示裝置1A，具備液 晶顯示面板2、在液晶顯示面板2的周圍邊緣部上配置的 控制電路3和多個驅動電路ST1〜ST6、GT1而構成。 液晶顯示面板2是比如使用TFT的主動矩陣型的液晶顯 示面板。使用TFT的主動矩陣型液晶顯示面板，在主動矩 陣基板和對置基板之間插設液晶層而構成，該主動矩陣基 板中，與在玻璃等的透明基板上行列狀地排列的多個圖元 電極分別對應地設置有作爲開關元件的TFT ;該對置基板 中，在透明基板的基本整個表面上形成有一片公共電極。 主動矩陣基板，在透明基板上，形成相互平行的多個閘 極信號線、和與閘極信號線正交的同時相互平行的多個源 極信號線，在閘極信號線和源極信號線所劃分的矩形區域 內形成圖元電極和TFT。TFT的汲極與圖元電極連接，閘 極與閘極信號線連接，源極與源極信號線連接。一方面， 閘極信號線形成爲它的一端延伸到透明基板的一邊側的周 圍邊緣部，該一端部成爲輸入端子。此外，源極信號線也 有一端延伸到透明基板的一邊側的周圍邊緣部，該端部成 爲輸入端子。而且，由於閘極信號線和源極信號線，如上 所述在相互正交的方向上形成，所以閘極信號線的輸入端 子形成的一邊側周圍邊緣部，和源極信號線的輸入端子形 -23- 200540787 成的一邊側周圍邊緣部，如第9圖所示，成爲在透明基板 上鄰接的位置關係。 在源極信號線的輸入端子上連接源極驅動電路s T 1〜 ST6 (在統稱時，使用附圖標記“ ST” )。源極驅動電路 ST，用TCP構成。例如，源極驅動電路ST1在撓性基板SB 1 上安裝驅動用IC SD1的同時，形成大量的信號佈線而構 成。該信號佈線之中，包含用於將從驅動用IC SD1輸出的 源極信號（施加在圖元上的顯示電壓）供給到前述源極信 p 號線的輸入端子的多個源極信號輸出用佈線。通過夾設各 向異性導電膜並進行熱壓接，來連接源極驅動電路ST 1和 液晶顯示面板2，使得源極信號輸出用佈線和源極信號線 的輸入端子電連接。對於其他的源極驅動電路ST2〜ST6 ’ 其結構以及與液晶顯示面板2之間的連接關係，與源極驅 動電路ST1相同。 此外，在閘極信號線的輸入端子上連接閘極驅動電路 GT1。第9圖中，僅示出1個閘極驅動電路GT1，但實際上 連接有多個閘極驅動電路。閘極驅動電路G T 1用T C P構 成，具體而言，在撓性基板GB1上安裝驅動用ICGD1的同 時，形成大量的信號佈線而構成。在該信號佈線之中’包 含用於將從驅動用ICGD1輸出的閘極信號（TFT的導通/ 截止電壓）供給到前述閘極信號線的輸入端子的多個閘極 信號輸出用佈線。通過夾設各向異性導電膜並進行熱壓 接，來連接閘極驅動電路GT1和液晶顯示面板2 ’使得閘 極信號輸出用佈線和閘極信號的輸入端子電連接。對於圖 中未示出的其他閘極驅動電路，其結構以及與液晶顯示面 -24- 200540787 板2之間的連接關係，與閘極驅動電路GT 1相同。 這樣地，在液晶顯示面板2的周圍邊緣部上，連接有多 個驅動電路ST1〜ST6、GT1。這些驅動電路ST1〜ST6、GT1 根據從控制電路3供給的各種電源電壓、圖像資料以及控 制信號而進行工作。控制電路3通過在基板4上形成控制 用IC5、電源電路6和大量的信號佈線而構成。控制電路3 經由信號供給用F P C ( F1 e X i b 1 e P r i n t e d C i r c u i t :撓性佈線 基板）7與液晶顯示面板2連接。控制用IC5輸出在液晶顯 $ 示面板2上顯示的圖像資料、或控制驅動電路S T 1〜S T6、 GT 1的控制信號等。此外，電源電路6，生成並輸出構成驅 動用ICSD1〜SD7、GDI的工作電源的類比電源電壓或用於 進行液晶顯示面板2的灰度顯示的灰度電源電壓等的各種 電源電壓。 包含從控制電路3輸出的圖像資料、控制信號、各種電 源電壓的各種信號，經由信號供給用FPC7供給到液晶顯示 面板2。在液晶顯示面板2的周圍邊緣部上，形成有用於 連接信號供給用FPC7和源極驅動電路ST1以及閘極驅動電 ^ 路GT 1的連接用佈線，同時形成有用於連接相互鄰接的驅 動電路彼此的連接用佈線。這樣，從控制電路3所供給的 各種信號，如第9圖所示，從源極驅動電路ST 1到鄰接的 源極驅動電路ST2〜ST6依次傳輸。此外，雖然在第9圖中 沒有記載，但對於閘極驅動電路也與源極驅動電路ST相同 地，從控制電路3所供給的各種信號，從閘極驅動電路GT 1 到鄰接的閘極驅動電路依次傳輸。 在本實施例1中，對於這樣的結構的液晶顯示裝置1 A， -25- 200540787 相對於位於電源電壓供給方向的上流側的源極驅動電路 STi( i=l〜6)的驅動用ICSDi，形成佈線阻抗算出用佈線， 該佈線基本等價於從該驅動用ICSDi直到鄰接於電源電壓 供給方向的下流側的驅動電路STi+Ι的驅動用ICSDi+1 的信號佈線。等價表示形成狀態相同，具體而言，用同樣 的材料，而且長度、寬度、厚度都基本相同，或者不限定 於用同樣的材料或長度、寬度、厚度，表示佈線阻抗値爲 近似値的意思。 φ 而且，上述電流側驅動用ICSDi構成爲：通過在前述佈 線阻抗算出用佈線的一端上施加算出用電壓並檢出另一端 的電壓，來算出佈線阻抗値，基於算出的佈線阻抗値來算 出電壓下降値，將根據算出的電壓下降値進行相應的電壓 値上升的電源電壓向下流側驅動電路STi + 1輸出。下面， 對佈線阻抗算出用佈線和驅動用ICSDi進行說明。 第1圖是用於說明本實施例1的液晶顯示裝置1 A中的液 晶顯示面板2和源極驅動電路STi之間的連接關係的俯視 φ圖。源極驅動電路STi具有這樣的結構，在將驅動用ICSDi 安裝在矩形狀的撓性基板S B i上的同時，形成大量的信號 佈線組Ai、Bi、Ci、Di、Ei和信號佈線Rai、Rci。而且， 信號佈線組和信號佈線，雖然撓性基板SBi形成在與液晶 顯示面板2對置的表面側（內側）上，但爲了容易理解第2 圖中在與液晶顯示面板2對置的表面相反側（表面側）上 記載了信號佈線，將驅動用ICSDi的安裝位置用雙點劃線 表示。 在撓性基板S B i上，形成有電源電壓輸入用佈線組A i、 -26- 200540787 控制信號輸入用佈線組Bi、源極信號輸出用佈線組Ci、控 制信號輸出用佈線組Di、電源電壓輸出用佈線組Ei。而且， 在撓性基板S B i上，還形成有構成佈線阻抗算出用佈線Ri 的算出用電壓輸出側佈線Rai和檢測電壓輸入側佈線Rci。 在撓性基板SBi中，兩個長邊之中的一邊側成爲與液晶 顯示面板2連接用的連接部。電源電壓輸入用佈線組Ai， 形成爲從前述連接部到驅動用ICSDi的電源電壓輸入端 子。控制信號輸入用佈線組Bi，形成爲從前述連接部到驅 g 動用ICSDi的控制信號輸入端子。源極信號輸出用佈線組 Ci，形成爲從驅動用ICSDi的源極信號輸出端子到前述連 接部。控制信號輸出用佈線組Di，形成爲從驅動用ICSDi 的控制信號輸出端子到前述連接部。電源電壓輸出用佈線 組Ei，形成爲從驅動用ICSDi的電源電壓輸出端子到前述 連接部。此外，算出用電壓輸出側佈線Rai，形成爲從驅動 用ICSDi的算出用電壓輸出端子到前述連接部。檢測電壓 輸入側佈線Rci，形成爲從前述連接部到驅動用ICSDi的檢 0 出端子。 一方面，在液晶顯示面板2的周圍邊緣部分上，如上所 述地，配置有以將源極信號線延伸到端部的方式形成的源 極信號輸入端子組Hi，與液晶顯示面板2的周圍邊緣部上 連接源極驅動電路STi，使得撓性基板SBi的源極信號輸出 用佈線組Ci和源極信號輸入端子組Hi重疊並連接。 此外，在液晶顯示面板2的周圍邊緣部上，在形成用於 將源極驅動電路STi和與信號的傳輸方向上流側鄰接的源 極驅動電路STi - 1連接的連接佈線組Fi、Gi的同時，形 -27- 200540787 成有用於將源極驅動電路sTi和與信號的傳輸方向下流側 鄰接的源極驅動電路STi + 1連接的連接佈線組Fi + 1、Gi + 1 〇 連接佈線組Fi是控制信號用的連接佈線組’形成爲從上 流側源極驅動電路STi - 1的連接處到源極驅動電路STi的 連接處。具體而言，控制信號用連接佈線組Fi，從與上流 側源極驅動電路S Ti - 1的控制信號輸出用佈線組Di - 1重 合的位置，到與源極驅動電路STi的控制信號輸入用佈線 $ 組Bi重合的位置，大致形成爲U字狀。 連接佈線組Gi是電源電壓用的連接佈線組，形成爲從上 流側源極驅動電路STi - 1的連接處到源極驅動電路STi的 連接處。具體而言，電源電壓用連接佈線組Gi，從與上流 側源極驅動電路STi — 1的電源電壓輸出用佈線組Ei - 1重 合的位置，到與源極驅動電路STi的電源電壓輸入用佈線 組Ai重合的位置，大致形成爲U字狀。 此外，連接佈線組Fi + 1是控制信號用的連接佈線組， 形成爲從源極驅動電路STi的連接處到下流側源極驅動電 ^ 路STi + 1的連接處。具體而言，控制信號用連接佈線組Fi + 1，從與源極驅動電路STi的控制信號輸出用佈線組Di 重合的位置，到與下流側源極驅動電路STi + 1的控制信號 輸入用佈線組Bi + 1重合的位置，大致形成爲U字狀。 連接佈線組Gi + 1是電源電壓用的連接佈線組，形成爲 從源極驅動電路STi的連接處到下流側源極驅動電路STi + 1的連接處。具體而言，電源電壓用連接佈線組Gi + 1， 從與源極驅動電路STi的電源電壓輸出用佈線組Ei重合的 -28- 200540787 位置，到與下流側源極驅動電路STi + 1的電源電壓輸入用 佈線組Ai + 1重合的位置，大致形成爲U字狀。 而且，在液晶顯示面板2的周圍邊緣部上，形成有構成 佈線阻抗算出用佈線Ri的面板側佈線Rbi。面板側佈線Rbi 在從與源極驅動電路STi的算出用電壓輸出側佈線Rai重 合的位置到與源極驅動電路STi的檢出電壓輸入側佈線Rci 重合的位置，圍繞液晶顯示面板2的周圍邊緣部而形成。 佈線阻抗算出用佈線Ri由算出用電壓輸出側佈線Rai、 _ 面板側佈線Rbi、檢出電壓輸入側佈線Rci構成。佈線阻抗 算出用佈線Ri，與從驅動用ICSDi到與電源電壓供給方向 的下流側鄰接的驅動電路STi + 1的驅動用ICSDi + 1的信 號佈線，用同樣的材料，且長度、寬度、厚度也大致相同 的方式形成。 通過形成上述那樣的佈線組和佈線，將源極驅動電路STi 與液晶顯示面板2的周圍邊緣部連接，此時，從上流側源 極驅動電路STi - 1輸出的控制信號和電源電壓，經由控制 信號用連接佈線組Fi和電源電壓用連接佈線組Gi，供給到 源極驅動電路STi。此外，從源極驅動電路STi輸出的控制 信號和電源電壓，經由控制信號用連接佈線組Fi + 1和電 源電壓用連接佈線組Gi + 1，供給到下流側源極驅動電路 STi + 1。 這樣的依次傳輸的控制信號中，包含有驅動用IC S D i的 工作時鐘信號或圖像資料。此外，在依次傳輸的電源電壓 中，包含有成爲驅動用IC S D i內部的類比電路的工作電源 的類比電源電壓，或相互電壓値不同的多個灰度電源電 -29- 200540787 壓。多個灰度電源電壓，在液晶顯示面板2中進行灰度顯 示時’基於圖像資料選擇任何1個或2個電壓，根據驅動 用IC SDi內部的階梯（ladder )阻抗，預定的電壓作爲源極 信號供給到液晶顯示面板2。 源極驅動電路STi的驅動用ICSDi，將供給的類比電源電 壓作爲工作電壓而工作，基於時鐘信號或顯示資料等的控 制信號執行預定的控制處理，將源極信號輸出到液晶顯示 面板2。 φ 此外，驅動用IC SDi，通過向佈線阻抗算出用佈線Ri的 一端輸出算出用電壓並檢出另一端的電壓，來算出佈線阻 抗値，基於算出的佈線阻抗値算出電壓下降値，將根據算 出的電壓下降値進行相應的電壓値上升的電源電壓向下流 側源極驅動電路STi + 1輸出。輸出的電源電壓，通過撓性 基板S B i上的電源電壓輸出用佈線組Ei和液晶顯示面板2 上的電源電壓用連接佈線組Gi + 1，供給到下流側源極驅動 電路STi + 1的驅動用1C。 接下來，說明驅動用IC SDi的結構例子。第2圖是表示 ^ 驅動用ICSDi的結構的方塊圖。而且，第2圖中表示用於 佈線阻抗値的算出的結構、和用於電源電壓的電壓値的加 算的結構，省略了驅動用ICSDi本來進行的用於液晶顯示 面板2的顯示控制的結構。 來自控制電路3的電源電路6或上流側驅動用ICSDi — 1 的類比電源電壓，輸入到類比電源電壓輸入端子Π，灰度 電源電壓輸入到灰度電源電壓輸入端子1 2。類比電源電 壓，作爲IC內部的類比電路的工作電源，在分別向包含生 -30- 200540787 成源極信號的信號生成電路的多個模組供給的同時 給到類比電源電壓加算部1 3和佈線阻抗算出用電 部1 4。此外，灰度電源電壓’在供給到生成源極信 號生成電路的同時’還供給到灰度電源電壓加算部 佈線阻抗算出用電壓生成部1 4，生成用於算出佈 的算出用電壓，並供給到算出用電壓輸出端子1 6。 用電壓輸出端子1 6上，連接有佈線阻抗算出用佈,¾ 一端，正確地說連接有算出用電壓輸出側佈線Rai的 算出用電壓供給到佈線阻抗算出用佈線Ri。佈線阻 ® 用佈線Ri的另一端，正確地說檢出電壓輸入側佈線 端部，與檢出端子1 7連接，從佈線阻抗算出用佈潑 另一端輸出的檢出電壓，輸入到檢出端子1 7。 輸入到檢出端子1 7的檢出電壓，供給到佈線阻抗 1 8。此外，供給到算出用電壓輸出端子1 6的算出用 向佈線阻抗算出部1 8供給。佈線阻抗算出部1 8，求 用電壓的電壓値和檢出電壓的電壓値之間的差，基 的差來算出佈線阻抗値。算出的佈線阻抗値，供給 ® 電源電壓加算部1 3和灰度電源電壓加算部1 5。 類比電源電壓加算部1 3，基於供給的佈線阻抗値 佈線阻抗導致的電壓下降的電壓値（電壓下降値） 類比電源電壓輸入端子1 1供給的類比電源電壓的 上’只加上算出的電壓下降値（提高電壓値），.將 加算了的（被提高的）類比電源電壓，供給到類比 壓輔Ϊ出端子1 9。供給到類比電源電壓輸出端子1 9的 源電：Μ ’供給到下流側的源極驅動電路sTi + 1的 ，還供 壓生成 號的信 15 ° 線阻抗 在算出 ! Ri的 端部， 抗算出 Rci的 I Ri的 算出部 電壓還 出算出 於求出 到類比 ，算出 ，在從 電壓値 電壓値 電源電 類比電 驅動用 -31- 200540787 ICSDi + 1。 此外，灰度電源電壓加算部1 5，基於供給的佈線阻抗値， 算出佈線阻抗導致的電壓下降的電壓値（電壓下降値）， 在從灰度電源電壓輸入端子1 2供給的灰度電源電壓的電 壓値上，只加上算出的電壓下降値（提高電壓値），將電 壓値加算了的（被提高的）灰度電源電壓，供給到灰度電 源電壓輸出端子20。供給到灰度電源電壓輸出端子20的灰 度電源電壓，供給到下流側的源極驅動電路STi + 1的驅動 用 ICSDi + 1 〇 而且’第3圖中，雖然僅分別示出了 1個灰度電源電壓 輸入端子12、灰度電源電壓加算部15和灰度電源電壓輸出 端子20 ’但由於如上所述的驅動用icSDi上供給電壓値互 不同的多個灰度電源電壓，所以對應於各個灰度電源電 壓’設置有灰度電源電壓輸入端子12、灰度電源電壓加算 部15和灰度電源電壓輸出端子20。 如上所述，在液晶顯示裝置1A中，源極驅動電路STi 的驅動用ICSDi，將按照使用佈線阻抗算出用佈線Ri算出 的電;壓下降値進行了電壓値上升的電源電壓，朝向下流側 源極驅動電路STi + 1輸出。輸出的電源電壓，通過構成源 @ P動電路STl的撓性基板SBi上的電源電壓輸出用佈線 組· Ei '液晶顯示面板2的電源電壓用連接佈線組Gi + 1、 下流側驅動電路STi + i的電源電壓輸入用佈線組Ai + 1， 而供給到下流側驅動電路STi + 1的驅動用ICSDi + 1。 ί共，給到下流側的驅動用ICSDi + i的電源電壓，雖然由於 經過佈線使電壓値下降，但是由於在從上流側驅動用ICSDi -32- 200540787 輸出的時刻預先將電壓値僅提高電壓下降値，所以供給到 下流側驅動用IC SDi + 1的電源電壓，成爲使得驅動用1C 正常工作所需的電壓値。從而，由於分別將合適的電壓値 的電源電壓供給到下流側驅動用IC SDi + 1，所以能夠防止 驅動用IC SD的誤動作。這樣，能夠使液晶顯示裝置1A正 常工作。 此外，液晶顯示裝置1 A中，由於按照從構成源極驅動電 路STi的撓性基板SBi經由液晶顯示面板2再回到撓性基 0 板S B i的方式形成有佈線阻抗算出用佈線Ri，所以能夠形 成與從驅動用IC SDi到下流側源極驅動用IC SDi + 1的信號 佈線基本等價的條件的佈線阻抗算出用佈線Ri。 換句話說，驅動用ICSDi和下流側驅動用ICSDi + 1之間 的電源電壓用佈線分爲，源極驅動電路STi的撓性基板SBi 上的電源電壓輸出用佈線組Ei、液晶顯示面板2上的電源 電壓用連接佈線組Gi+Ι、和下流側源極驅動電路STi+1 的撓性基板SBi + 1上的電源電壓輸入用佈線組Ai + 1的3 種佈線。另一方面，佈線阻抗算出用佈線Ri，由於按照從 ® 構成源極驅動電路STi的撓性基板SBi經由液晶顯示面板2 再回到撓性基板SBi的方式形成，所以也分爲，撓性基板 SBi上的作爲第1佈線的算出用電壓輸出側佈線Rai、和液 晶顯示面板2上的面板側佈線Rbi、以及撓性基板SBi上的 作爲第2佈線的檢測電壓輸入側佈線Rci的3種佈線。 而且，算出用電壓輸出側佈線Rai對應於源極驅動電路 STi的撓性基板SBi上的電源電壓輸出用佈線Ei ’液晶顯 示面板2上的面板側佈線Rbi對應於液晶顯示面板2上的 -33- 200540787 電源電壓用連接佈線組Gi + 1，檢出電壓輸入側佈線RC1 對應於下流側源極驅動電路STi + 1的撓性基板SBi上的電 源電壓輸入用佈線組Ai + 1。從而，能夠形成與從驅動用 ICSDi到下流側驅動用ICSDi + 1的信號佈線基本等價的條 件的佈線阻抗算出用佈線Ri。這樣，能夠高精度地求出從 驅動用IC S D i到下流側驅動用IC S D i + 1的信號佈線的佈線 阻抗値和電壓下降値。 可是’驅動用IC SDi和下流側驅動用IC SDi + 1之間的信 | 號佈線的材料、長度、寬度、厚度是在液晶顯示裝置1 A的 設計階段中預先決定的。從而，可以採用如下方式，即另 外製成在設計階段中所決定的材料、長度、寬度、厚度的 信號佈線並測量佈線阻抗値，將得到的佈線阻抗値存儲在 記憶體中，利用存儲的佈線阻抗値來算出電壓下降値，對 類比電源電壓和灰度電源電壓僅加算算出的電壓下降値。 然而，這樣的方式容易產生下列的問題所以不是優選的。 首先第1，由於液晶顯示面板2和源極驅動電路S T，通 過夾設各向異性導電膜並熱壓接來進行連接，所以在連接 ^ 部分上產生壓接阻抗。因此，另外製成的信號佈線中，難 於考慮到壓接阻抗的影響，存在不能正確地測量佈線阻抗 値的問題。Furthermore, in the aspect, it is preferable that a transmission order of signals supplied from the control circuit to two TCPs that are adjacent to each other sandwiching the division is set to a transmission order in which TCP is positive in one direction and is transmitted to another. TCP -17-200540787 on one side is the sending order in the reverse direction. In this case, it is preferable to arrange a timing controller composed of a line register and a bus direction switch between the front and another TCP. Timing controls the forward sequence of the signals sent by the control circuit. According to the display device of the first aspect of the present invention, the driving 1C for the voltage supply side outputs a voltage 値 to the downstream drive circuit, and the rising voltage 値 is only a voltage drop P for calculating P by the wiring impedance. The output power supply voltage is provided by the signal wiring on the driver board or the connection wiring on the display panel to supply 1C for driving the driver circuit. Although the power supply voltage supplied to the downstream driving 1C decreases by the voltage 値, the current output from the upstream driving 1C decreases (the voltage is increased in advance), so the power supply voltage supplied to the downstream 1C becomes the driving 1C. Therefore, in the 1C for driving on the downstream side, since a power supply voltage of 0 合 is separately supplied, it is possible to prevent malfunction of the 1C for driving and enable the display device to operate normally. In this case, the driving circuit is constituted by a 1C driving circuit mounted on a strip circuit, that is, a TCP circuit. Since the impedance calculation of the wiring from the strip to the display panel and back to the substrate is formed, it can be used for driving from the upstream side. 1C to downstream drive wiring. The wiring for impedance calculation is formed under approximately equivalent conditions. Say, 'The upper-side drive circuit is divided between the upstream drive 1C and the downstream drive 1C, and the display surface is described. The device controlling the electric driver calculates the base of the circuit from the power supply wiring that has flowed upward in the reverse direction to the downstream wiring, which causes the side driving voltage 驱动 at all times. Appropriate voltage f. As a result, the substrate on the substrate passes through the wiring, and the signal is 1C. In other words, there are three types of wiring, such as wiring on the board, -18-200540787 connection wiring, and wiring on the substrate of the downstream drive circuit. On the other hand, since the wiring for calculating the wiring impedance is also formed so as to return to the aforementioned substrate from the substrate constituting the driving circuit via the display panel, it is divided into the first wiring on the substrate constituting the driving circuit and the one on the display panel. There are three types of wiring, such as a wiring and a second wiring on the substrate. ≪ The first wiring corresponds to the wiring on the substrate of the upstream drive circuit, the wiring on the display panel corresponds to the connection wiring on the display panel, and the second wiring corresponds to the wiring on the substrate of the downstream drive circuit. Therefore, φ can form wirings for calculating wiring impedance under substantially equivalent conditions to signal wirings from 1C for upstream driving to 1C for downstream driving. As a result, the wiring impedance 求 and voltage drop of the signal wiring from 1C for upstream driving to 1C for downstream driving can be obtained with high accuracy. Further, according to the display device of the first aspect, the driving IC on the upstream side in the voltage supply direction 'the output voltage of the downstream driving circuit 値 increased power supply voltage', and this rising voltage 値 is only the voltage drop calculated by the wiring using the wiring impedance calculation. value. The output power supply voltage is supplied to the φ downstream-side driving IC through the connection wiring. Although the power supply voltage supplied to the downstream driving IC is lowered by the connection wiring, the voltage is decreased in advance at the timing of the output of the upstream driving IC. The voltage is increased in advance, so it is supplied to the 1C for downstream driving. The power supply voltage becomes the voltage required for the normal operation of the driving IC. Therefore, in the downstream driving IC, since a power supply voltage having an appropriate voltage 値 is separately supplied, it is possible to prevent a malfunction of the driving 1C. This allows the display device to operate normally. In addition, according to the display device of the first aspect, the power supply voltage supplied from the adjacent driving 1C on the upstream side is input from the power supply voltage -19-200540787 input terminal to the driving 1C through the connection wiring. The driving IC performs a predetermined operation based on the input power voltage and outputs a driving signal to the display panel. On the other hand, in the driving 1C, the calculation voltage generated by the calculation voltage generation unit is output from the calculation voltage output terminal to one end of the wiring impedance calculation wiring, and the output from the other end of the wiring impedance calculation wiring is output. Voltage is input from the detection terminal. In the wiring impedance calculation unit, the wiring impedance 値 is calculated based on the output calculation voltage and the detection voltage input from the detection terminal, and in the power supply voltage addition unit, the Φ voltage drop 値 is calculated based on the calculated wiring impedance 値, The voltage 値 of the power supply voltage is increased only by the calculated voltage drop 値. The power supply voltage from the power supply voltage adding section is output from the power supply voltage output terminal, and is supplied to the driving 1C adjacent to the downstream side through the connection wiring. According to such a configuration, the power supply voltage increased by the voltage drop due to the wiring impedance can be supplied to the drive 1C for the downstream side. In addition, according to the display device of the first aspect of the present invention, since the power supply voltage for driving each IC is supplied at an appropriate voltage, the malfunction of the driving IC can be prevented and the display device can operate normally. In addition, since the display power supply voltage is supplied to each driving 1C at an appropriate voltage, it is possible to supply appropriate driving signals to the display panel from each driving 1C, thereby reducing display unevenness such as grayscale level deviation, etc. It is possible to improve the display quality of the display device. According to the second aspect of the present invention, since the image data signal processed in the predetermined driving IC is an unnecessary signal for other driving 1C, the image data signal output from the driving 1C is driven every time it is driven. It will be reduced when using 1C, so even if there is an image data signal wiring extending from a -20-200540787 end drive circuit to the other end drive circuit along the edge of the display panel, the figure can be greatly reduced. Like the information letter EMI generation. Further, in the second aspect, since the image data signal corresponding to the inputted initial pulse for the source driving is outputted to the board, it is possible to pass other image data other than the figure number corresponding to the initial pulse. The signal is output to the adjacent 1C, so that the required image data signal can be easily output to the adjacent φ1C, and only the required image data signal can be selected through a simple switching circuit. In addition, according to the third aspect of the present invention, since the series connection group of the series connection circuit is divided into two at the central portion, the length of each series connection group that is opened, and the signal from the front path and the like are separately supplied to the clamps. The two adjacent lines are separated, so that the voltage drop of each series connection group until the separation is reduced while the respective voltage drops are actually the same. ^ As the most prominent place in the center of the LCD panel The phenomenon of unevenness can be reduced while the display unevenness at the peripheral edges is reduced. In addition, the two drive circuits connected to the control circuit are adjacent to each other, so that it can be connected with one FPC to two short FPC circuits, and the wiring can be easily connected. Furthermore, in the above-mentioned method, since the control circuit is connected to the driving circuit in the division, it is possible to make the control circuit board smaller without extending the wiring all the way to the end of the liquid plate. In addition, the serial connection group connected to a plurality of driving circuits is divided into 1C caused by a long drawing number in the central part, and the processing is performed on the display surface image data. The driving selection and output are connected to a plurality of drivers to shorten the segmentation control. Electricity is driven by the electric end so that the display unevenness can be eliminated and the electric power can be separated and controlled; the adjacent two-crystal display surface is connected to two series-connected images due to two parts in series, -21-200540787, respectively. The data signal is reduced by half, so the EMI is also reduced. In this case, if the series connection group in which the drive circuits are connected in series is divided into two parts at the center, the signals from the control circuit are respectively supplied to the driving 1C for the two drive circuits that are adjacent to each other by sandwiching the above-mentioned divisions. Because the signals supplied to one drive circuit are in the forward order and in the other direction are the reverse order, normal image display cannot be performed in the other direction, but the The order of sending the signals of the g driving circuits is reversed, and normal image display can be performed. Furthermore, by using a timing controller composed of a line memory and a bidirectional switch for driving the bus, it is possible to set the transmission order of the signals supplied to the other driving circuit in the reverse direction with a simple structure. [Embodiments] Hereinafter, embodiments of a liquid crystal display device according to the present invention will be described in detail with reference to the drawings. However, the embodiment shown below is only an example of a liquid crystal display device as a display device for embodying the technical idea of the present invention, and the present invention is not specific to the liquid crystal display device. The same can be applied to a plasma display device or the like using a plasma display panel. In the following description, the same constituent elements as those of the liquid crystal display device of the previous example shown in FIGS. 9 to 10 are given the same reference numerals for explanation. [Embodiment 1] Since the general configuration of the liquid crystal display device 1A of Embodiment 1 is mostly the same as that of the liquid crystal display device 1 of the previous example shown in FIG. 9, '-22-200540787 is adopted. The liquid crystal display device 1 A of the first embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing a connection relationship between a liquid crystal display panel and a source driving circuit constituting the liquid crystal display device 1 A of the first embodiment, and FIG. 2 is a view showing a configuration of a driving IC including the source driving circuit. Block diagram. As shown in FIG. 9, the liquid crystal display device 1A of the first embodiment includes a liquid crystal display panel 2, a control circuit 3 disposed on a peripheral edge portion of the liquid crystal display panel 2, and a plurality of drive circuits ST1 to ST6 and GT1 . The liquid crystal display panel 2 is, for example, an active matrix type liquid crystal display panel using a TFT. An active matrix liquid crystal display panel using a TFT is configured by interposing a liquid crystal layer between an active matrix substrate and an opposing substrate. In the active matrix substrate, a plurality of picture elements are arranged in a row with a transparent substrate such as glass. The electrodes are respectively provided with TFTs as switching elements; in the counter substrate, a sheet of a common electrode is formed on substantially the entire surface of the transparent substrate. On an active matrix substrate, a plurality of gate signal lines that are parallel to each other and a plurality of source signal lines that are orthogonal to and parallel to each other are formed on a transparent substrate, and the gate signal source and the source signal lines are formed on the transparent substrate. A pixel electrode and a TFT are formed in the divided rectangular area. The drain of the TFT is connected to the picture element electrode, the gate is connected to the gate signal line, and the source is connected to the source signal line. On the one hand, the gate signal line is formed such that one end thereof extends to a peripheral edge portion on one side of the transparent substrate, and the one end portion becomes an input terminal. In addition, the source signal line also has one peripheral edge portion extending to one side of the transparent substrate, and this end portion becomes an input terminal. Moreover, since the gate signal line and the source signal line are formed in mutually orthogonal directions as described above, the peripheral edge portion of one side formed by the input terminal of the gate signal line is shaped like the input terminal of the source signal line. -23- 200540787 As shown in FIG. 9, the peripheral edge portion of one side side is adjacent to the positional relationship on the transparent substrate. Source input circuits s T 1 to ST 6 are connected to the input terminals of the source signal lines (when collectively referred to, the reference numeral "ST" is used). The source driving circuit ST is composed of TCP. For example, the source driver circuit ST1 is configured by forming a large number of signal wirings while mounting the driving IC SD1 on the flexible substrate SB1. The signal wiring includes a plurality of source signal outputs for supplying a source signal (a display voltage applied to a graphic element) output from the driving IC SD1 to an input terminal of the source signal p line. wiring. The source driving circuit ST 1 and the liquid crystal display panel 2 are connected by sandwiching an anisotropic conductive film and performing thermal compression bonding, so that the source signal output wiring and the input terminal of the source signal line are electrically connected. The other source driving circuits ST2 to ST6 'are the same as the source driving circuit ST1 in the structure and connection relationship with the liquid crystal display panel 2. In addition, a gate drive circuit GT1 is connected to an input terminal of the gate signal line. In Fig. 9, only one gate driving circuit GT1 is shown, but a plurality of gate driving circuits are actually connected. The gate driving circuit G T 1 is composed of T C P. Specifically, while the driving ICGD 1 is mounted on the flexible substrate GB1, a large number of signal wirings are formed. The signal wiring 'includes a plurality of gate signal output wirings for supplying a gate signal (on / off voltage of the TFT) output from the driving ICGD1 to an input terminal of the gate signal line. The gate driving circuit GT1 and the liquid crystal display panel 2 'are connected by sandwiching an anisotropic conductive film and performing thermal compression bonding, so that the gate signal output wiring and the gate signal input terminal are electrically connected. For other gate driving circuits not shown in the figure, the structure and connection relationship with the liquid crystal display surface -24- 200540787 board 2 are the same as those of the gate driving circuit GT 1. In this manner, a plurality of driving circuits ST1 to ST6 and GT1 are connected to the peripheral edge portion of the liquid crystal display panel 2. These drive circuits ST1 to ST6 and GT1 operate based on various power supply voltages, image data, and control signals supplied from the control circuit 3. The control circuit 3 is formed by forming a control IC 5, a power supply circuit 6, and a large number of signal wirings on a substrate 4. The control circuit 3 is connected to the liquid crystal display panel 2 via a signal supply F PC (F1 e X i b 1 e P r i n t c d c i r c u i t: flexible wiring substrate) 7. The control IC 5 outputs image data displayed on the liquid crystal display panel 2 or control signals for controlling the drive circuits S T 1 to S T6 and GT 1. In addition, the power supply circuit 6 generates and outputs various power supply voltages, such as analog power supply voltages constituting the driving power supplies for ICSD1 to SD7 and GDI, or gray power supply voltages for performing grayscale display of the liquid crystal display panel 2. Various signals including image data, control signals, and various power supply voltages output from the control circuit 3 are supplied to the liquid crystal display panel 2 via the signal supply FPC7. On the peripheral edge portion of the liquid crystal display panel 2, connection wirings for connecting the signal supply FPC7, the source driving circuit ST1, and the gate driving circuit GT1 are formed, and simultaneously adjacent driving circuits are formed. Wiring for connection. In this way, various signals supplied from the control circuit 3 are sequentially transmitted from the source driving circuit ST1 to the adjacent source driving circuits ST2 to ST6, as shown in FIG. In addition, although not shown in FIG. 9, the gate driving circuit is the same as the source driving circuit ST, and various signals supplied from the control circuit 3 are driven from the gate driving circuit GT 1 to the adjacent gate driving. The circuits are transmitted in sequence. In the first embodiment, for the liquid crystal display device 1 A having such a structure, -25- 200540787 is driven with respect to the source driving circuit STi (i = 1 to 6) on the upstream side in the supply voltage supply direction, ICSDi, A wiring for calculating a wiring impedance is formed, which is basically equivalent to a signal wiring from the driving ICSDi to the driving ICSDi + 1 of the driving circuit STi + 1 adjacent to the downstream side of the power supply voltage supply direction. Equivalent means that the formation state is the same. Specifically, the same material is used, and the length, width, and thickness are basically the same, or it is not limited to using the same material or length, width, and thickness. . φ The ICSDi for current-side driving is configured to calculate a wiring impedance 値 by applying a calculation voltage to one end of the wiring impedance calculation wiring and detecting the voltage at the other end, and calculate a voltage based on the calculated wiring impedance 値. When the voltage drops, the power supply voltage corresponding to the calculated voltage drop will be increased and output to the downstream drive circuit STi + 1. Next, the wiring for calculating the wiring impedance and the ICSDi for driving will be described. FIG. 1 is a top-diagram view for explaining the connection relationship between the liquid crystal display panel 2 and the source driving circuit STi in the liquid crystal display device 1A of the first embodiment. The source driving circuit STi has a structure in which a large number of signal wiring groups Ai, Bi, Ci, Di, Ei, and signal wiring Rai, Rci are formed while the driving ICSDi is mounted on a rectangular flexible substrate SB i. . Furthermore, although the signal wiring group and the signal wiring are formed on the surface side (inside) facing the liquid crystal display panel 2, the flexible substrate SBi is opposite to the surface facing the liquid crystal display panel 2 in FIG. 2 for easy understanding. The signal wiring is described on the side (front side), and the mounting position of the ICSDi for driving is indicated by a two-dot chain line. On the flexible substrate SB i, power supply voltage input wiring groups A i, -26- 200540787 control signal input wiring group Bi, source signal output wiring group Ci, control signal output wiring group Di, and power supply voltage are formed. Output wiring group Ei. Further, on the flexible substrate S B i, a voltage output-side wiring Rai and a detection voltage input-side wiring Rci constituting the wiring impedance calculation wiring Ri are also formed. In the flexible substrate SBi, one side of the two long sides is a connection portion for connection to the liquid crystal display panel 2. The power supply voltage input wiring group Ai is formed as a power supply voltage input terminal from the aforementioned connection portion to the driving ICSDi. The control signal input wiring group Bi is formed from the aforementioned connection portion to the control signal input terminal of the driving ICSDi. The source signal output wiring group Ci is formed from the source signal output terminal of the driving ICSDi to the aforementioned connection portion. The control signal output wiring group Di is formed from the control signal output terminal of the driving ICSDi to the aforementioned connection portion. The power supply voltage output wiring group Ei is formed from the power supply voltage output terminal of the driving ICSDi to the aforementioned connection portion. The calculation voltage output-side wiring Rai is formed from the calculation voltage output terminal of the driving ICSDi to the aforementioned connection portion. The detection voltage input-side wiring Rci is formed as a detection 0 terminal from the aforementioned connection portion to the driving ICSDi. On the one hand, a source signal input terminal group Hi formed so as to extend a source signal line to an end portion is disposed on the peripheral edge portion of the liquid crystal display panel 2 and the periphery of the liquid crystal display panel 2 as described above. A source driving circuit STi is connected to the edge portion so that the source signal output wiring group Ci and the source signal input terminal group Hi of the flexible substrate SBi overlap and are connected. In addition, on the peripheral edge portion of the liquid crystal display panel 2, connection wiring groups Fi and Gi for connecting the source driving circuit STi and the source driving circuit STi-1 adjacent to the upstream side of the signal transmission direction are formed. In the shape of -27- 200540787, there are connection wiring groups Fi + 1 and Gi + 1 for connecting the source driving circuit sTi and the source driving circuit STi + 1 adjacent to the downstream side of the signal transmission direction. The connection wiring group Fi is The connection wiring group 'for control signals' is formed from the connection point of the upstream side source drive circuit STi-1 to the connection point of the source drive circuit STi. Specifically, the control signal connection wiring group Fi is from a position overlapping the control signal output wiring group Di-1 of the upstream source drive circuit S Ti-1 to the control signal input for the source drive circuit STi. The positions where the wiring $ group Bi overlaps are approximately U-shaped. The connection wiring group Gi is a connection wiring group for a power supply voltage, and is formed from a connection point of the upstream side source driving circuit STi-1 to a connection point of the source driving circuit STi. Specifically, the power supply voltage connection wiring group Gi ranges from a position overlapping the power supply voltage output wiring group Ei-1 of the upstream source drive circuit STi-1 to the power supply voltage input wiring of the source drive circuit STi. The positions where the groups Ai overlap are approximately U-shaped. In addition, the connection wiring group Fi + 1 is a connection wiring group for control signals, and is formed from a connection point of the source driving circuit STi to a connection point of the downstream-side source driving circuit STi + 1. Specifically, the control signal connection wiring group Fi + 1 is from the position overlapping with the control signal output wiring group Di of the source drive circuit STi to the control signal input wiring of the downstream source drive circuit STi + 1. The positions where the groups Bi + 1 overlap are approximately U-shaped. The connection wiring group Gi + 1 is a connection wiring group for a power supply voltage, and is formed from a connection point of the source driving circuit STi to a connection point of the downstream-side source driving circuit STi + 1. Specifically, the power supply voltage connection wiring set Gi + 1 ranges from a position -28- 200540787 which is overlapped with the power supply voltage output wiring set Ei of the source drive circuit STi, to a power supply that is connected to the downstream source drive circuit STi + 1. The positions where the voltage input wiring groups Ai + 1 overlap are formed substantially in a U shape. Further, on the peripheral edge portion of the liquid crystal display panel 2, a panel-side wiring Rbi constituting a wiring impedance calculation wiring Ri is formed. The panel-side wiring Rbi surrounds the peripheral edge of the liquid crystal display panel 2 from a position overlapping with the voltage output-side wiring Rai of the source driving circuit STi to a position overlapping with the detection-voltage input-side wiring Rci of the source driving circuit STi.部 而 形成。 Formed. The wiring impedance calculation wiring Ri is composed of a calculation voltage output-side wiring Rai, a _ panel-side wiring Rbi, and a detection voltage input-side wiring Rci. The wiring impedance calculation wiring Ri is made of the same material as the signal wiring for the driving ICSDi + 1 from the driving ICSDi to the driving circuit STi + 1 adjacent to the downstream side of the power supply voltage supply direction, and the length, width, and thickness are also the same. Formed in much the same way. By forming the wiring group and wiring as described above, the source driving circuit STi is connected to the peripheral edge portion of the liquid crystal display panel 2. At this time, the control signal and the power supply voltage output from the upstream source driving circuit STi-1 are controlled by the control The signal connection wiring group Fi and the power supply voltage connection wiring group Gi are supplied to the source driving circuit STi. The control signal and the power supply voltage output from the source driving circuit STi are supplied to the downstream-side source driving circuit STi + 1 via the control signal connection wiring group Fi + 1 and the power voltage connection wiring group Gi + 1. Such sequentially transmitted control signals include an operation clock signal or image data of the driving IC S D i. In addition, the sequentially transmitted power supply voltage includes an analog power supply voltage which becomes an operating power supply of an analog circuit inside the driving IC S Di, or a plurality of gray-scale power supply voltages which are different from each other. Multiple gray-scale power supply voltages, when performing gray-scale display on the liquid crystal display panel 2 'Select any one or two voltages based on image data, and based on the ladder impedance inside the driving IC SDi, a predetermined voltage is used as the source The polar signals are supplied to the liquid crystal display panel 2. The driving ICSDi of the source driving circuit STi operates with a supplied analog power supply voltage as an operating voltage, performs predetermined control processing based on a control signal such as a clock signal or display data, and outputs the source signal to the liquid crystal display panel 2. φ In addition, the driving IC SDi outputs the calculation voltage to one end of the wiring impedance calculation wiring Ri and detects the voltage at the other end to calculate the wiring impedance 値. Based on the calculated wiring impedance 値, the voltage drop 値 is calculated. The voltage drops, the corresponding voltage is raised, and the power supply voltage rises to the downstream source driving circuit STi + 1 output. The output power supply voltage is supplied to the drive of the downstream source driving circuit STi + 1 through the power supply voltage output wiring group Ei on the flexible substrate SB i and the power supply voltage connection wiring group Gi + 1 on the liquid crystal display panel 2. Use 1C. Next, a configuration example of the driving IC SDi will be described. Fig. 2 is a block diagram showing the structure of the ICSDi for driving. Fig. 2 shows a structure for calculating the wiring impedance 値 and a structure for calculating the voltage 电源 of the power supply voltage, and the structure for the display control of the liquid crystal display panel 2 originally performed by the driving ICSDi is omitted. The analog power supply voltage from the power supply circuit 6 of the control circuit 3 or the high-side drive ICSDi-1 is input to the analog power supply voltage input terminal Π, and the gray power supply voltage is input to the gray power supply voltage input terminal 12. The analog power supply voltage is used as the working power supply for the analog circuit inside the IC. The analog power supply voltage is supplied to a plurality of modules including a signal generating circuit that generates a source signal of -30-200540787 to the analog power supply voltage adding section 13 and wiring. Electricity calculation unit 14 for impedance calculation. In addition, the gradation power supply voltage is supplied to the generation source signal generation circuit, and also to the gradation power supply voltage adding section, the wiring impedance calculation voltage generation section 14 generates a calculation voltage for calculating the cloth, and supplies it. To the calculation voltage output terminal 16. One end of the wiring impedance calculation cloth is connected to the voltage output terminal 16. The calculation voltage to which the calculation voltage output side wiring Rai is connected is supplied to the wiring impedance calculation wiring Ri. Wiring resistance ® The other end of the wiring Ri is precisely the detection voltage input side wiring end, which is connected to the detection terminal 17 and the detection voltage output from the other end of the wiring impedance calculation cloth is input to the detection terminal. 1 7. The detection voltage input to the detection terminal 17 is supplied to the wiring impedance 18. The calculation supplies to the calculation voltage output terminal 16 are supplied to the wiring impedance calculation unit 18. The wiring impedance calculation unit 18 calculates the wiring impedance 用 using the difference between the voltage 値 of the voltage and the voltage 値 of the detected voltage, and the basis difference. The calculated wiring impedance 値 is supplied to the power supply voltage adding section 13 and the gray-scale power supply voltage adding section 15. The analog power supply voltage adding unit 1 3 is based on the supplied wiring impedance 値 the voltage drop due to the wiring impedance 値 (voltage drop 値).値 (increase the voltage 値). The added (increase) analog power supply voltage is supplied to the analog voltage auxiliary output terminal 19. The source power supplied to the analog power supply voltage output terminal 19: M ′ is supplied to the source drive circuit sTi + 1 on the downstream side, and the voltage generation number is also provided. The line impedance is calculated! The end of Ri is calculated. The voltage of the calculation part of the I Ri of Rci is also calculated by calculating the analog value, and the calculation is performed from the voltage 値 voltage 値 power supply electric analog electric drive -31- 200540787 ICSDi + 1. In addition, the gray-scale power supply voltage adding unit 15 calculates a voltage 値 (voltage drop) caused by the voltage drop due to the wiring impedance based on the supplied wiring impedance 値, and supplies the gray-scale power supply voltage from the gray-scale power supply voltage input terminal 12 Only the calculated voltage drop 値 (increased voltage 値) is added to the voltage 値, and the (increased) gray power supply voltage added to the voltage 値 is supplied to the gray power supply voltage output terminal 20. The gradation power supply voltage supplied to the gradation power supply voltage output terminal 20 is supplied to the driving ICSDi + 1 of the source drive circuit STi + 1 on the downstream side. Also, in FIG. 3, only one gradation is shown. Power supply voltage input terminal 12, gray-scale power supply voltage adding unit 15, and gray-scale power supply voltage output terminal 20 '. However, since a plurality of gray-scale power supply voltages different from each other are supplied to the driving ICSDi as described above, each of them corresponds to each of the gray-scale power supply voltages. The gradation power supply voltage 'is provided with a gradation power supply voltage input terminal 12, a gradation power supply voltage adding section 15, and a gradation power supply voltage output terminal 20. As described above, in the liquid crystal display device 1A, the driving ICSDi of the source driver circuit STi uses the power calculated by the wiring impedance calculation wiring Ri; the voltage drops, the voltage rises, and the power supply voltage increases toward the downstream source. The pole driving circuit STi + 1 is output. The output power supply voltage passes through the power supply voltage output wiring group on the flexible substrate SBi constituting the source @ P 动 电路 ST1. Ei 'The power supply voltage connection wiring group Gi + 1 for the liquid crystal display panel 2 and the downstream side drive circuit STi + The power source voltage input wiring group Ai + 1 of i is supplied to the driving ICSDi + 1 of the downstream driving circuit STi + 1. In total, although the power supply voltage to the ICSDi + i for downstream driving is reduced by the wiring, the voltage 预先 is only increased by the voltage before the output from the ICSDi -32- 200540787 for the upstream driving.所以, so the power supply voltage supplied to the downstream driving IC SDi + 1 becomes the voltage 使得 required for the driving 1C to operate normally. Accordingly, since a power supply voltage of an appropriate voltage 値 is supplied to each of the downstream driving ICs SDi + 1, it is possible to prevent a malfunction of the driving IC SD. This allows the liquid crystal display device 1A to operate normally. In addition, in the liquid crystal display device 1A, since the wiring impedance calculation wiring Ri is formed so as to return from the flexible substrate SBi constituting the source driving circuit STi via the liquid crystal display panel 2 to the flexible base 0 board SB i, The wiring impedance calculation wiring Ri can be formed under conditions substantially equivalent to the signal wiring from the driving IC SDi to the downstream source driving IC SDi + 1. In other words, the wiring for the power supply voltage between the driving ICSDi and the downstream driving ICSDi + 1 is divided into the power supply voltage output wiring group Ei on the flexible substrate SBi of the source driving circuit STi, and the liquid crystal display panel 2 There are three types of wirings for the power supply voltage connection wiring group Gi + 1 and the power supply voltage input wiring group Ai + 1 on the flexible substrate SBi + 1 of the downstream source driving circuit STi + 1. On the other hand, the wiring Ri for wiring impedance calculation is formed so that the flexible substrate SBi constituting the source driving circuit STi is returned to the flexible substrate SBi via the liquid crystal display panel 2 and is also divided into flexible substrates. Three types of wirings for calculation of voltage output-side wiring Rai on SBi, panel-side wiring Rbi on liquid crystal display panel 2, and detection-voltage input-side wiring Rci as second wiring on flexible substrate SBi . Further, the calculation voltage output side wiring Rai corresponds to the power supply voltage output wiring Ei on the flexible substrate SBi of the source driving circuit STi. The panel side wiring Rbi on the liquid crystal display panel 2 corresponds to -33 on the liquid crystal display panel 2. -200540787 The connection wiring group Gi + 1 for power supply voltage, and the detected voltage input wiring RC1 corresponds to the power supply voltage input wiring group Ai + 1 on the flexible substrate SBi of the downstream source drive circuit STi + 1. Accordingly, the wiring impedance calculation wiring Ri can be formed under conditions substantially equivalent to the signal wiring from the driving ICSDi to the downstream driving ICSDi + 1. In this way, the wiring impedance 求 and voltage drop 値 of the signal wiring from the driving IC S D i to the downstream driving IC S D i + 1 can be obtained with high accuracy. However, the material, length, width, and thickness of the signal wiring between the 'driving IC SDi and the downstream driving IC SDi + 1 are predetermined in the design stage of the liquid crystal display device 1A. Therefore, a method can be adopted in which the signal wiring of the material, length, width, and thickness determined in the design stage is separately prepared and the wiring impedance 値 is measured, and the obtained wiring impedance 値 is stored in a memory, and the stored wiring The impedance 値 is used to calculate the voltage drop 値, and only the calculated voltage drop 値 is added to the analog power supply voltage and the gray-scale power supply voltage. However, this method is not preferable because it easily causes the following problems. First, since the liquid crystal display panel 2 and the source driving circuit ST are connected by sandwiching an anisotropic conductive film and thermocompression bonding, a crimping resistance is generated at the connection portion. Therefore, it is difficult to take into account the influence of the crimping resistance in the signal wiring produced separately, and the wiring impedance 不能 cannot be accurately measured.
第2，雖然信號佈線的材料、長度、寬度、厚度是在液 晶顯示裝置1 A的設計階段中預先決定的，但在實際製造液 晶顯示面板2或源極驅動電路S T時，信號佈線的長度、寬 度、厚度分別存在公差，而產生製造上的偏差。從而，由 於另外製成的信號佈線和實際上製造的液晶顯示裝置1 A -34- 200540787 中的信號佈線之間的長度、寬度、厚度並不可能變得完全 相同的，所以另外製成的信號佈線中，存在不能測量正確 的佈線阻抗値的問題。 第3，記憶體中存儲有預先測量的佈線阻抗値的場合， 記憶體的配置處成爲一個問題。首先，將記憶體設置在驅 動用1C的外部的情況中，由於需要增加新的部件，而成爲 提高成本的要因。此外，將記憶體設置在驅動用1C的內部 的情況中，也是由於增加了新的部件，而成爲提高成本的 $ 要因。而且，如果利用驅動用1C內的已有的記憶體的話， 雖然不會因增加新的部件而導致成本提高，但是由於若液 晶顯示裝置1 A的規格發生變化則其佈線阻抗値的値也發 生變化，所以驅動用1C失去了汎用性，在每一次液晶顯示 裝置1 A的規格發生變化時，不得不製作新的驅動用1C， 同樣成爲提高成本的要因。 根據上述原因，如本實施方式那樣，使用實際在液晶顯 示裝置1 A上製成佈線阻抗算出用佈線Ri來測量佈線阻抗 値的方式，能夠得到正確的佈線阻抗値，能夠對信號佈線 ® 導致的電源電壓的電壓下降進行合適的補償。 此外，在液晶顯示裝置1 A中，驅動用ICSDi的工作用類 比電源電壓和供給到液晶顯示面板2的灰度電源電壓，其 分別只加上由佈線阻抗導致的電壓下降値並供給到驅動用 IC S Di。因此，由於向各個驅動用IC SDi上供給了合適的電 壓値的工作用電源電壓，所以可防止驅動用IC SDi的誤動 作。此外，由於灰度電源電壓以合適的電壓値供給到各個 驅動用ICSDi，所以能夠從各個驅動用ICSDi向液晶顯示面 -35- 200540787 板2分別供給合適的源極信號，能夠降低灰度偏差等的顯 示不均勻現象，提高液晶顯示裝置1 A的顯示品質。 而且，上述的說明中，雖然僅僅對源極驅動電路STi進 行了說明，但對閘極驅動電路GT，也可以以同樣方式實 施。此外，並不限定於液晶顯示裝置1 A，如果是具有在顯 示面板的周圍邊緣部分上並行的連接有多個驅動電路的結 構的顯示裝置，就可以以同樣方式實施。而且，對在液晶 顯示裝置的周圍邊緣部（玻璃基板）上直接安裝驅動用1C 0 的所謂COG ( Chip On Glass )方式的液晶顯示裝置，也能 夠以同樣方式實施。 此外，對控制電路3，與源極驅動電路STi同樣地，也可 以形成佈線阻抗算出用佈線，在從電源電路6輸出電源電 壓的時候，輸出按照電壓下降値的電壓値進行了提高的電 源電壓。 此外，在第1圖所示的結構例子中，雖然將一個信號供 給用FPC與液晶顯示面板2的角部連接，但還可以將另一 個信號供給用FPC與液晶顯示面板2的中間附近處連接。 ® 此外，第2圖中，雖然存在類比電源電壓加算部1 3，但 可以考慮不採用類比電源電壓加算部1 3的結構。該場合， 最好使類比電源電壓具有足夠高的値，使得即使佈線阻抗 中產生電壓下降也不會發生誤動作。 [實施例2] 第3圖是說明本發明的實施例2的液晶顯示裝置1 B的各 個源極驅動用TCP中的各個資料流程動的時間圖。該液晶 顯示裝置1 B具有與如第9圖所示的在先例子的液晶顯示裝 -36- 200540787 置1 A大部分相同的結構’在此爲了使說明簡單’示出了僅 使用4個源極驅動用IC的例子。該液晶顯示裝置與第9圖 所示的在先例子的液晶顯示裝置1 A不同的地方在於’ (1 )各個源極驅動用TCP上的源極驅動用1C的圖像資 料信號用輸入端子，相互不是並聯連接的’在前段的源極 驅動用1C中處理之後的圖像資料信號傳送到鄰接的源極 驅動用1C的圖像資料信號用輸入端子中，以及 (2 )各個源極驅動用1C，對於輸入的圖像資料信號進行 | 與在先例子相同的信號處理，並個別地輸出到與液晶顯示 面板的各個圖元連接的預定的源級信號線的同時，僅將在 輸入的圖像資料信號中沒有處理的圖像資料信號傳送到鄰 接的源極驅動用1C中。 而且，對應於這些圖像資料的脈衝信號，本來，是由與 源極驅動用ICSD1〜SD4分別連接的液晶面板的源極線的 條數對應的數目的脈衝序列構成的，但在第3圖中爲了說 明的容易，將每個對應於各個資料a〜d的脈衝信號用單獨 _ 的脈衝表示。換句話說，從外部電路基板3的控制用1C 5 得到的一個掃描期間中的連續的圖像資料信號a〜d，經由 信號供給佈線7、撓性佈線基板FPC以及連接佈線L i輸入 到設置在最初的TCP上的源極驅動用ICSD1。然後，源極 驅動用ICSD 1，相應於輸入到其中的初始脈衝而對圖像資 料信號a進行處理’將圖像資料信號輸出到與液晶顯示面 板2的各個圖元連接的預定的源極信號線，同時，該圖像 資料信號a是其他的源極驅動用ic中不需要的信號，因此 將該源極驅動用IC S D 1中沒有被處理的剩下的圖像信號b -37- 200540787 〜d傳送到鄰接的源極驅動用i c s D 2中。 源極驅動用IC S D 2中，相應於輸入到其中的初始脈衝而 以同樣方式對圖像資料信號b進行處理，將圖像資料信號 輸出到液晶顯示面板2的源極信號線，同時，由於該圖像 資料信號b也是其他的源極驅動用iC中不需要的信號，所 以將該源極驅動用IC S D 2中沒有被處理的剩下的圖像信號 c和d傳送到鄰接的源極驅動用iCSD3，然後，對源極驅動 用IC SD 3和SD4也依次以同樣方式進行處理。 p 根據這樣的結構的技術方案，使得成爲連接佈線Li流過 圖像資料信號a〜d，而連接佈線l2流過圖像資料信號b〜 d ’連接佈線L3流過圖像資料信號c和d，進而連接佈線L4 僅流過圖像資料信號d的狀態。因此，採用第9圖所示的 在先的信號傳送方式的液晶顯示裝置1 A的連接佈線L〜 乙6中全部流過圖像資料信號，但由於流過本實施例的連接 佈線L!〜L4的圖像資料信號依次減少，所以連接佈線從L ^ 〜L4產生的EMI大量減少。 g 這裏，對本實施例中使用的源極驅動用I c的具體例子用 第4圖進行說明。而且，第4圖是用於說明本發明中使用 的源極驅動用IC的內部電路結構的方塊圖。該源極驅動用 IC與在先的源極驅動用I c相同，具備移位寄存器6 3、資 料鎖存器64、資料寄存器65、鎖存器66、電平轉換器67、 灰度電壓產生電路68、D/A轉換器69、輸出電路70之外， 作爲獨自的結構’還具備從輸入的圖像資料選擇預定的圖 像資料輸出到下一階段的圖像資料輸出控制電路7 1。 移位寄存器63與時鐘信號同步進行移位元工作，選擇基 -38 - 200540787 於輸入的預定的初始脈衝對圖像資料進行採樣的位元’ 料鎖存器64將輸入的圖像資料暫時地儲存並送出到資 寄存器65。資料寄存器65，根據來自移位寄存器63的 示，在從資料鎖存器64時間上分割的輸入的圖像資料中 對預定的圖像資料進行採樣並送出到鎖存器66。鎖存器 中相應於選通輸入將資料寄存器65的資料打包鎖存’並 出到電平轉換器67。電平轉換器67中，將鎖存的資料轉 成類比電路部電源電平並送出到D/A轉換器69。灰度電 0 產生電路68將從外部輸入的標準電壓根據內部階梯阻 進行阻抗分配，產生7校正的電壓，送出到D/A轉換器69 D/A轉換器69,基於來自灰度電壓產生電路68的/校正 壓將從電平轉換器67輸入的數位圖像信號轉換成類比 號，送出到輸出電路70。輸出電路70，是由OP放大器 輸出緩存構成的電壓跟隨電路（voltage follow )，向液 驅動用輸出端子輸出類比信號。 一方面，圖像資料輸出控制電路7 1，在根據移位寄存 63所指示的時間，在資料鎖存器64鎖存的圖像資料中， ® 沒有存儲在資料寄存器65中的圖像資料信號向鄰接的 極驅動用IC輸出。該場合，前述圖像資料輸出控制電 7 1 ’可以用在向前述源極驅動用1C輸入初始脈衝的期間 通過圖像資料信號，在沒有向前述源極驅動用IC輸入的 始脈衝的期間通過前述圖像資料信號的開關電路這樣的 單電路構成。 因此’本實施例中使用的源極驅動用1C，由於通過在 入的圖像資料信號之中，將除了處理的圖像資料信號之 資 料 指 ’ 66 送 換 壓 抗 〇 電 信 和 晶 器 將 源 路 不 初 簡 輸 外 -39- 200540787 的其他圖像資料信號送出到鄰接的下一個源極驅動用IC 的方式，向多段地串聯連接的源極驅動用1C中送出的是依 次減少了資料量的圖像資料信號，所以即使圖像資料信號 佈線很長也由於隨著遠離圖像資料信號的輸入端部圖像資 料信號量依次減少，因此EMI的產生大幅度地減少。 〔實施例3〕 第5圖是表示本發明的實施例3的液晶顯示裝置1 C的槪 略的俯視圖，第6圖是表示第5圖的信號DATA 1〜DAT A 3 I 之間的時間的時間圖。該液晶顯示裝置1，與第9圖所示 的在先例子的液晶顯示裝置1具有大部分相同的結構，不 同之處在於， (1 )將串聯連接的多數N個（N>2。這裏N = 6 )的TCP 的串聯連接組在中央部分分割成2部分，換句話說分成由 源極驅動電路ST1〜ST3形成的3個TCP構成的串聯連接 組，和由源極驅動電路ST4〜ST6形成的3個TCP構成的 串聯連接組，在分開處鄰接的各個驅動電路ST3和ST4分 別通過在FPG和FPC2上形成的信號等的供給線7以及7’ ^ 與控制電路基板3連接，以及， (2)設置在控制電路基板3上的控制用IC5具備介面 5 1、由匯流排驅動器的方向開關構成的定時控制器52和線 路記憶體5 3。 換句話說，在第9圖所示的在先例子的液晶顯示裝置1 中，從PC等的圖像資料信號產生裝置送出的圖像信號，如 第6圖的DATA1所示，分別作爲對應源極驅動用ICSD1〜 SD6的對應資料1〜6的脈衝信號而傳送過來。然後，對應 -40- 200540787 xa些貝料1〜6的脈衝丨g號，通過並未另外在圖中表示的時 間脈衝進行控制’比如，對應資料1的脈衝信號向源極驅 動用ICSD1、對應資料2的脈衝信號向源極驅動用ICSD2 xa t永地依次供給’向對應各個源極驅動用I c s D 1〜s D 6的液 晶顯示面板2的各個圖元的源極線路依次供給。而且，對 應這些資料1〜資料6的脈衝信號，本來，應該是由對應 各個源極驅動用ICSD1〜SD6連接的液晶面板的源極線路 的條數的數量的脈衝序列構成的信號，但爲了在第6圖中 φ 容易進行說明，將對應各個資料1〜6的每個脈衝信號都用 單獨的脈衝表示。 當將這樣的第6圖的DATA1所示的信號原樣輸入到本實 施例的液晶顯示裝置1C的時候，相對源極驅動用ICSD4〜 S D 6是以正確的順序傳送過來的，但相對源極驅動用I c s D j 〜S D 3是以相反的順序傳送過來的。即，對於源極驅動用 ICSD4〜SD6來說，對應資料4的脈衝信號向源極驅動用 ICSD4，對應資料5的脈衝信號向源極驅動用ICSD5，對應 $ 資料6的脈衝信號向源極驅動用ICSD6，這樣依次按照正 確的順序供給，因此液晶顯示裝置的左右任意一半能夠正 常地顯示。然而，對於源極驅動用IC S D 1〜S D 3來說，對應 資料1的脈衝信號向源極驅動用ICSD3，對應資料2的脈 衝信號向源極驅動用ICSD2，對應資料3的脈衝信號向源 極驅動用IC S D 1，這樣以相反的順序供給，使得液晶顯示 裝置至少左右的任意一半不能夠正常地顯示。 在此，本實施例中，作爲設置在控制電路基板3上的控 制用IC 5，使用具有介面5!、由匯流排驅動器的方向開關 -41- 200540787 構成的定時控制器52和線路記憶體53的控制用IC ’ 一旦 從PC等的圖像資料信號產生裝置8傳送過來的圖像資料信 號DATA1通過定時控制器52讀取到線路記憶體53,然後， 通過定時控制器52，相對源極驅動用ICSD4〜SD6，如第6 圖的DATA2所示，以正確的順序，即以資料4、資料5、 資料6的順序經由FPC i的信號等的供給線7輸出到源極驅 動用ICSD4，此外，相對源極驅動用ICSD1〜SD3，如第6 圖的DAT A3所示，以相反的順序，即以資料3、資料2、 g 資料1的順序經由FPC2的信號等的供給線7 ’送出到源極驅 動用ICSD3。 這樣，由於相對源極驅動用ICSD1〜SD3，對應資料1的 脈衝信號向源極驅動用IC SD 1，對應資料2的脈衝信號向 源極驅動用ICSD2，對應資料3的脈衝信號向源極驅動用 ICSD3正確地供給，所以能夠在液晶顯示面板2的整個畫 面範圍內正常地顯示。 而且，對於由匯流排驅動器的方向開關構成的定時控制 器5 2，相對源極驅動用IC S D 4〜S D 6以正確的順序送出資 ® 料的電路，是作爲順序電路（queue )(稱爲先進先出/first in first out ( FIFO ))而公知的電路，此外，相對源極驅動 用ICSD1〜SD3以相反的順序送出資料的電路，也是作爲堆 疊電路（stack)(稱爲先進後出/first in last out (FIL0)) 在本領域的人員中所公知的電路。 另外，本實施例中，由於液晶顯示面板2的串聯連接多 個TCP的串聯連接組在中央部分被分成2個部分，所以縮 短了分成的各個串聯連接組的長度，而且，來自前述控制 -42- 200540787 用IC5的信號等分別供給到夾持分開處而鄰接的 驅動用ICSD3和SD4 ’因此減少了直到分開的各 接組的端部的源極驅動用1 C S D 1和S D 6的電壓下 其電壓下降量實際上變得相等，由此避免了在最 所的液晶顯示面板2的中央部中產生顯示不均勻 且減少了周圍邊緣部中產生顯示不均勻的現象。 尤其，由於控制用IC5與在分開處鄰接的2個 用IC S D 3和S D 4連接，所以不需要用將佈線延伸 示面板2的端部，因此能夠使電路基板3變小。 ® 於串聯連接的多個TCP的串聯連接組在中央部分 部分，所以向2個串聯連接組供給的資料信號，： 的資料2和資料3所示，減少了一半，而且，該 半的資料信號，最晚也要在下一個掃描期間內傳 所以能夠放大脈衝的振幅，同樣大幅度地減少了 而且，本實施例3中，雖然示出了如下裝置， 晶顯示裝置1 C的控制電路基板3上配置的控制用 用具有介面5 i、由匯流排驅動器的方向開關構成 ® 制器5 2和線路記憶體5 3的控制用IC，相對驅動 〜SD6以正確的順序送出，此外相對驅動用ICSD1 相反的順序送出，但是，如果在PC等的圖像資料 裝置中使用預先將相對驅動用ICSD1〜SD3的信 方向產生的裝置，那麼也可以使用不特意變化相 ICSD1〜SD3的順序而原樣送出的裝置。此外，本 示出的是作爲連接液晶顯示面板2和控制電路3 I 用了分成FPC,和FPC2這樣的2個的FPC，但爲了 2個源極 個串聯連 降的同時 顯眼的處 的現象而 源極驅動 到液晶顯 另外，由 被分成2 如第6圖 減少了 一 送即可， EMI。 即作爲液 IC5，使 的定時控 用 ICSD4 〜SD3以 信號產生 號向相反 對驅動用 實施例中 的FPC使 縮短兩個 -43- 200540787 FPC之間的距離也可以合成1個FPC。 【圖式簡單說明】 第1圖是表示構成實施例1的液晶顯示裝置的液晶顯示 面板和源極驅動電路的連接關係的俯視圖。 第2圖是表示具備源極驅動電路的驅動用I c的結構的方 塊圖。 第3圖是說明實施例2的液晶顯示裝置中的各個源極驅 動用TCP上的源極驅動用1C中的各個資料的流動的時間 • 圖。 第4圖是用於說明第3圖的源極驅動用1C的內部電路結 構的方塊圖。 第5圖是表示實施例3的液晶顯示裝置的槪略的部分俯 視圖。 第6圖是表示第5圖的信號DATA 1〜DAT A3之間的時間 的時間圖。 第7A圖是TCP方式的液晶顯示裝置的槪略圖，第7B圖 是第7A圖中承載的源極驅動用TCP(或者閘極驅動用TCP) ®的槪略圖。 第8圖是說明第7圖的液晶顯示裝置的各個源極驅動用 TCP上的源極驅動用1C中的各個資料的流動的時間圖。 第9圖是採用信號傳輸方式的在先的液晶顯示裝置的槪 略圖。 第1 0圖是改良了第9圖中示出的信號傳輸方式的液晶顯 示裝置的槪略圖。 -44- 200540787Second, although the material, length, width, and thickness of the signal wiring are predetermined in the design stage of the liquid crystal display device 1A, when the liquid crystal display panel 2 or the source driving circuit ST is actually manufactured, the length of the signal wiring, There are tolerances in width and thickness, respectively, and manufacturing variations occur. Therefore, since the length, width, and thickness between the separately produced signal wiring and the actually produced signal wiring in the liquid crystal display device 1 A -34- 200540787 may not be exactly the same, the separately produced signal In wiring, there is a problem that the correct wiring impedance 値 cannot be measured. Third, when the wiring impedance 测量 measured in advance is stored in the memory, the memory placement becomes a problem. First, in the case where the memory is provided outside the driving 1C, it is necessary to add a new component, which is a factor for increasing the cost. In addition, in the case where the memory is provided inside the 1C for driving, it is also a factor of increasing costs due to the addition of new parts. In addition, if the existing memory in the drive 1C is used, the cost will not increase due to the addition of new components. However, if the specifications of the liquid crystal display device 1 A change, the wiring impedance 値 will also increase. Because of this change, the 1C for driving has lost its versatility, and every time the specifications of the liquid crystal display device 1 A change, a new 1C for driving has to be produced, which has also become a factor for increasing costs. Based on the above reasons, as in this embodiment, the method of actually measuring the wiring impedance 布线 using the wiring Ri for wiring impedance calculation on the liquid crystal display device 1 A can accurately obtain the wiring impedance 値, which can be caused by the signal wiring ® The voltage drop of the power supply voltage is appropriately compensated. In addition, in the liquid crystal display device 1 A, the analog power supply voltage for driving the ICSDi and the gray-scale power supply voltage supplied to the liquid crystal display panel 2 are respectively added to the voltage drop caused by the wiring impedance and are supplied to the drive. IC S Di. Therefore, an appropriate power supply voltage for the driving IC SDi is supplied to each driving IC SDi, so that it is possible to prevent a malfunction of the driving IC SDi. In addition, since the gray-scale power supply voltage is supplied to each driving ICSDi at an appropriate voltage, the appropriate source signal can be supplied to the liquid crystal display surface -35- 200540787 board 2 from each driving ICSDi, which can reduce gray-scale deviations and the like. The uneven display phenomenon improves the display quality of the liquid crystal display device 1 A. In the above description, only the source drive circuit STi has been described, but the gate drive circuit GT can be implemented in the same manner. In addition, the present invention is not limited to the liquid crystal display device 1A, and a display device having a structure in which a plurality of driving circuits are connected in parallel to a peripheral edge portion of a display panel can be implemented in the same manner. In addition, a so-called COG (Chip On Glass) type liquid crystal display device in which 1C 0 for driving is directly mounted on a peripheral edge portion (glass substrate) of the liquid crystal display device can be implemented in the same manner. In addition, the control circuit 3 may form a wiring for calculating a wiring impedance similarly to the source driving circuit STi. When a power supply voltage is output from the power supply circuit 6, a power supply voltage which is increased in accordance with the voltage drop 値 is output. . In the configuration example shown in FIG. 1, although one signal supply FPC is connected to the corner of the liquid crystal display panel 2, the other signal supply FPC may be connected to the vicinity of the middle of the liquid crystal display panel 2. . ® In addition, although there is an analog power supply voltage addition unit 13 in the second figure, a configuration in which the analog power supply voltage addition unit 13 is not used may be considered. In this case, it is desirable to make the analog power supply voltage sufficiently high so that malfunction does not occur even if a voltage drop occurs in the wiring impedance. [Embodiment 2] Fig. 3 is a timing chart illustrating the flow of data in each source driving TCP of a liquid crystal display device 1B according to Embodiment 2 of the present invention. This liquid crystal display device 1 B has most of the same structure as the liquid crystal display device -36- 200540787 1 A of the previous example shown in FIG. 9. For simplicity of explanation, it is shown that only four sources are used. Example of a pole drive IC. This liquid crystal display device differs from the liquid crystal display device 1 A of the previous example shown in FIG. 9 in that (1) each of the source driving TCPs has 1C image data signal input terminals for source driving, The image data signals processed in the preceding source drive 1C are not connected in parallel to each other and transmitted to the adjacent input drive 1C image data signal input terminals, and (2) each source drive 1C, for the input image data signal | The same signal processing as in the previous example, and individually output to predetermined source-level signal lines connected to each element of the liquid crystal display panel, and only the input image The image data signal that is not processed in the image data signal is transmitted to the adjacent source driving 1C. In addition, the pulse signals corresponding to these image materials are originally composed of pulse sequences of a number corresponding to the number of source lines of the liquid crystal panel connected to the ICSD1 to SD4 for source driving, but in FIG. 3 For ease of explanation, each pulse signal corresponding to each data a to d is represented by a separate pulse. In other words, the continuous image data signals a to d during one scanning period obtained from the control circuit 1C 5 of the external circuit board 3 are input to the setting via the signal supply wiring 7, the flexible wiring board FPC, and the connection wiring L i. ICSD1 was used as the source driver on the original TCP. Then, the ICSD 1 for source driving processes the image data signal a in accordance with the initial pulse input thereto, and outputs the image data signal to a predetermined source signal connected to each picture element of the liquid crystal display panel 2 At the same time, the image data signal a is an unnecessary signal in other source driving ICs, so the remaining image signals b -37- 200540787 which are not processed in the source driving IC SD 1 ~ D is transmitted to the adjacent source driving ics D 2. In the source driving IC SD 2, the image data signal b is processed in the same manner corresponding to the initial pulse inputted thereto, and the image data signal is output to the source signal line of the liquid crystal display panel 2. This image data signal b is also an unnecessary signal in the other source driving iC. Therefore, the remaining image signals c and d which have not been processed in the source driving IC SD 2 are transmitted to the adjacent source. The iCSD3 for driving and the source driving ICs SD3 and SD4 are processed in the same manner in this order. p According to the technical solution of such a structure, the connection wiring Li flows through the image data signals a to d, and the connection wiring 12 flows through the image data signals b to d 'The connection wiring L3 flows through the image data signals c and d In addition, the connection wiring L4 is in a state where only the image data signal d flows. Therefore, all the image data signals flow through the connection wirings L to B of the liquid crystal display device 1 A using the previous signal transmission method shown in FIG. 9, but since the connection wirings L to this embodiment flow through! The image data signals of L4 decrease in sequence, so the EMI generated by the connection wiring from L ^ ~ L4 is greatly reduced. g Here, a specific example of the source driving IC used in this embodiment will be described with reference to FIG. 4. Fig. 4 is a block diagram for explaining the internal circuit configuration of the source driving IC used in the present invention. This source driving IC is the same as the previous source driving IC, and includes a shift register 6 3, a data latch 64, a data register 65, a latch 66, a level shifter 67, and gray voltage generation. In addition to the circuit 68, the D / A converter 69, and the output circuit 70, the image data output control circuit 71 is provided as a unique configuration, which includes a predetermined image data selected from the input image data and output to the next stage. The shift register 63 performs shift element work in synchronization with the clock signal, and selects the base -38-200540787 to sample the image data at a predetermined initial pulse input. The material latch 64 temporarily stores the input image data. Store and send to the asset register 65. The data register 65 samples predetermined image data from the input image data time-divided from the data latch 64 according to the instruction from the shift register 63 and sends it to the latch 66. The data in the data register 65 are packed and latched 'in the latches corresponding to the strobe input and output to the level shifter 67. The level shifter 67 converts the latched data to the power level of the analog circuit section and sends it to the D / A converter 69. The gray-scale electric 0 generating circuit 68 performs impedance distribution based on the internal step resistance according to the standard voltage input from the outside, generates a 7-corrected voltage, and sends it to the D / A converter 69. The D / A converter 69 is based on the gray-scale voltage generating circuit. The / correction voltage of 68 converts the digital image signal input from the level shifter 67 into an analog number, and sends it to the output circuit 70. The output circuit 70 is a voltage follower circuit composed of an OP amplifier output buffer, and outputs an analog signal to a liquid drive output terminal. On the one hand, the image data output control circuit 71, at the time indicated by the shift register 63, among the image data latched by the data latch 64, the image data signal not stored in the data register 65 Output to adjacent pole drive ICs. In this case, the image data output control circuit 7 1 ′ may be used to pass an image data signal during a period in which an initial pulse is input to the source driving 1C, and to pass in a period when a start pulse is not input to the source driving IC. A single circuit configuration such as a switching circuit for the image data signal. Therefore, '1C for source driving used in this embodiment, because the input image data signals, the data other than the processed image data signals are referred to.' 66 The method of transmitting other image data signals of Lu Buchu-39-200540787 to the next source driving IC is to reduce the amount of data in order to send to the source driver 1C connected in series in multiple stages. Image data signal, even if the image data signal wiring is very long, as the amount of image data signal decreases as the input end portion away from the image data signal, the generation of EMI is greatly reduced. [Embodiment 3] FIG. 5 is a schematic plan view showing a liquid crystal display device 1 C according to Embodiment 3 of the present invention, and FIG. 6 is a diagram showing the time between signals DATA 1 to DAT A 3 I in FIG. 5. Time chart. This liquid crystal display device 1 has most of the same structure as the liquid crystal display device 1 of the previous example shown in FIG. 9 except that (1) a plurality of N connected in series (N > 2. Here N = 6) The TCP series connection group is divided into two parts in the central part, in other words, it is divided into a series connection group consisting of three TCPs formed by source driving circuits ST1 to ST3, and formed by source driving circuits ST4 to ST6. The three TCP-connected series connection groups, and the respective drive circuits ST3 and ST4 adjacent to each other are connected to the control circuit substrate 3 through supply lines 7 and 7 'of signals and the like formed on the FPG and FPC2, respectively, and ( 2) The control IC 5 provided on the control circuit board 3 includes an interface 51, a timing controller 52 composed of a direction switch of a bus driver, and a line memory 53. In other words, in the liquid crystal display device 1 of the previous example shown in FIG. 9, the image signal sent from the image data signal generating device such as a PC is shown as DATA1 in FIG. 6 as the corresponding source. The pulse signals of ICSD1 to SD6 corresponding to the pole drive are transmitted from the pulse signals of data 1 to 6. Then, the pulse number g corresponding to -40-200540787 xa some shell materials 1 ~ 6 is controlled by a time pulse that is not shown in the figure. For example, the pulse signal corresponding to the data 1 is driven to the source ICSD1, corresponding The pulse signal of the material 2 is continuously supplied to the ICSD2 for source driving xa t in order, and is sequentially supplied to the source lines of the respective elements of the liquid crystal display panel 2 corresponding to each of the source driving Ics D 1 to s D 6. In addition, the pulse signals corresponding to the materials 1 to 6 should originally be signals composed of pulse sequences corresponding to the number of source lines of the liquid crystal panel connected to each of the source driving ICSD1 to SD6. In Fig. 6, φ is easy to explain, and each pulse signal corresponding to each material 1 to 6 is represented by a separate pulse. When the signal shown by DATA1 in FIG. 6 is inputted to the liquid crystal display device 1C of this embodiment as it is, ICSD4 to SD6 for source driving are transmitted in the correct order, but relative source driving I cs D j to SD 3 are transmitted in the reverse order. That is, for source driving ICSD4 to SD6, the pulse signal corresponding to source 4 is directed to source ICSD4, the pulse signal corresponding to source 5 is directed to source driving ICSD5, and the pulse signal corresponding to source 6 is driven to source With ICSD6, this is supplied in the correct order in this order, so that any left and right half of the liquid crystal display device can be displayed normally. However, for source driving ICs SD 1 to SD 3, the pulse signal corresponding to source 1 is directed to ICSD3 for source driving, the pulse signal corresponding to source 2 is directed to ICSD 2 for source driving, and the pulse signal corresponding to source 3 is directed to source The electrode driving IC SD 1 is supplied in the reverse order so that at least any half of the left and right sides of the liquid crystal display device cannot be normally displayed. Here, in this embodiment, as the control IC 5 provided on the control circuit board 3, a timing controller 52 and a line memory 53 including an interface 5! And a direction switch -41-200540787 of a bus driver are used. Control IC 'Once the image data signal DATA1 transmitted from the image data signal generating device 8 such as a PC is read by the timing controller 52 to the line memory 53 and then driven by the timing controller 52 relative to the source Use ICSD4 to SD6, as shown in DATA2 in Figure 6, to output to source ICSD4 for source driving in the correct order, that is, in order of data 4, data 5, and data 6 via the supply line 7 of the FPC i signal, etc. Relative to source driving ICSD1 to SD3, as shown in DAT A3 in Figure 6, in the reverse order, that is, in the order of data 3, data 2, g data 1, and then via the supply line 7 'such as the signal of FPC2 to Source driver ICSD3. In this way, as for ICSD1 to SD3 for source driving, the pulse signal corresponding to data 1 is directed to IC SD1 for source driving, the pulse signal corresponding to data 2 is directed to ICSD2 for source driving, and the pulse signal corresponding to data 3 is driven to source Since the ICSD3 is supplied correctly, it can be displayed normally over the entire screen range of the liquid crystal display panel 2. In addition, the timing controller 5 2 composed of a directional switch of a bus driver is a circuit that sends data to the source driving IC SD 4 to SD 6 in the correct order as a queue (called First-in-first-out (FIFO)) is a well-known circuit. In addition, the circuit that sends data in reverse order from ICSD1 to SD3 for source driving is also a stack circuit (called first-in-first-out / first in last out (FIL0)) A circuit known to those skilled in the art. In addition, in this embodiment, since the serial connection group in which a plurality of TCPs are connected in series to the liquid crystal display panel 2 is divided into two in the central portion, the length of each serial connection group divided is shortened, and from the aforementioned control-42 -200540787 IC5 signals and the like are supplied to the clamping ICs and adjacent ICSD3 and SD4, respectively. Therefore, the source driving ICs up to 1 CSD 1 and SD 6 at the ends of the separate connection groups are reduced. The voltage drop amounts actually become equal, thereby avoiding the occurrence of display unevenness in the center portion of the liquid crystal display panel 2 and reducing the occurrence of display unevenness in the peripheral edge portions. In particular, since the control IC 5 is connected to two adjacent ones by ICs S D 3 and S D 4, there is no need to extend the wiring to the end of the display panel 2, and the circuit board 3 can be made smaller. ® The serial connection group of multiple TCPs connected in series is in the central part, so the data signals supplied to the two serial connection groups are shown in data 2 and data 3, which is reduced by half, and the half data signal Since the pulse amplitude can be amplified at the latest during the next scanning period, the amplitude of the pulse can also be greatly reduced, and in the third embodiment, although the following device is shown, the crystal display device 1 C is arranged on the control circuit substrate 3 The control IC with interface 5 i, which is composed of a directional switch of a bus driver ® controller 5 2 and line memory 5 3, is delivered in the correct order relative to drive ~ SD6, and is opposite to ICSD1 for drive It is sent out sequentially. However, if an image data device such as a PC uses a device that generates the relative direction of ICSD1 to SD3 for driving in advance, a device that does not intentionally change the order of phases ICSD1 to SD3 may be used as it is. In addition, this illustration uses two FPCs divided into FPC and FPC2 as the connection between the liquid crystal display panel 2 and the control circuit 3 I, but for the phenomenon of two sources falling in series and being prominent at the same time, The source is driven to the LCD. In addition, it can be divided into 2 as shown in Figure 6 to reduce one send. EMI. That is, as the liquid IC5, the timing control ICSD4 to SD3 are used to generate signals in opposite directions. For the FPC in the driving example, the distance between two -43- 200540787 FPCs can be shortened to form one FPC. [Brief Description of the Drawings] Fig. 1 is a plan view showing a connection relationship between a liquid crystal display panel and a source driving circuit constituting the liquid crystal display device of the first embodiment. Fig. 2 is a block diagram showing a configuration of a driving IC having a source driving circuit. Fig. 3 is a timing chart for explaining the flow of each data in the source driving 1C on the source driving TCP in the liquid crystal display device of the second embodiment. Fig. 4 is a block diagram illustrating the internal circuit structure of the 1C for source driving of Fig. 3; Fig. 5 is a schematic partial plan view showing the liquid crystal display device of the third embodiment. Fig. 6 is a time chart showing the time between the signals DATA 1 to DAT A3 in Fig. 5. FIG. 7A is a schematic diagram of a TCP-type liquid crystal display device, and FIG. 7B is a schematic diagram of a source driving TCP (or a gate driving TCP) ® carried in FIG. 7A. FIG. 8 is a time chart illustrating the flow of data in each source driving 1C on the TCP for source driving of the liquid crystal display device of FIG. 7. Fig. 9 is a schematic diagram of a conventional liquid crystal display device using a signal transmission method. Fig. 10 is a schematic diagram of a liquid crystal display device in which the signal transmission method shown in Fig. 9 is improved. -44- 200540787
【主要元件符號說明】 1，1， 1，1 A - 1 C 液 晶 顯 示裝 2 液 晶 顯 示面 3 控 制 電 路 4 基 板 5 控 制 用 1C 6 電 源 電 路 7 信 號 供 給用 11 類 比 電 源電 12 灰 度 電 源電 13 類 比 電 源電 14 佈 線 阻 抗算 15 灰 度 電 源電 16 算 出 用 電壓 17 檢 出 丄山 m 子 18 佈 線 阻 抗算 19 類 比 電 源電 20 灰 度 電 源電 ST1 - -ST6 源 極 驅 動電 SB 1 - -SB7 撓 性 基 板 SD1 - -SD7 驅 動 用 1C GT1 閘 極 驅 動電 GB1 撓 性 基 板 GDI 驅 動 用 1C Ai 電 源 電 壓輸 置 板 路 入用佈線組[Description of main component symbols] 1, 1, 1, 1 A-1 C Liquid crystal display device 2 Liquid crystal display surface 3 Control circuit 4 Substrate 5 Control 1C 6 Power supply circuit 7 Signal supply 11 Analog power supply 12 Gray power supply 13 Analog power supply 14 Wiring impedance calculation 15 Gray power supply 16 Calculation voltage 17 Detect Laoshan m 18 18 Wiring impedance calculation 19 Analog power supply 20 Gray power supply ST1--ST6 Source driver SB 1--SB7 Base board SD1--SD7 1C GT1 gate drive GB1 flexible board GDI drive 1C Ai power supply voltage input board circuit wiring set
FPC 壓輸入端子 壓輸入端子 壓加算部 出用電壓生成部 壓加算部 輸出端子 出部 壓輸出端子 壓輸出端子 路 -45- 200540787 Βι 控 制 信 號 輸 入 用 佈 線 組 Ci 源 極 信 號 輸 出 用 佈 線 組 Di 控 制 信 號 輸 出 用 佈 線 組 Ei 電 源 電 壓 輸 出 用 佈 線 組 Fi 控 制 信 號 用 連 接 佈 線 組 Gi 電 源 電 壓 用 連 接 佈 線 組 Hi 源 極 信 號 輸 入 丄山 m 子 組 Ri 佈 線 阻 抗 算 出 用 佈 線 Rai 算 出 用 電 壓 輸 出 側 佈 線 Rbi 面 板 側 佈 線 Rci 檢 出 電 壓 輸 入 側 佈 線FPC pressure input terminal pressure input terminal pressure addition unit output voltage generation unit pressure addition unit output terminal output terminal pressure output terminal pressure output terminal circuit -45- 200540787 Βι Control signal input wiring group Ci Source signal output wiring group Di control Signal output wiring group Ei Power supply voltage output wiring group Fi Control signal connection wiring group Gi Power supply voltage connection wiring group Hi Source signal input Sheshan m Sub-group Ri Wiring impedance calculation wiring Rai calculation voltage output side wiring Rbi Panel side wiring Rci Detection voltage input side wiring
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