TW200537432A - Method and system for driving dual display panels - Google Patents
Method and system for driving dual display panels Download PDFInfo
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- TW200537432A TW200537432A TW094114484A TW94114484A TW200537432A TW 200537432 A TW200537432 A TW 200537432A TW 094114484 A TW094114484 A TW 094114484A TW 94114484 A TW94114484 A TW 94114484A TW 200537432 A TW200537432 A TW 200537432A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
- G06F3/1446—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
- G09G2330/022—Power management, e.g. power saving in absence of operation, e.g. no data being entered during a predetermined time
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- General Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Computer Hardware Design (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
- Shift Register Type Memory (AREA)
Abstract
Description
200537432 16755pif.doc 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種顯示器(display),且特別是有關 於一種以最小之記憶體容量(memory capacity)以及較低之 雜訊(reduced noised)來驅動雙顯示器的方法與系統。 【先前技術】200537432 16755pif.doc IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a display, and in particular to a method with a minimum memory capacity and low noise ( reduced noised) method and system for driving dual displays. [Prior art]
平面顯示器是一種輕、薄,且耗電量較陰極射線管 (CRT)顯示器為低的顯示器。此外,由於平面顯示器的尺 寸很小,故平面顯示器已廣泛被應用於可攜式裝置,如個 人數位助理(PDA)、可攜式通訊終端(portable communications terminals)、數位相機以及個人電腦中。 平面顯示器例如為液晶顯示器、電漿顯示器或有機電 激發光顯示器。由於液晶顯示器的低成本,使其已被廣泛 地運用在可攜式通訊終端上。 目前已廣泛被使用的可攜式通訊終端為雙面折疊式 (,al f〇lder_type)或是滑蓋式(slide_type)之可攜式通ς終 ^在雙面折疊式之可攜式通訊終端中,子顯示面板係用 ,作為外顯示面板,且錢示面板制以作為内顯示面 反:而在滑蓋式之可攜式通訊終端中,顯示面板的顯示區 ,,根巧可搞式通訊終端是否處於待機模式一~则㈣ 或主動模式(active mode)而改變。 在可攜式通訊終端之待機模式下,僅顯示出少量用以 =通訊終端狀態的資料或時間資訊。在主動模式下,可 ‘式通訊終端會顯示大量的·,如通訊資訊或多媒體資 5 200537432 16755pif.doc 訊。此外:在待機模式下,資料僅顯示於子顯示面板上, 妓資料僅顯示於主顯示面板上。在滑蓋式 模式下,資料係顯示於顯示面板的部分 模式下,㈣係顯示於顯示面板的所有 _ 3雙面㈣賴切轉料料括一用以 哭動=面板之驅動器、—用以驅動子顯示面板之驅動Flat panel displays are light, thin, and consume less power than cathode ray tube (CRT) displays. In addition, due to the small size of flat-panel displays, flat-panel displays have been widely used in portable devices such as personal assistants (PDAs), portable communication terminals, digital cameras, and personal computers. The flat display is, for example, a liquid crystal display, a plasma display, or an organic electroluminescent display. Due to the low cost of liquid crystal displays, they have been widely used in portable communication terminals. The portable communication terminals that have been widely used at present are double-sided foldable (, al folder_type) or slide-type (slide_type) portable communication terminals. The middle and sub display panels are used as the outer display panel, and the money display panel is used as the inner display surface: while in the slide-type portable communication terminal, the display area of the display panel can be easily changed. Whether the communication terminal is in standby mode 1 ~ ㈣ or active mode. In the standby mode of the portable communication terminal, only a small amount of data or time information used to indicate the state of the communication terminal is displayed. In the active mode, the ‘type communication terminal will display a large number of messages, such as communication information or multimedia information. 5 200537432 16755pif.doc In addition: In the standby mode, the data is only displayed on the sub display panel, and the prostitute data is only displayed on the main display panel. In the slide mode, the data is displayed in some modes of the display panel. It is not displayed in the display panel. _ 3 double-sided materials, including a driver for crying = panel,-for Driver of the display panel
的記憶體㈣减咖驗㈣,以分別儲存欲顯 不於主顯不面板以及子顯示面板之影像資料。 圖1緣示為傳統的雙顯示面板驅動系統湖之方塊 圖,其包括兩個驅動電路。請參照圖1,傳統的雙顯示面 板驅動系統100包括子顯示面板1G2、主顯示面板1〇4、子 顯示面板驅動電路1()6以及主顯示面板驅動電路ι〇8。 子顯示面板驅動電路106包括時間控制器112、記憶 體114、閘極驅動電路116以及源極驅動電路I”。相似地, 主顯不面板驅動電路108包括時間控制器122、記憶體 124、閘極驅動電路126以及源極驅動電路128。 上述顯示面板包含的兩個驅動電路使得可攜式通訊 終端很厚。特別的是,較於較單液晶顯示面板而言,由於 彩色液晶顯示面板的厚度較厚,因此使用彩色液晶面板的 可攜式通訊終端需要縮減其厚度。 據此’習知已研發出一種單一顯示面板驅動電路 (single display panel driving circuit),用以同時驅動子顯示 面板與主顯示面板。圖2纟會示為傳統的雙顯示面板驅動系 6 200537432 16755pif.doc 統200之方塊圖,其包括單一驅動電路206。請參照圖2, 雙顯示面板驅動系統200包括子顯示面板202、主顯示高 板204以及顯示面板驅動電路206。 子顯示面板202的尺寸係小於主顯示面板204的尺 寸。如圖2所繪示,顯示面板驅動電路206包括時間控制 器208以及記憶體210。顯示面板驅動電路206係用以聲 動跟子顯示面板202連接的第一閘極配線212以及跟主顯 示面板204連接的第二閘極配線214。此外,顯示面板趣 ® 動電路206係用以驅動同時跟子顯示面板202以及主顯禾 面板204連接的源極配線216。 在圖2之雙顯示面板驅動系統2〇〇中,當通訊終端處 於待機模式時,顯示面板驅動電路20ό會關閉第二閘極被 線214,以關閉主顯示面板204。之後,將掃瞄訊號依序提 供至第一閘極配線212,並將影像資料提供至源極配線 216。相似地,當通訊終端處於主動模式時,顯示面板驅動 電路206會關閉第一閘極被線212,以關閉子顯示面板 Φ 202。之後’將掃瞄訊號依序提供至第二閘極配線214,並 將影像資料提供至源極配線216。 依據圖2中之驅動系統,由於僅使用了單一個驅動電 路來驅動子顯示面板202與主顯示面板204 ,因此驅動系 統很容易設計,且通訊終端的顯示面板可變的較薄。 圖3繪示為圖2中雙顯示面板驅動系統所使用之記憶 體的方塊圖。請參照圖3,子顯示面板202具有Αχβ的顯 不區域,其中Α是與子顯示面板202連接的閘極配線數 7 200537432 16755pif.doc 量’而B是與子顯示面板202連接的源極配線數量。主顯 示面板204具有CxD的顯示區域,其中c是與主顯示面 板204連接的閘極配線數量,而d是與主顯示面板204連 接的源極配線數量。 記憶體210包括子顯示面板的第一記憶體21〇_a以及 主顯示面板的第二記憶體210_b。記憶體210的尺寸係對 應於子顯示面板的尺寸以及子顯示面板的尺寸。因此,子 顯示面板的第一記憶體210_a之資料容量係對應於ΑχΒ個 知目苗配線與源極配線之交錯(intersections)。相似地,主顯 示面板的第二記憶體210__b之資料容量係對應於OD個掃 瞄配線與源極配線之交錯。 第一記憶體210_a係用以儲存並輸出所欲顯示之影像 至子顯示面板202上。第二記憶體210_b係用以儲存並輸 出所欲顯示之影像至主顯示面板204上。然而,一般而言, 可攜式通訊終端很少會同時驅動子顯示面板以及主顯示面 板。意即,一般而言,可攜式通訊終端會在待機模式下, 僅驅動其子顯示面板,或是在主動模式下,僅驅動其主顯 示面板。因此,用以儲存子顯示面板與主顯示面板之影像 資料的兩個記憶體210—a與210_b會導致不必要的製造成 本,且會使得驅動電路206的尺寸很大。 【發明内容】 據此,本發明使用一個共享記憶體來儲存驅動雙顯示 面板的影像資料。 200537432 16755pif.docThe memory is reduced to save the video data to be displayed on the main display panel and the sub display panel. Fig. 1 is a block diagram of a conventional dual display panel driving system lake, which includes two driving circuits. Referring to FIG. 1, a conventional dual display panel driving system 100 includes a sub display panel 1G2, a main display panel 104, a sub display panel driving circuit 1 () 6, and a main display panel driving circuit ι 08. The sub-display panel driving circuit 106 includes a time controller 112, a memory 114, a gate driving circuit 116, and a source driving circuit I ". Similarly, the main display panel driving circuit 108 includes a time controller 122, a memory 124, a gate Electrode driving circuit 126 and source driving circuit 128. The two driving circuits included in the above-mentioned display panel make the portable communication terminal very thick. Especially, compared to a single liquid crystal display panel, due to the thickness of the color liquid crystal display panel It is relatively thick, so a portable communication terminal using a color LCD panel needs to be reduced in thickness. Based on this, 'Knowledge has developed a single display panel driving circuit for driving the sub-display panel and the main display at the same time. Fig. 2 is a block diagram of a conventional dual display panel driving system 6 200537432 16755pif.doc system 200, which includes a single driving circuit 206. Please refer to Fig. 2. The dual display panel driving system 200 includes a sub display panel 202, The main display high plate 204 and the display panel driving circuit 206. The size of the sub display panel 202 is smaller than that of the main display panel 20. 4 size. As shown in FIG. 2, the display panel driving circuit 206 includes a time controller 208 and a memory 210. The display panel driving circuit 206 is a first gate wiring 212 that is used to acoustically follow the display panel 202 and The second gate wiring 214 connected to the main display panel 204. In addition, the display panel driving circuit 206 is used to drive the source wiring 216 connected to the sub display panel 202 and the main display panel 204 at the same time. In the dual display panel driving system 2000, when the communication terminal is in the standby mode, the display panel driving circuit 20 will close the second gate line 214 to close the main display panel 204. After that, the scanning signals are sequentially provided to The first gate wiring 212 provides image data to the source wiring 216. Similarly, when the communication terminal is in the active mode, the display panel driving circuit 206 will close the first gate line 212 to close the sub-display panel Φ 202. After that, the scan signal is sequentially provided to the second gate wiring 214, and the image data is provided to the source wiring 216. According to the driving system in FIG. 2, since only a single The driving circuit drives the sub display panel 202 and the main display panel 204, so the driving system is easy to design, and the display panel of the communication terminal can be made thinner. Figure 3 shows the memory used in the dual display panel driving system in Figure 2. Please refer to FIG. 3, the sub-display panel 202 has a display area of Αχβ, where A is the number of gate wirings connected to the sub-display panel 202, 200537432 16755pif.doc, and B is the sub-display panel 202. The number of source wirings connected. The main display panel 204 has a CxD display area, where c is the number of gate wirings connected to the main display panel 204, and d is the number of source wirings connected to the main display panel 204. The memory 210 includes a first memory 210_a of the sub-display panel and a second memory 210_b of the main display panel. The size of the memory 210 corresponds to the size of the sub display panel and the size of the sub display panel. Therefore, the data capacity of the first memory 210_a of the sub-display panel corresponds to the intersections of A × B Wisdom seedling wiring and source wiring. Similarly, the data capacity of the second memory 210__b of the main display panel corresponds to the interleaving of OD scan wirings and source wirings. The first memory 210_a is used to store and output the image to be displayed on the sub-display panel 202. The second memory 210_b is used to store and output the image to be displayed on the main display panel 204. However, in general, a portable communication terminal rarely drives a sub display panel and a main display panel at the same time. This means that, in general, a portable communication terminal will only drive its sub-display panel in standby mode, or only its main display panel in active mode. Therefore, the two memories 210-a and 210_b for storing the image data of the sub-display panel and the main display panel will cause unnecessary manufacturing costs, and the size of the driving circuit 206 will be large. SUMMARY OF THE INVENTION Accordingly, the present invention uses a shared memory to store image data driving a dual display panel. 200537432 16755pif.doc
中,^本發明之一實施例的雙顯示面板驅動方法與系統 蝽I *員示面板與第二顯示面板中的一個面板係被 示模”肩示模式面板,而另一個面板係被選取作為一非顯 二5工面板。影像資料係顯示於顯示模式面板上, 二 於第一 _ - 立纖不 1 - π面板或第二顯示面板之影像資料係被儲 /、旱記憶體。 、 於f本發明之另一實施例中,共享記憶體的容量係對應 、一顯示面板及第二顯示面板中的較大者。 ^ 作為 選取 —里ί本發明之再一實施例中,顯示模式面板係被驅動於 非面顯示模式或一白晝面顯示模式下。在此情況下, 顯不模式面板之閘極配線係在顯示模式面板之一顯示圖 ^率I的每個特定圖框時間内藉由一開啟電壓來驅動。此 1當非顯示模式面板的閘極配線係藉由開啟電壓進行驅 盼’非顯示模式面板之源極配線係以對應於黑畫面顯示 果式或白畫面顯示模式之一特定電壓來驅動。In the following, a driving method and system of a dual display panel according to an embodiment of the present invention: * One of the display panel and the second display panel is a "shoulder display mode panel, and the other panel is selected as A non-display 2 and 5 panel. The image data is displayed on the display mode panel, and the image data of the first _-Li fiber 1-π panel or the second display panel is stored / dry memory. f In another embodiment of the present invention, the capacity of the shared memory corresponds to the larger of a display panel and a second display panel. ^ As a selection—in another embodiment of the present invention, the display mode panel The system is driven in non-plane display mode or a day-to-day display mode. In this case, the gate wiring of the display mode panel is borrowed within each specific frame time of one of the display mode panels to display the graph ^ rate I It is driven by a turn-on voltage. When the gate wiring of the non-display mode panel is driven by the turn-on voltage, the source wiring of the non-display mode panel corresponds to the black display fruit type or the white screen display mode. Specific driving voltage.
—在本發明之另一實施例中,顯示模式面板係設定為第 —顯示面板與第二顯示面板中的較大者。 /在本發明之又一實施例中,非顯示模式面板之源極配 線係從顯示模式面板源極配線延伸出來,而成為一個子組 在本發明之另一實施例的雙顯示面板驅動方法與系 先中弟一顯示面板與第二顯示面板中的一個面板係被選 取作為一顯示模式面板,而另一個面板係被選取作為一非 顯示模式面板。影像資料係以一顯示圖框率而顯示於顯示 9 200537432 16755pif.doc 模式面板上’且非顯示模式面板係在顯示圖框率中的每個 特定圖框時間内,以及在一黑畫面顯示模式或一白晝面顯 示模式下被驅動。 在上述的實施例中’在每個特定圖框時間内,非顯示 模式面板之閘極配線係藉由一開啟電壓來驅動。此外\'去 非顯示模式面板的閘極配線係藉由開啟電壓進行胃區動時, 非顯示模式面板之源極配線係以對應於黑書面顯示模式< 白畫面顯示模式之一特定電壓來驅動。 ' • &上述方式中’單-個共旱§己憶體可儲存用以驅動子 顯示面板與主顯示面板的影像資料,以使得記情、體容量最 小化。此外’藉由於黑晝面或白晝面顯示模式下驅動非顯 示模式面板,雜訊可被減低。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說 明如下。 【實施方式】 φ 圖4繪示為依照本發明一實施例中雙顯示面板驅動系 統400的方塊圖。圖9纟會示為更詳細之顯示面板驅動系統 400的方塊圖。圖10繪示為雙顯示面板驅動系統4〇〇在操 作期間的步驟流程圖。在本發明的一實施例中,驅動電路 402包括一係用以儲存一糸列指令(sequences 〇f instructions)之驅動記憶體410,當驅動控制器416執行前 述的指令時,可使得驅動電路402進行圖10中的步驟。 200537432 16755pif.doc 請參照圖4與圖8,雙顯示面板驅動系統400包括子 顯示面板202、主顯示面板204以及顯示面板驅動電路 402。子顯示面板202具有ΑχΒ的顯示區域,其中A是與 子顯示面板202連接的閘極配線212之數量,而B是與子 顯示面板202連接的源極配線216之數量。主顯示面板204 具有OD的顯示區域,其中c是與主顯示面板204連接 的閘極配線214之數量,而D是與主顯示面板204連接的 源極配線216之數量。主顯示面板204的顯示區域大於子 顯示面板202的顯示區域。 子顯示面板202為一主動矩陣式面板,其係由B條源 極配線206以及A條子閘極配線(sub gate lines)212彼此交 錯所構成,而主顯示面板204亦為一主動矩陣式面板,其 係由D條源極配線2】6以及A條主閘極配線(sub gate lines)214彼此交錯所構成。源極配線216以及閘極配線211 與214係藉由顯示面板驅動電路402來驅動。在本發明之 一實施例中,子顯示面板202的B條源極配線216係從主 顯示面板204的D條源極配線206延伸出來,而成為一個 子組合(sub-set)。 在前述情況中,子顯示面板202的源極配線數量(意 即B)會等於或小於主顯示面板204的源極配線數量(意 即D)。此外,在本發明一實施例中,連接於子顯示面板 202與主顯示面板204之間的源極配線係形成在一可撓性 基材(flexible substrate)上。 200537432 16755pif.doc-In another embodiment of the present invention, the display mode panel is set to the larger of the first display panel and the second display panel. / In another embodiment of the present invention, the source wiring of the non-display mode panel is extended from the source wiring of the display mode panel, and becomes a sub-group of the dual display panel driving method and One of the first display panel and the second display panel is selected as a display mode panel, and the other panel is selected as a non-display mode panel. The image data is displayed on the display panel at a display frame rate of 9 200537432 16755pif.doc and the non-display mode panel is within each specific frame time of the display frame rate, and in a black screen display mode Or it is driven in the daytime display mode. In the above embodiment ', the gate wiring of the non-display mode panel is driven by an on voltage during each specific frame time. In addition, when the gate wiring of the non-display mode panel is operated by the open voltage, the source wiring of the non-display mode panel is at a specific voltage corresponding to one of the black writing display mode and the white screen display mode. drive. '&Amp; In the above method, ‘single-shared drought’ 己 memory can store the image data used to drive the sub display panel and the main display panel to minimize memory and body capacity. In addition, by driving the non-display mode panel in the day or day display mode, noise can be reduced. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, preferred embodiments are described below in detail with reference to the accompanying drawings, as follows. [Embodiment] Fig. 4 is a block diagram of a dual display panel driving system 400 according to an embodiment of the present invention. FIG. 9A shows a block diagram of the display panel driving system 400 in more detail. FIG. 10 shows a flowchart of the steps of the dual display panel driving system 400 during operation. In an embodiment of the present invention, the driving circuit 402 includes a driving memory 410 for storing a sequence of instructions. When the driving controller 416 executes the foregoing instructions, the driving circuit 402 can perform Steps in Figure 10. 200537432 16755pif.doc Please refer to FIGS. 4 and 8. The dual display panel driving system 400 includes a sub display panel 202, a main display panel 204 and a display panel driving circuit 402. The sub display panel 202 has a display area of AxB, where A is the number of gate wirings 212 connected to the sub display panel 202, and B is the number of source wirings 216 connected to the sub display panel 202. The main display panel 204 has a display area of OD, where c is the number of gate wirings 214 connected to the main display panel 204, and D is the number of source wirings 216 connected to the main display panel 204. The display area of the main display panel 204 is larger than that of the sub display panel 202. The sub display panel 202 is an active matrix panel, which is composed of B source wirings 206 and A sub gate lines 212 interlaced with each other, and the main display panel 204 is also an active matrix panel. It is constituted by D source wirings 2] 6 and A main gate lines (sub gate lines) 214 staggered with each other. The source wiring 216 and the gate wirings 211 and 214 are driven by a display panel driving circuit 402. In one embodiment of the present invention, the B source wirings 216 of the sub-display panel 202 are extended from the D source wirings 206 of the main display panel 204 to form a sub-set. In the foregoing case, the number of source wirings (meaning B) of the sub display panel 202 will be equal to or less than the number of source wirings (meaning D) of the main display panel 204. In addition, in an embodiment of the present invention, the source wiring system connected between the sub display panel 202 and the main display panel 204 is formed on a flexible substrate. 200537432 16755pif.doc
在折疊式通訊終端中’子顯示面板202與主顯示面板 204中的一個顯示面板會被選定作為顯示模式面板,以根 據折疊機構(folder)是否被開啟,或通訊終端是否在使用中 來顯示影像資料。因此,共享記憶體404係用以儲存子顯 不面板202以及主顯不面板204的影像資料。共享記憶體 404所具有的容量係足以儲存子顯示面板2〇2或主顯示面 板204所欲顯示之影像資料。一般而言,子顯示面板2〇2 的尺寸係小於主顯示面板204的尺寸。因此,共享記憶體 404所具有的容篁係足以儲存對應於尺寸為cxd之主顯示 面板204所欲顯示的影像資料。 請參照圖9與圖10,繪圖處理器412會透過中央處理 單元/RGB介面414送出一面板選擇訊號至驅動控制器 416。驅動控制器416會從面板選擇訊號來決定子顯示面板 202與主顯示面板204中的哪一個顯示面板要為 式面板’以及哪-個顯示面板要作為非顯示面板㈤ι〇 中的步驟S502)。 舉例而言,當通訊終端的折疊機構關閉時,口 示面板202會被選定作為顯示模式面板,以顯轉 •丘 享記憶體綱的影像資料。在前述情況中,主 ^ 會被選定作為非顯示模式面板。且在前述情、、兄 共享記憶體404中的影像資料量是對應於尺寸存^ 顯示面板撤,且此影像資料量小於共享體χ = 量(full capacity)。 、祖扪王口P 合 只有主顯 另一方面,當通訊終端的折疊機構開啟時, 200537432 16755pif.doc 示面板2G4會被選定作細示模式面板,以顯示來自於共 享記憶體404的影像資料。在前述情況中,子顯示面板2〇2 會被選定作為非顯示模式面板。且在前述情況中,儲存在 共旱§己憶體404中的影像資料量是對應於尺寸為cxd之主 顯示面板204,且此影像資料量等於共享記憶體的全部容 量(full capacity) 〇 在圖4中的任一個情況下,影像資料係藉由中央處理 單元(繪圖處理器)412以及中央處理單元/RGB介面414 從共享記憶體404傳送到驅動電路402。因此,本實施例 僅使用單一個共享記憶體404來儲存子顯示面板2〇2或主 顯示面板204所欲顯示的影像資料,以使記憶體容量最小 化0 依據來自於共享記憶體404的影像資料,驅動電路4〇2 會驅動子顯示面板202的閘極配線212以及B條源極配 線,或是驅動主顯示面板204的閘極配線214以及D條源 極配線。驅動控制器416會控制閘極配線驅動器418,以 驅動子顯示面板202與主顯示面板204的閘極配線212與 閘極配線214。 在一些具有雙顯示面板的折疊式通訊終端中,主顯示 面板204與子顯示面板202係共用單一個背光源 (backlight)。在前述情況下,當主顯示面板204被選定作為 顯示影像資料的顯示模式面板時,因為雜訊/洩漏效應,子 顯示面板202仍會受到提供至主顯示面板204上之訊號的 影響,進而造成被選定作為非顯示模式面板的子顯示面板 13 200537432 16755pif.doc 202上會顯示出不希望顯示的影像。 為了避免上述發生在子顯示面板搬中的雜訊/浪漏 效應,雙顯示面板驅動系統_會週期性地驅動非顯示模 式面板’以使其處於部分顯示操作(卿制~㈣啊&㈣ 中的黑晝面顯示模式或白晝面顯示模式。 本發明一貫施例中的雙顯示面板驅動系統與方法係 使用部分顯示操作技術(partial display 〇perati〇n)。圖5A與 圖5B繪示為上述之部分顯示操作技術(partial display operation)。在圖5A中,當主顯示面板2〇4為顯示模式面 板時,主顯示面板204會顯示影像以及通訊狀態等項目。 在此情況中,子顯示面板202為非顯示模式面板,且一特 定電壓係被提供至其中之源極配線以顯示空白晝面。共享 吕己憶體404係用以儲存並輸出欲顯示於主顯示面板204上 之景〉像資料。前述影像資料決定了施加於主顯示面板204 中之源極配線上的偏壓。 同樣請參照圖5A,當子顯示面板202為顯示模式面 板時,子顯示面板202會顯示時間或其他資料等項目。在 此情況中,主顯示面板204為非顯示模式面板,且一特定 電壓係被提供至其中之源極配線以顯示空白晝面。共享記 憶體404係用以儲存並輸出欲顯示於子顯示面板202上之 影像資料。前述影像資料決定了施加於子顯示面板202中 之源極配線上的偏壓。 在另一情況下,圖9中的閘極配線驅動器418會依序 提供一掃瞄訊號至子顯示面板202中的閘極配線212以及 14 200537432 16755pif.doc 主顯示面板204中的閘極配線214。此外,圖9中的源極 配線驅動器420會藉由影像資料來驅動顯示模式面板中的 源極配線216,並且藉由特定電壓來驅動非顯示模式面板 中的源極配線216以顯示空白晝面。 圖5B繪示當主顯示面板204為顯示模式面板時,其 部分顯示操作技術(partial display operation),以及當子顯 示面板202為顯示模式面板時,主顯示面板204的非顯示 技術(non-operation)。當主顯示面板204為顯示模式面板 時,主顯示面板204會顯示影像以及通訊狀態等項目。在 此情況中,子顯示面板202為非顯示模式面板,且一特定 電壓係被提供至其中之源極配線以顯示空白畫面。共享記 憶體404係用以儲存並輸出欲顯示於主顯示面板204上之 影像資料。前述影像資料決定了施加於主顯示面板204中 之源極配線216上的偏壓。 同樣請參照圖5B,當子顯示面板202為顯示模式面 板時,可藉由閘極配線驅動器418將掃瞄訊號依序提供至 子顯示面板202之閘極配線212,以使子顯示面板202顯 不時間或其他資料等項目。在此情況中,主顯示面板204 為非顯示模式面板,且閘極配線驅動器418會停止驅動主 顯示面板204之閘極配線214。此外,當掃瞄訊號被提供 至子顯示面板202的閘極配線212時,源極配線驅動器420 會以影像資料來驅動源極配線216,並且準備下一個圖框 (frame) 〇 15 200537432 16755pif.doc 在圖5B中,當子顯示面板202為顯示模式面板時, 主顯示面板204係被關閉,且只有子顯示面板2 〇 2的問極 配線212與源極配線216會被供給電源,故僅有子顯示面 板202會被驅動。共享記憶體404係用以儲存並輸出:顯 示於子顯示面板202上之影像資料。前述影像資料決定了 施加於子顯示面板202中之源極配線216上的偏壓。 請參照圖5A與圖5B,部分顯示操作技術亦可藉由其 春他方式進行,如將二顯示面板的特定區域定義為顯示區 域而其他區域定義為非顯示區域,只要所欲顯示之影像 總量小於共享記憶體404的容量(CxD)即可。 為了減少本發明部分顯示操作技術中的雜訊/洩漏效 應’可根據液晶顯示面板的特性以及提供至源極配線216 的電壓來驅動非顯示模式面板,使其處於黑晝面顯示模式 或白晝面顯示模式。在黑晝面顯示模式中,係提供一特定 之低電壓至源極配線216上,而在白畫面顯示模式中,係 提供一特定之高電壓至源極配線216上。以下將以白晝面 籲齡模仏行說明。 顯示模式面板係以一顯示圖框率(display frame rate) 來驅動。為了減少電源消耗,白晝面顯示模式下的非顯示 模式面板並不會在顯示圖框率中的每一圖框時間都被驅 動’而是在顯示圖框率中的各特定圖框時間(interval)才被 驅動。因此,白晝面顯示模式下的非顯示模式面板係被週 期性地更新,以補償雜訊/洩漏效應。 16 200537432 16755pif.doc 圖6、、’θ示為依照本發明之一實施例中雙顯示面板的驅 動方=。、在圖6所舉的例子中,主顯示面板204係設定為 顯不模式面板,而子顯示面板2〇2係設定為非顯示模式面 板m咸少子顯示面板2Q2的電流消耗’在主顯示面板 204的特疋圖框期間(pre(jetermine(j frames),子顯示面板 202係以白顯示晝面模式進行驅動。 在圖6的例子中,主顯示面板2〇4具有6〇赫茲之顯 示圖框率(意即,更新率)。據此,頻率為6〇赫茲(意即, 每秒60個圖框)之圖框同步訊號6〇2。配線同步訊號6〇4 係用以使傳送至兩個顯示面板202、204之閘極配線與源極 配線的訊號同步。傳送至子顯示面板202之白晝面顯示訊 號606會每隔三個圖框送出一個邏輯訊號,,低(1〇w),,,以維 持白晝面顯示模式。此外,用以驅動主顯示面板204之正 常顯示訊號608會送出一邏輯訊號,,低,,,以將主顯示面板 204設定為顯示模式面板。 圖6中的面板顯示晝面610為子顯示面板202以及主 顯示面板204上的顯示晝面。當白畫面顯示訊號606為邏 輯訊號”高(high)”時,子顯示面板202並沒有處於前述之特 定圖框時間内(圖10中的步驟S504)。在此情況下,子 顯示面板202會藉由驅動其閘極配線212之低電壓而關閉 (意即,閘極配線212被關閉)(圖1〇中的步驟S506)。 此外,在上述情況下,主顯示面板204的閘極配線214 係藉由掃瞄訊號依序驅動(圖1〇中的步驟S508),且主顯 示面板204的源極配線216會依據共享記憶體404中的影 17 200537432 16755pif.doc 像資料來驅動(圖1〇中的步驟S510)。當一圖框的影像 顯示於主顯示面板204時,圖框同步訊號602會更新至下 一個圖框(圖10中的步驟S512),且圖1〇中的流程圖會 返回至步驟S504。 在一個可行的實施例中,白畫面顯示訊號606在每一 特定圖框時間會送出一個邏輯訊號,,低”,且其發生在圖框 同步訊號602内每三個圖框中的一個圖框期間。白晝面顯 示模式中特定圖框時間的持續時間為33·3秒(20/60赫 茲)。一般而言,白畫面顯示模式中特定圖框時間的持續 時間可設定為η/60微秒,其中,,η”係依據而電流消耗限制 以及觀看者之辨識率來決定。 在前述之特定圖框時間内,顯示面板202 (非顯示模 式面板)的閘極配線212係藉由一高電壓來驅動(圖10 中的步驟S514)。舉例而言,顯示面板202之閘極配線 212係藉由掃瞄配線依序驅動。此外,在前述之特定圖框 時間内,子顯示面板202的源極配線係藉由白晝面顯示模 式中的特定電壓來驅動(圖10中的步驟S516)。在子顯 示面板202以白晝面顯示模式進行驅動之後,圖框同步訊 號602會更新至下一個圖框(圖10中的步驟S518),且 圖10中的流程圖會返回至步驟S504。 圖6與圖10所舉的例子中,主顯示面板204為顯示 模式面板,而子顯示面板202為非顯示模式面板。然而, 熟習此項技術的人士在參照前述内容後應知,本發明亦可 200537432 16755pif.doc 使主顯示面板204為非顯示模式面板,而使子顯示面板2〇2 為顯不模式面板。 此外,在主顯示面板被關閉而成為非顯示面板的情況 下,通常適當折疊式的通訊終端被關閉的時候。在此情況 下’主顯示面板的閘極配線可被關閉,以減少電流消耗。 圖7繪示為應用於圖6之實施例中的閘極配線設定 (setting)。假設主顯示面板與子顯示面板的最大解析度分別 為 176RGB><224 (圖 4 中的 OD)以及 176RGB><96 (圖 4 中的ΑχΒ )。在此情況下’用以顯不兩個顯示面板(被視 為單一螢幕)的閘極配線數量為320條,此數量等於主顯 示面板的閘極配線數量+隱藏位元(latenCy bits,即隱藏線 的數量)+子顯示面板的閘極配線數量,如圖7所繪示。 衣實施例中,當主顯示面板與子顯示面板的閘極配線設定 改變時,隱藏位元可用以將閘極配線的數量固定在一特定 數值。 作又设兩個顯不面板被視為单一榮幕時,主顯示面板被 視為一顯示模式面板,而子顯示面板則被視為一個週期性 操作於白畫面顯示模式下的非顯示模式面板。圖8繪示為 圖6中主顯示面板與子顯示面板之閘極配線的掃瞄示意 圖0 凊參照圖8,主顯示面板的閘極配線係被設定為以高 電壓VGH來開啟。因此,當主顯示面板的源極配線被影 像資料驅動時,影像資料會顯示於主顯示面板上。另一方 面,子顯示面板的閘極配線係週期性地被設定為:在各個 19 200537432 16755pif.doc 特定圖框時間内以高電壓VGH來開啟,而在其他圖框時 間内以低電壓VGL關閉。 在圖8中,連接至子顯示面板的閘極配線係耦接至關 閉低電壓VGL,以於主顯示面板之顯示圖框率的前兩個圖 框期間内關閉子顯示面板。在第三個圖框中,子顯示面板 的閘極配線係耦接至開啟高電壓VGH,以使得子顯示面板 操作於白晝面顯示模式下。前述的特定圖框時間中,用以 開啟子顯示面板之閘極配線的開啟高扁壓VGH可根據電 > 流消耗限制以及觀看者之辨識率來決定。 此外,驅動電路402中的源極配線驅動器420係施加 偏壓至子顯示面板(非顯示模式面板)中的源極配線以及 共用電壓端子(Vcom terminal),如表1所示:In the foldable communication terminal, one of the sub-display panel 202 and the main display panel 204 will be selected as the display mode panel to display the image according to whether the folder is turned on or whether the communication terminal is in use. data. Therefore, the shared memory 404 is used to store the image data of the sub-display panel 202 and the main display panel 204. The shared memory 404 has sufficient capacity to store the image data to be displayed on the sub-display panel 202 or the main display panel 204. Generally, the size of the sub display panel 202 is smaller than that of the main display panel 204. Therefore, the capacity of the shared memory 404 is sufficient to store the image data to be displayed corresponding to the main display panel 204 of size cxd. Referring to FIG. 9 and FIG. 10, the graphics processor 412 sends a panel selection signal to the driving controller 416 through the central processing unit / RGB interface 414. The drive controller 416 selects a signal from the panel to determine which display panel of the sub display panel 202 and the main display panel 204 is a mode panel 'and which display panel is to be a non-display panel (step S502). For example, when the folding mechanism of the communication terminal is closed, the dictation panel 202 will be selected as the display mode panel to display the image data of the memory class. In the foregoing case, the main ^ is selected as the non-display mode panel. And the amount of image data in the aforementioned shared memory 404 corresponds to the size storage ^ display panel, and the amount of image data is less than the shared body χ = full capacity. The main display of the ancestral king's mouth is only the main display. On the other hand, when the folding mechanism of the communication terminal is opened, the display panel 2G4 of 200537432 16755pif.doc will be selected as the detailed display panel to display the image data from the shared memory 404. . In the foregoing case, the sub display panel 202 is selected as the non-display mode panel. And in the foregoing case, the amount of image data stored in the common drought § self-memory body 404 corresponds to the main display panel 204 of size cxd, and the amount of image data is equal to the full capacity of the shared memory. In any case in FIG. 4, the image data is transmitted from the shared memory 404 to the driving circuit 402 through the central processing unit (graphics processor) 412 and the central processing unit / RGB interface 414. Therefore, in this embodiment, only a single shared memory 404 is used to store the image data to be displayed on the sub display panel 202 or the main display panel 204 to minimize the memory capacity. 0 According to the image from the shared memory 404 According to the data, the driving circuit 402 will drive the gate wiring 212 and B source wirings of the sub display panel 202, or the gate wiring 214 and D source wirings of the main display panel 204. The driving controller 416 controls the gate wiring driver 418 to drive the gate wiring 212 and the gate wiring 214 of the sub display panel 202 and the main display panel 204. In some foldable communication terminals with dual display panels, the main display panel 204 and the sub display panel 202 share a single backlight. In the foregoing case, when the main display panel 204 is selected as a display mode panel for displaying image data, the sub display panel 202 will still be affected by the signal provided to the main display panel 204 due to noise / leakage effects, which in turn will cause The sub-display panel 13 200537432 16755pif.doc 202 selected as the non-display mode panel displays an image that is not desired to be displayed. In order to avoid the above-mentioned noise / wave leakage effect in the sub-display panel moving, the dual display panel drive system_ will periodically drive the non-display mode panel to make it in a partial display operation (Qing system ~ ㈣ 啊 & ㈣ The day and night display mode or day and night display mode. The dual display panel driving system and method in the embodiment of the present invention uses partial display operation technology (partial display operation). Figures 5A and 5B are shown as Partial display operation technology described above. In FIG. 5A, when the main display panel 204 is a display mode panel, the main display panel 204 displays items such as images and communication status. In this case, the sub display The panel 202 is a non-display mode panel, and a specific voltage is provided to the source wiring to display a blank daylight. The shared Lu Jiyi body 404 is used to store and output scenes to be displayed on the main display panel 204> Image data. The aforementioned image data determines the bias voltage applied to the source wiring in the main display panel 204. Please also refer to FIG. 5A, when the sub display panel 202 is a display mode surface When the panel is on, the sub-display panel 202 displays items such as time or other data. In this case, the main display panel 204 is a non-display mode panel, and a specific voltage is provided to source wiring thereof to display a blank daylight surface. The shared memory 404 is used to store and output image data to be displayed on the sub-display panel 202. The foregoing image data determines the bias voltage applied to the source wiring in the sub-display panel 202. In another case, FIG. The gate wiring driver 418 in 9 will sequentially provide a scanning signal to the gate wiring 212 in the sub-display panel 202 and 14 200537432 16755pif.doc The gate wiring 214 in the main display panel 204. In addition, the source in FIG. 9 The electrode wiring driver 420 drives the source wiring 216 in the display mode panel with image data, and drives the source wiring 216 in the non-display mode panel with a specific voltage to display a blank day and time. FIG. 5B shows when the main wiring When the display panel 204 is a display mode panel, its partial display operation technology (partial display operation), and when the sub display panel 202 is a display mode panel, the main display Non-operation technology of the board 204. When the main display panel 204 is a display mode panel, the main display panel 204 displays items such as images and communication status. In this case, the sub display panel 202 is a non-display mode panel And a specific voltage is provided to the source wiring to display a blank screen. The shared memory 404 is used to store and output image data to be displayed on the main display panel 204. The foregoing image data determines the application to the main display The bias on the source wiring 216 in the panel 204. Also referring to FIG. 5B, when the sub-display panel 202 is a display mode panel, the scanning signals can be sequentially provided to the gate wiring 212 of the sub-display panel 202 through the gate wiring driver 418, so that the sub-display panel 202 displays No time or other information. In this case, the main display panel 204 is a non-display mode panel, and the gate wiring driver 418 stops driving the gate wiring 214 of the main display panel 204. In addition, when a scanning signal is provided to the gate wiring 212 of the sub-display panel 202, the source wiring driver 420 drives the source wiring 216 with image data and prepares the next frame 〇15 200537432 16755pif. doc In FIG. 5B, when the sub display panel 202 is a display mode panel, the main display panel 204 is closed, and only the question wiring 212 and the source wiring 216 of the sub display panel 2 are supplied with power, so only The sub display panel 202 is driven. The shared memory 404 is used for storing and outputting: the image data displayed on the sub-display panel 202. The aforementioned image data determines the bias voltage applied to the source wiring 216 in the sub-display panel 202. Please refer to FIG. 5A and FIG. 5B. Some display operation techniques can also be performed by other methods, such as defining a specific area of the second display panel as a display area and other areas as non-display areas, as long as the total image to be displayed is The amount may be smaller than the capacity (CxD) of the shared memory 404. In order to reduce the noise / leakage effect in part of the display operation technology of the present invention, the non-display mode panel can be driven according to the characteristics of the liquid crystal display panel and the voltage provided to the source wiring 216, so that it is in the daylight display mode or the daylight surface. Display mode. In the day and night display mode, a specific low voltage is provided to the source wiring 216, and in the white screen display mode, a specific high voltage is provided to the source wiring 216. The following will be explained in the form of daytime appealing models. The display mode panel is driven at a display frame rate. In order to reduce the power consumption, the non-display mode panel in daytime display mode is not driven at every frame time in the display frame rate ', but at each specific frame time in the display frame rate (interval ) Is driven. Therefore, the non-display mode panel in the daytime display mode is periodically updated to compensate for noise / leakage effects. 16 200537432 16755pif.doc Figures 6, and 'θ show the driving method of the dual display panel according to an embodiment of the present invention. In the example shown in FIG. 6, the main display panel 204 is set as a display mode panel, and the sub display panel 202 is set as a non-display mode panel. The current consumption of the main display panel 2Q2 is in the main display panel. During the special frame period (preframe) of 204, the sub display panel 202 is driven in a white display day and day mode. In the example of FIG. 6, the main display panel 204 has a display graph of 60 Hz. Frame rate (meaning, update rate). According to this, a frame synchronization signal 602 with a frequency of 60 Hz (that is, 60 frames per second) is used. The wiring synchronization signal 604 is used to transmit to The signals of the gate wiring and the source wiring of the two display panels 202 and 204 are synchronized. The day-time display signal 606 transmitted to the sub-display panel 202 sends a logic signal every three frames, low (10w) In order to maintain the daytime display mode. In addition, the normal display signal 608 used to drive the main display panel 204 will send a logic signal, low, to set the main display panel 204 as the display mode panel. Figure 6 The panel display day surface 610 is the sub display surface 202 and the daylight display on the main display panel 204. When the white screen display signal 606 is a logic signal "high", the sub display panel 202 is not within the aforementioned specific frame time (step S504 in FIG. 10) In this case, the sub display panel 202 is turned off by driving the low voltage of its gate wiring 212 (that is, the gate wiring 212 is turned off) (step S506 in FIG. 10). In addition, in the above, In this case, the gate wirings 214 of the main display panel 204 are sequentially driven by the scanning signal (step S508 in FIG. 10), and the source wirings 216 of the main display panel 204 are based on the shadows in the shared memory 404. 17 200537432 16755pif.doc image data (step S510 in Figure 10). When an image of a frame is displayed on the main display panel 204, the frame synchronization signal 602 will be updated to the next frame (Figure 10 (Step S512), and the flowchart in FIG. 10 will return to step S504. In a feasible embodiment, the white screen display signal 606 will send a logic signal at each specific frame time, “low”, and its Occurs in frame sync signal 602 One frame period of the three frames. The duration of the specific frame time in the daytime display mode is 33.3 seconds (20/60 Hz). In general, the duration of the specific frame time in the white screen display mode The time can be set to η / 60 microseconds, where η "is determined based on the current consumption limit and the recognition rate of the viewer. During the aforementioned specific frame time, the shutter of the display panel 202 (non-display mode panel) The electrode wiring 212 is driven by a high voltage (step S514 in FIG. 10). For example, the gate wiring 212 of the display panel 202 is sequentially driven by the scanning wiring. In addition, during the aforementioned specific frame time, the source wiring of the sub-display panel 202 is driven by a specific voltage in the daytime display mode (step S516 in FIG. 10). After the sub-display panel 202 is driven in the daytime display mode, the frame synchronization signal 602 is updated to the next frame (step S518 in FIG. 10), and the flowchart in FIG. 10 returns to step S504. In the examples shown in Figs. 6 and 10, the main display panel 204 is a display mode panel, and the sub display panel 202 is a non-display mode panel. However, those skilled in the art should know after referring to the foregoing that the present invention can also make the main display panel 204 a non-display mode panel and make the sub display panel 202 a display mode panel by using 200537432 16755pif.doc. In addition, when the main display panel is closed and becomes a non-display panel, usually, when a foldable communication terminal is closed. In this case, the gate wiring of the main display panel can be turned off to reduce current consumption. FIG. 7 illustrates a gate wiring setting applied in the embodiment of FIG. 6. It is assumed that the maximum resolutions of the main display panel and the sub display panel are 176RGB > < 224 (OD in Fig. 4) and 176RGB > < 96 (ΑχΒ in Fig. 4). In this case, the number of gate wirings used to display two display panels (considered as a single screen) is 320, which is equal to the number of gate wirings of the main display panel + hiddenCy bits (ie hidden) Number of wires) + number of gate wirings of the sub-display panel, as shown in FIG. 7. In this embodiment, when the gate wiring settings of the main display panel and the sub display panel are changed, the hidden bits can be used to fix the number of gate wirings to a specific value. When two display panels are regarded as a single glory, the main display panel is regarded as a display mode panel, and the sub display panel is regarded as a non-display mode panel that periodically operates in the white screen display mode. . FIG. 8 is a scanning schematic diagram of the gate wiring of the main display panel and the sub display panel in FIG. 6 FIG. 0 凊 Referring to FIG. 8, the gate wiring system of the main display panel is set to be turned on with a high voltage VGH. Therefore, when the source wiring of the main display panel is driven by the image data, the image data is displayed on the main display panel. On the other hand, the gate wiring system of the sub-display panel is periodically set to be turned on with a high voltage VGH during a specific frame time of 19 200537432 16755 pif.doc, and turned off with a low voltage VGL during other frame times. . In FIG. 8, the gate wiring connected to the sub-display panel is coupled to the shutdown low voltage VGL to close the sub-display panel during the first two frame periods of the display frame rate of the main display panel. In the third frame, the gate wiring of the sub-display panel is coupled to the turn-on high voltage VGH, so that the sub-display panel is operated in the day-surface display mode. In the aforementioned specific frame time, the opening high flat voltage VGH for turning on the gate wiring of the sub-display panel can be determined according to the current consumption limit and the viewer's recognition rate. In addition, the source wiring driver 420 in the driving circuit 402 applies a bias to the source wiring and the common voltage terminal (Vcom terminal) in the sub-display panel (non-display mode panel), as shown in Table 1:
輸出至非顯示H L域之源極配線 輸出至非顯示區域之共用電壓 (Vcom) 正極性 負極性 正極性 負極性 VSS (OV) VDD (5V) VcomL VcomH 表 上述源極配線以及共用電壓端子的偏壓會使作為非 顯示模式面板之子顯示面板顯示白色晝面,以移除雜訊。 在上述方式中,單一個共享記憶體404可儲存用以驅 動子顯示面板202與主顯示面板204的影像資料,以使得 記憶體容量最小化。此外,即使子顯示面板202與主顯示 面板204共用同一個背光源,藉由於黑晝面或白畫面顯示 模式下驅動非顯示模式面板,雜訊仍可被減低。再者,由 20 200537432 16755pif.doc 於子顯示面板202與主顯示面板2〇 示影像^可減低電流雜。 他该開啟而顯 雖然本發明已以較佳實施例揭露如上, 限定本發明,住佃呻羽仏枝菇本. 一,、亚非用以 白技蟄者,在不脫離本發明之㈣ #粑圍内,當可作些許之更動與潤飾 ^精神 範圍當視後附之申請專利範_界定者為準柄明之保護Output to the non-display HL domain source wiring Common voltage (Vcom) positive to negative display Positive to negative VSS (OV) VDD (5V) VcomL VcomH Pressing causes the display panel, which is a child of the non-display mode panel, to display a white daylight to remove noise. In the above manner, a single shared memory 404 can store image data used to drive the sub-display panel 202 and the main display panel 204 to minimize the memory capacity. In addition, even if the sub-display panel 202 and the main display panel 204 share the same backlight source, by driving a non-display mode panel in a black or white display mode, noise can still be reduced. Furthermore, 20 200537432 16755pif.doc can display images on the sub-display panel 202 and the main display panel 20 to reduce current noise. He should open it and show that although the present invention has been disclosed in the preferred embodiment as described above, the present invention is limited, and the edible mushrooms are used. I. Those who use white techniques in Asia and Africa without departing from the scope of the present invention # Within the circle, when you can make a few changes and retouching ^ spiritual scope, the attached patent application scope should be treated as the protection of the standard.
顯干面::二專利犯圍中所界定之第—顯示面板與第二 二:個別的顯示面板或是-個顯示面板的不同顯 【圖式簡單說明】 ,圖1繪不為具有兩個驅動電路的傳統雙顯示面板驅動 糸統之方塊圖。 /圖2繪示為具有單一驅動電路的傳統雙顯示面板驅動 系統之方塊圖。 圖3纷示為圖2中雙顯示面板驅動系統所使用之記憶 體的方塊圖。 圖4繪示為依照本發明一實施例中雙顯示面板驅動系 統的方塊圖。 圖5A與圖5B緣示為依照本發明一實施例中部分顯示 操作技術的示意圖。 圖6繪示為依照本發明之一實施例中雙顯示面板的驅 動方法。 圖7繪示為依照本發明之一實施例應用於圖6之實施 例中的閘極配線設定。 21 200537432 16755pif.doc 圖8繪示為用以進行圖6中之雙顯示面板驅動方法 閘極配線掃目苗示意圖。 圖9繪示為圖4中之顯示面板驅動系統的方塊圖。 圖1〇繪示為圖9中之雙顯示面板驅動系統在操作期 間的步驟流程圖。 上述圖式係以能夠清楚表達為原則進行繪示,其並未 以實際比例繪示。圖1、2、3、4、5A、5B、6、7、8、9 與10中的相同標號係代表具有相似結構及/或相似功能之 • 構件。 【主要元件符號說明】 100、200 :雙顯示面板驅動系統 102、202 :子顯示面板 104、204 :主顯示面板 106 :子顯示面板驅動電路 108 :主顯示面板驅動電路 112、122、208 :時間控制器 φ I14、124、210、210—a、210—b ··記憶體 116、126 :閘極驅動電路 118、128 :源極驅動電路 206 :顯示面板驅動電路 212、214 :閘極配線 216 :源極配線 400 ··雙顯示面板驅動系統 402 :驅動電路 22 200537432 16755pif.doc 404 :共享記憶體 410 :驅動記憶體 412 :繪圖處理器 414:中央處理單元/RGB介面 416 :驅動控制器 418 :閘極配線驅動器 420 :源極配線驅動器 S502、S504、S506、S508、S510、S512、S514、S516、 S518 :驅動步驟 602 :圖框同步訊號 604 ··配線同步訊號 606 :白畫面顯示訊號 608 :正常顯示訊號 610 :面板顯示畫面Display surface :: The second display panel as defined in the second patent crime: the display panel and the second two: individual display panels or different display panels of one display panel [Schematic description], Figure 1 is not shown as having two A block diagram of a conventional dual display panel drive system of a drive circuit. / FIG. 2 is a block diagram of a conventional dual display panel driving system having a single driving circuit. FIG. 3 is a block diagram of the memory used in the dual display panel driving system in FIG. 2. FIG. 4 is a block diagram of a dual display panel driving system according to an embodiment of the present invention. 5A and 5B are schematic diagrams illustrating a part of the display operation technique according to an embodiment of the present invention. FIG. 6 illustrates a driving method of a dual display panel according to an embodiment of the present invention. FIG. 7 illustrates gate wiring settings applied to the embodiment of FIG. 6 according to an embodiment of the present invention. 21 200537432 16755pif.doc FIG. 8 is a schematic diagram of a gate wiring scan seedling for driving the dual display panel driving method in FIG. 6. FIG. 9 is a block diagram of the display panel driving system in FIG. 4. FIG. 10 is a flowchart of steps of the dual display panel driving system in FIG. 9 during operation. The above drawings are based on the principle of clear expression. They are not shown in actual scale. The same reference numbers in Figures 1, 2, 3, 4, 5A, 5B, 6, 7, 8, 9, and 10 represent components with similar structures and / or similar functions. [Description of main component symbols] 100, 200: dual display panel drive system 102, 202: sub display panel 104, 204: main display panel 106: sub display panel drive circuit 108: main display panel drive circuit 112, 122, 208: time Controller φ I14, 124, 210, 210-a, 210-b. Memory 116, 126: Gate driving circuit 118, 128: Source driving circuit 206: Display panel driving circuit 212, 214: Gate wiring 216 : Source wiring 400 · Dual display panel drive system 402: Drive circuit 22 200537432 16755pif.doc 404: Shared memory 410: Drive memory 412: Graphics processor 414: Central processing unit / RGB interface 416: Drive controller 418 : Gate wiring driver 420: Source wiring driver S502, S504, S506, S508, S510, S512, S514, S516, S518: Driving step 602: Frame synchronization signal 604 · Wiring synchronization signal 606: White screen display signal 608 : Normal display signal 610: Panel display screen
23twenty three
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KR10-2004-0034271A KR100539263B1 (en) | 2004-05-14 | 2004-05-14 | Dual panel driving system and driving method |
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JP (1) | JP2005326859A (en) |
KR (1) | KR100539263B1 (en) |
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KR100556513B1 (en) * | 2004-08-17 | 2006-03-06 | 삼성전자주식회사 | Multi display apparatus with display control circuit for removing an afterimage of sub display and multi display control method for the same |
KR100666603B1 (en) * | 2005-03-24 | 2007-01-09 | 삼성전자주식회사 | A multi display driving circuit and method of operating the same |
US20070008345A1 (en) * | 2005-07-08 | 2007-01-11 | Mcdonald R M | Display system for an industrial device |
CN1941067A (en) * | 2005-09-30 | 2007-04-04 | 鸿富锦精密工业(深圳)有限公司 | Electronic device and its state information display method |
US8199155B2 (en) * | 2006-11-22 | 2012-06-12 | Nvidia Corporation | System, method, and computer program product for saving power in a multi-graphics processor environment |
KR100826508B1 (en) * | 2007-02-12 | 2008-05-02 | 삼성전자주식회사 | Method for digital driving active matrix organic light emitting diodes and apparutus thereof |
KR101337258B1 (en) * | 2007-02-21 | 2013-12-05 | 삼성디스플레이 주식회사 | Liquid crystal display |
KR101497656B1 (en) * | 2008-03-25 | 2015-02-27 | 삼성디스플레이 주식회사 | Dual displaying method, dual display apparatus for performing the dual displaying method and dual display handphone having the dual display apparatus |
US9128661B2 (en) * | 2008-07-02 | 2015-09-08 | Med Et Al, Inc. | Communication blocks having multiple-planes of detection components and associated method of conveying information based on their arrangement |
JP2011166691A (en) * | 2010-02-15 | 2011-08-25 | Toshiba Corp | Electronic device |
TWI533286B (en) * | 2010-09-06 | 2016-05-11 | 元太科技工業股份有限公司 | Flat display apparatus |
US9501980B2 (en) * | 2011-12-28 | 2016-11-22 | Stmicroelectronics International N.V. | Display panel and display panel system |
KR101469480B1 (en) | 2012-04-05 | 2014-12-12 | 엘지디스플레이 주식회사 | Display device and method for driving the saem |
KR101940187B1 (en) * | 2012-10-25 | 2019-01-21 | 삼성디스플레이 주식회사 | Two side display device and manufacturing method thereof |
KR102164798B1 (en) * | 2014-09-11 | 2020-10-13 | 삼성전자 주식회사 | Display driving circuit and display device comprising the same |
CN105976780B (en) * | 2016-07-11 | 2018-08-07 | 深圳市华星光电技术有限公司 | A kind of panel drive circuit and display device |
US11132975B1 (en) | 2018-05-01 | 2021-09-28 | Snap Inc. | Display devices, methods and eyewear incorporating display regions of different wavelengths |
KR102666227B1 (en) * | 2018-05-23 | 2024-05-17 | 삼성디스플레이 주식회사 | Display device |
CN109712564A (en) | 2019-02-25 | 2019-05-03 | 京东方科技集团股份有限公司 | Driving method, driving circuit and display device |
KR20200137075A (en) | 2019-05-28 | 2020-12-09 | 삼성디스플레이 주식회사 | Display device and driving methof of the same |
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JP2004240235A (en) * | 2003-02-07 | 2004-08-26 | Hitachi Ltd | Lsi for display apparatus |
JP4552437B2 (en) * | 2003-03-20 | 2010-09-29 | マグナチップセミコンダクター有限会社 | Display device |
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- 2005-04-04 US US11/098,725 patent/US20050253778A1/en not_active Abandoned
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CN1697014A (en) | 2005-11-16 |
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KR20050109204A (en) | 2005-11-17 |
JP2005326859A (en) | 2005-11-24 |
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