TW200307326A - Method for electrochemical oxidation - Google Patents

Abstract

At the time of performing electrochemical oxidation in the fabrication process of an electronic device, i.e. an electron source (10) (field radiation electron source), a control section (37) determines the voltage rise value due to the resistance of electrolyte B previously based on a resistance detected in a resistance detecting section (35). Subsequently, the control section (37) controls a current source (32) to supply a constant current and begins the oxidation processing of a semiconductor layer provided on an article (30) being processed. Furthermore, the control section (37) subtracts the voltage rise value from a voltage detected at a voltage detecting section (36) thus correcting the voltage. When the corrected voltage reaches a specified upper limit level, the control section (37) stops the output from the current source (32) thus ending oxidation processing. According to the method, the variation in the characteristics of the electronic device can be suppressed.

Description

200307326 (1) 玖、發明說明 【發明所屬之技術領域】 本發明係關於一種半導體之電化學氧化方法。 【先前技術】 向來，作爲使得半導體成爲多孔質化或者是在半導體 表面形成氧化膜之技術，係知道有濕式陽極氧化方法。此 外，作爲在半導體表面形成氧化膜之技術，係知道有利用 電化學反應之電化學氧化方法。此外，在近年來，提議藉 由使用濕式陽極氧化方法和電化學氧化方法之製程而形成 之電場放射型電子源。 例如正如第20圖所示，在此種電場放射型電子源1 0 (以下，簡單地稱爲「電子源10」。），在成爲導電性 基板之η型矽基板1之某一邊之主表面側，形成由氧化之 多孔質多結晶矽層所構成之強電場漂移層6 (以下，簡單 地稱爲「漂移層6」。）。接著，在漂移層6上，形成由 金屬薄膜（例如金薄膜）所構成之表面電極7。另一方面 ，在η型矽基板1之背面，形成歐姆電極2。在此，藉由 η型矽基板1和歐姆電極2而構成下部電極12。在第20 圖所示之例子，於η型矽基板1和漂移層6間，介在無摻 雜之多結晶矽層3。但是，也提議在η型矽基板1之主表 面上而直接地形成漂移層6之電子源。 爲了由第20圖所示之電子源10釋出電子，因此，配 設集極電極2 1而面對著表面電極7。接著，使得表面電 -5- (2) (2)200307326 極7和集極電極21間，成爲真空狀態，在表面電極7和 下部電極1 2間，施加直流電壓Vps，以便於使得表面電 極7相對於下部電極12，成爲高電位。同時，在集極電 極2 1和表面電極7間，施加直流電壓Vc，以便於使得集 極電極21相對於表面電極7，成爲高電位。如果適當地 設定各個直流電壓Vps、Vc的話，則由下部電極12而注 入至漂移層6之電子，係漂移在漂移層6中，通過表面電 極7而被釋出（第20圖中之一點鏈線係顯示通過表面電 極7所釋出之電子I之流動。）。表面電極7係藉由工 作函數小之金屬材料所形成。 在第20圖所示之電子源10，藉由η型矽基板1和歐 姆電極2而構成下部電極12。但是，正如第21圖所示， 也提議在絕緣性基板1 1之某一邊之主表面上而形成由金 屬材料所構成之下部電極1 2之電子源1 0。第2 1圖所示 之電子源10係也藉由相同於第20圖所示之電子源10之 同樣製程而釋出電子。 在此種電子源1 〇，一般將流動在表面電極7和下部 電極1 2間之電流，稱爲「二極體電流Ips」，將流動在集 極電極21和表面電極7間之電流，稱爲「射極電流（釋 出電子電流）Ie」。在電子源1 0，射極電流Ie相對於二 極體電流Ips之比率（=Ie/ Ips)越大，電子釋出效率（ =(Ie/ Ips ) X 1 〇〇[%])係變得越高。此外，直流電壓 Vps越高，則射極電流Ie係變得越大。該電子源10、其 電子釋出特性之真空度依附性小，並且，在電子釋出時， -6- (3) (3)200307326 不發生跳躍現象，能夠以高電子釋出效率而穩定地釋出電 子。 在應用第2 1圖所示之電子源1 0來作爲顯示器電子源 之狀態下，例如採用第22圖所示之構造。在第22圖所示 之顯示器，面對著電子源1 0而配置由平板狀玻璃基板所 構成之面板3 0。在和面板3 0之電子源1 〇間之對向面， 形成由透明導電膜（例如ITO膜）所構成之集極電極（以 下，稱爲「陽極電極」。）21。此外，在和陽極電極21 之電子源1 0間之對向面，設置在每一個像素上之所形成 之螢光物質和由在螢光物質間之所形成之黑色材料而構成 之黑條紋。螢光物質係塗敷在和陽極電極2 1之電子源1 0 間之對向面，藉著由電子源1 0所放射之電子線而發出可 見光。在螢光物質，由電子源1 0所放射並且藉由施加於 陽極電極2 1之電壓所加速之高能量電子係發生衝撞。作 爲螢光物質，係使用R (紅色）、G (綠色）和B (藍色 )之各種發光色。面板30係藉由矩形框狀之框（並未圖 示）而離開電子源1 〇，使得形成在面板3 0和電子源1 0 間之氣密空間，成爲真空狀態。 弟2 2圖所不之電子源1 0係具備：由玻璃基板所構成 之絕緣性基板11、列設在絕緣性基板11表面上之複數個 下部電極1 2、以分別重疊於下部電極1 2之形式而形成之 複數個多結晶矽層3、由以分別重疊於多結晶矽層3之形 式所形成之氧化之多孔質多結晶矽層而構成之複數個漂移 層6、由埋入於相鄰接之漂移層6間之多結晶矽層所構成 -7- (4) (4)200307326 之分離層16、以及在漂移層6和分離層16上而跨越漂移 層6和分離層16來列設在交差於下部電極12之方向上之 複數個表面電極7。 在電子源1 0，在相當於絕緣性基板1 1表面上之所列 設之複數個下部電極12和在交差於下部電極12之方向上 之所列設之複數個表面電極7間之交點之部位上’夾住漂 移層6之一部分。因此，藉由適當地選擇表面電極7和下 部電極12間之組合，在所選擇之組合間，施加電壓，以 便在相當於漂移層6所選擇之表面電極7和下部電極12 間之交點之部位上，產生強電場作用，釋出電子。這個係 相當在由複數個表面電極7之群組和複數個下部電極12 之群組所構成之矩陣（格子）之格子點來配置由下部電極 1 2、下部電極1 2上之多結晶矽層3、多結晶矽層3上之 漂移層6和漂移層6上之表面電極7所構成之電子源元件 1 〇a之狀態。可以藉由選擇施加電壓之表面電極7和下部 電極1 2間之組合，而由所要求之電子源元件1 0a，釋出 電子。 在電子源1 〇之習知之製造製程，漂移層6係藉由在 下部電極1 2之某一邊之表面側而形成無摻雜之多結晶矽 層之成膜作業、利用對於多結晶矽層進行陽極氧化而形成 包含多結晶矽之晶粒和奈米序列之矽微結晶之多孔質多結 晶矽層之陽極氧化處理作業、以及利用急速加熱法而對於 多孔質多結晶矽層進行急速熱氧化來分別在晶粒和奈米序 列之矽微結晶之表面形成薄矽氧化膜之氧化作業所形成。 -8- (5) (5)200307326 在陽極氧化處理作業，作爲陽極氧化用電解液，係使 用以大槪1 : 1而混合氟化氫水溶液和乙醇之混合液。在 氧化作業，例如使用燈退火裝置，在乾燥氧中，於短時間 內，使得基板溫度由室溫上升至9 0 0 °c爲止後，接著，藉 由在900 °C ’維持1小時而氧化基板。然後，下降基板溫 度至室溫爲止。 作爲在陽極氧化處理作業所使用之陽極氧化裝置，係 提議例如第2 4 A圖所示構造之裝置。該陽極氧化裝置係 具備：裝入由氟化氫水溶液和乙醇之混合液所構成之電解 液A之處理槽31和由浸漬在處理槽31內之電解液A中 之格子狀白金電極所構成之陰極33。接著，將在下部電 極1 2上而形成多結晶矽層之被處理物3 0，浸漬在電解液 A中，利用下部電極12，來作爲陽極。此外，該陽極氧 化裝置係具備：以下部電極1 2來作爲陽極而在陽極和陰 極3 3間進行通電以便於使得陽極成爲高電位之電流源3 2 。此外，還具備由將照射光於被處理物3 0之主表面側（ 也就是多結晶矽層之表面側）之鎢燈所構成之光源（並未 圖示）。 藉由使用這些陽極氧化裝置，利用在陽極和陰極33 間而流動定電流之陽極氧化方法，而使得多結晶矽層之對 象區域E，由表面開始，朝向深度方向，進行多孔質化， 形成包含多結晶矽之晶粒和奈米序列之矽微結晶之多孔質 多結晶砂層。 正如第25圖所示，爲了製造第22圖所示之電子源 (6) (6)200307326 1 0，因此，可以在絕緣性基板1 1之某一邊之主表面側而 設置複數個下部電極1 2後，接著，在絕緣性基板11之前 述主表面側，形成多結晶矽層3，對於多結晶矽層3中之 重疊於下部電極1 2之區域，進行陽極氧化。在下部電極 1 2，由下部電極1 2開始，通過連續呈一體地進行延長之 電流導入用配線1 2a而流動電流。 正如前面敘述，在氧化作業，進行藉由急速加熱法所 造成之急速熱氧化。但是，爲了在全部之矽微結晶及晶粒 之表面，形成良好膜質之矽氧化膜，因此，提議：在氧化 作業來使用在由硫酸、硝酸等之水溶液所構成之電解液（ 電解質溶液）中而對於多孔質多結晶矽層呈電化學地進行 氧化之電化學氧化方法之方式。也就是說，認爲藉由在漂 移層6內，氧化多孔質多結晶砂層，而在多孔質多結晶砂 層所包含之許多矽微結晶和許多晶粒之各個表面上，形成 薄矽氧化膜。因此，爲了在全部之矽微結晶及晶粒之表面 ，形成良好膜質之矽氧化膜，因此，提議在形成漂移層6 時、例如在由1 mo 1 / 1硫酸、硝酸等之水溶液所構成之電 解液中而對於多孔質多結晶矽層呈電化學地進行氧化之電 化學氧化方法。 爲了對於多孔質多結晶矽層呈電化學地進行氧化，因 此，使用將第24A圖、第24B圖之陽極氧化裝置之電解 液A替換成爲例如由硫酸水溶液所構成之電解液B之第 23A圖、第23B圖之電化學氧化裝置。正如第23B圖所 示，陰極之外形尺寸係設定成爲相同於多結晶矽層之對象 -10- (7) (7)200307326 區域E之同樣外形尺寸。可以藉由使用該電化學氧化裝置 ，在陽極和陰極3 3間，由電流源3 2開始流動電流’而使 得對象區域E之多孔質多結晶矽層，呈電化學地進行氧化 ，在矽微結晶及晶粒之表面，形成矽氧化膜。 此外，在形成多孔質多結晶矽層之狀態下，藉由在陽 極和陰極3 3間，僅在既定時間，流動既定電流，而結束 陽極氧化處理，但是，在對於多孔質多結晶矽層呈電化學 地進行氧化之狀態下，在陽極和陰極3 3間，流動既定電 流，在使得陽極和陰極3 3間之電壓上升至配合電子源1 0 之特性（例如射極電流或絕緣耐壓等）所設定之既定電壓 爲止之時間點，停止通電（例如參考日本特開 200 1 -155622號公報）。 如果使用對於多孔質多結晶矽層呈電化學地進行氧化 之電化學氧化方法的話，則比起急速地對於多孔質多結晶 矽層進行熱氧化而形成漂移層6之狀態，還能夠更加使得 製程溫度，進行低溫化。因此，能夠使得基板材料之限制 變少，達到電子源1 〇之大面積化及低成本化。 但是，在利用前述電化學氧化方法所製造之習知之電 子源1 0，會有所謂射極電流Ie或絕緣耐壓之面內不均變 大而良品率變低之問題產生。也就是說，在利用前述電化 學氧化方法所製造之電子元件，會有所謂射極電流或絕緣 耐壓等之特性不均變大之問題產生。作爲射極電流或絕緣 耐壓等之特性不均變大之要因，係列舉以下者。 1)在前述電化學氧化方法，因爲由電解液B之電阻所 -11 - (8) (8)200307326 造成之電壓上升部分係包含在陽極和陰極間之電壓’結果 ，因爲由電解液B之電阻不均所造成之電壓上升部分之不 均，而使得隨著氧化膜之形成所帶來之電壓値之增加部份 ，變得不均。 2) 正如第23B圖所示，設定陰極33之外形尺寸，成 爲相同於多結晶矽層之對象區域E之同樣外形尺寸，因此 ，透過電解液B而在第23A圖中之箭號所示之通路，來 流動電流，使得在對象區域E之周圍部之電流密度，更加 高於其他區域。 3) 在電化學氧化時，在成爲半導體層之多孔質多結晶 石夕層之主表面，附著氣泡，抑制在附著氣泡之部分之反應 〇 結果，在1 )，主要是在處理之每一個批量之射極電 流或絕緣耐壓等之特性不均變大，此外，在2)、3 )，主要 是在樣本面內之射極電流或絕緣耐壓等之不均變大，會有 所謂電子元件之良品率低之意外發生。 【發明內容】 本發明係爲了解決前述問題而完成的，其目的係提供 一種比起習知而能夠還更加縮小電子元件之射極電流或絕 緣耐壓等之特性不均之電化學氧化方法。 爲了達成前述目的，因此，本發明之電化學氧化方法 ，藉由以相反於成爲電化學氧化對象之半導體層主表面之 相反側之電極，作爲陽極，在半導體層和陰極接合於電解 液之狀態下，於陽極和陰極間，通過電流，以便於氧化半 -12- (9) (9)200307326 導體層。在該電化學氧化方法，首先在陽極和陰極間，通 過電流，開始進行氧化。接著，根據藉由預先求出之電解 液電阻所造成之電壓上升値V0而修正陽極和陰極間之電 壓V來求出之修正電壓値Vt，係在成爲預先所設定之上 限電壓値V 1之狀態下，結束氧化。 如果藉由該電化學氧化方法的話，則不論電解液之電 阻，能夠抑制由氧化開始至氧化結束爲止之期間之陽極和 陰極間之電壓値之增加部分之不均。也就是說，可以抑制 隨著氧化膜形成所帶來之電壓値之增加部分之不均，能夠 縮小電子元件之特性不均。 最好是在該電化學氧化方法，控制半導體層主表面之 電流密度，以便於抑制在半導體層之氧化對象區域周邊部 之電流密度變得大於氧化對象區域之其他部分。在該狀態 下，可以使得在氧化對象區域之電流密度之面內不均，更 加小於習知，能夠使得電子元件特性之面內不均，更加小 於習知。 此外，最好是在通過電流時，使得附著在半導體層主 表面上之氣泡，在通過電流時，由主表面脫離。在該狀態 下’可以防止在氧化對象區域之反應由於氣泡而受到抑制 ，能夠縮小電子元件特性之面內不均。 【實施方式】 [發明之最佳實施形態] 本案係根據在日本所申請之日本特願2002-138993號 -13- (10) (10)200307326 ，其內容係全面地組裝於此。 以下，具體地說明本發明之數個實施形態。但是，在 共通於各個實施形態之構件、也就是構造及功能在實質成 爲相同之構件，附加共通之參考編號，省略重複之說明。 (實施形態1 ) 在實施形態1，以利用電化學氧化方法所形成之電子 元件之電子源（電場放射型電子源），作爲例子，而進行 說明。 正如第1圖所示，在實施形態1之電子源1 0，在由 絕緣性基板（例如具有絕緣性之玻璃基板、具有絕緣性之 陶瓷基板等）所構成之基板1 1之某一邊之主表面側，形 成電子源元件1 0a。電子源元件l〇a係藉由形成在基板1 1 之前述主表面側之下部電極1 2、形成在下部電極1 2上之 無摻雜之多結晶矽層3、形成在多結晶矽層3上之漂移層 6(強電場漂移層）、以及形成在漂移層6上之表面電極 7所構成。也就是說，在電子源元件1 0a，表面電極7和 下部電極1 2係進行對向，在表面電極7和下部電極1 2間 ，介在漂移層6。在實施形態1，使用絕緣性基板，來作 爲基板1 1，但是，也可以使用矽基板等之半導體基板， 來作爲基板，藉由半導體基板和層積在該半導體基板背面 上之導電性層（例如歐姆電極）而構成下部電極。此外， 在漂移層6和下部電極1 2間，介在多結晶矽層3，但是 ，也可以直接在下部電極1 2上，形成漂移層6。 -14- (11) 200307326 下部電極1 2係由金屬材料（例如M〇、c r、W、 Ta、Ni、A1、CU、An、Pt等之金屬或這些之合金、 砂化物等之金屬間化合物）所組成之單層薄膜而構试 是，也可以藉著由這些金屬材料所組成之多層薄膜而 。此外，也可以藉由摻雜不純物之多結晶矽等之半_ 料而構成。下部電極12之厚度係設定在30〇nm左右 在表面電極7之材料，使用工作函數小之材料、 金’但是，該材料係並非限定爲金。表面電極7係不 爲單層構造，也可以是多層構造。表面電極7之厚虔 以是通過漂移層6之電子能夠貫通之厚度，可以設 10〜15nm左右。 正如第2圖所示，爲了由電子源1〇釋出電子 ，配設集極電極21而面對著表面電極7。接著， 面電極7和集極電極2 1間，成爲真空狀態，在表 7和下部電極1 2間，施加直流電壓Vps，以便於使 電極7相對於下部電極1 2，成爲高電位。同時， 電極2 1和表面電極7間，施加直流電壓V c，以便 集極電極21相對於表面電極7，成爲高電位。如 地設定各個直流電壓Vps、Vc的話，則由下部電極 注入至漂移層6之電子，係漂移在漂移層6中，通 電極7而被釋出（第2圖中之一點鏈線係顯示通過 極7所釋出之電子e -之流動。）。認爲到達至漂 表面之電子係熱電子，容易貫通表面電極7而釋放 中。在該電子源1 〇，射極電流I e相對於二極體電 Τί > 或者 :。但 ‘構成 :體材 〇 例如 :限定 :係可 定在 因此 .得表 電極 =表面 :集極 •使得 適當 12而 :表面 面電 .層6 真空 I Ips -15- (12) (12)200307326 之比率（==Ie/Ips)越大，電子釋出效率（=(Ie/IPs )xl〇〇[%])係變得越高。 正如第3圖所示，認爲漂移層6係藉由進行利用後面 敘述之陽極氧化方法所造成之奈米結晶化製程及利用電化 學氧化方法所造成之氧化製程而形成’至少由列設在下部 電極1 2之前述主表面側上之柱狀多結晶矽之晶粒（半導 體結晶）5 1、形成在晶粒51表面上之薄矽氧化膜5 2、介 在於晶粒5 1間之許多奈米序列之矽微結晶（半導體微結 晶）6 3、以及形成在各個矽微結晶6 3表面上而成爲膜厚 小於該砂微結晶6 3之結晶粒徑之氧化膜之許多砂氧化膜 (絕緣膜）64所構成。各個晶粒5 1係延長於下部電極1 2 之厚度方向。 在電子源10，考慮在以下之模型而引起電子釋出。 也就是說，在表面電極7和下部電極1 2間，施加直流電 壓Vps，以便於使得表面電極7成爲高電位，同時，在集 極電極21和表面電極7間，施加直流電壓Vc，以便於使 得集極電極2 1成爲高電位側。在藉此而使得直流電壓 Vps達到既定値（臨界値）時，由下部電極1 2開始，對 於漂移層6，注入熱激發之電子e -。另一方面，施加在漂 移層6之電場大部分係施加在矽氧化膜64。因此，注入 至漂移層6之電子e -係藉由施加在矽氧化膜64之強電場 而進行加速。接著，電子係在漂移層6內，使得晶粒5 1 間之區域’朝向表面，沿著第3圖中之箭號方向，來進行 漂移，貫通表面電極7，而釋放至真空中。像這樣，在漂 -16- (13) (13)200307326 移層6，由下部電極12所注入之電子係幾乎不在矽微結 晶63發生散亂，藉由施加在矽氧化膜64之電場而進行漂 移，通過表面電極7而進行釋放。此外，在漂移層6所產 生之熱係通過晶粒5 1而進行釋出。因此，在電子釋出時 ，並無發生跳躍現象，能夠穩定地釋出電子。 以下，參照第4A圖〜第4D圖，並且，說明實施形 態1之電子源1 0之製造製程。 在該製造製程，首先在由具有絕緣性之玻璃基板所構 成之基板11之某一邊之主表面上，藉由濺鍍法而形成由 既定膜厚（例如3 00nm左右）之金屬膜（例如鎢膜）所 構成之下部電極1 2。然後，在基板1 1之前述主表面側之 全面，藉由例如電漿CVD法而形成既定膜厚（例如1 .5 // m )之無摻雜之多結晶矽層3。藉此而得到第4 A圖所示 之構造體（中間體）。此外，多結晶矽層3之成膜方法係 並非僅限定在電漿CVD法，也可以使用LPCVD法、觸媒 CVD 法、縣鍍法、CGS ( Continuous Grain Silicon ··連續 晶粒矽）法等。 在形成無摻雜之多結晶矽層3後，藉由進行前述奈米 結晶化製程，而形成混在多結晶矽之許多晶粒5 1 (參照 第3圖）和奈米序列之許多矽微結晶63 (參照第3圖） 之複合奈米結晶層4。藉此而得到第4B圖所示之構造體 。在奈米結晶化製程，使用第24A圖、第24B圖之陽極 氧化裝置，使用裝入以大槪1 : 1來混合55wt%之氟化氫 水溶液和乙醇之混合液所構成之電解液A之處理槽。接 -17- (14) 200307326 著’以白金電極作爲陰極3 3，以下部電極1 2作爲陽極， 對於多結晶矽層3，進行光照射，同時，僅在既定時間（ 例如1 〇秒鐘），流動既定電流（例如電流密度爲1 2mA/ cm2之電流）。藉此而形成複合奈米結晶層4。該複合奈 米結晶層4係包含多結晶矽之晶粒5 1及矽微結晶6 3。此 外，在實施形態1，複合奈米結晶層4係構成半導體層。 在結束奈米結晶化製程後，進行前述氧化製程。藉此 而形成由第3圖所示構造之複合奈米結晶層所構成之漂移 層6，得到第4C圖所示之構造體。 氧化製程係使用第5圖所示之電化學氧化裝置而進行 。也就是說，在放入至處理槽3 1之電解液（例如在由乙 二醇所構成之有機溶媒中而溶解由0.04m〇l/ 1之硝酸鉀 所構成之溶質之溶液）B中，浸漬形成複合奈米結晶層4 之被處理物3 0。接著，在電解液B中，於複合奈米結晶 層4，呈對向地配置由格子狀白金電極所構成之陰極3 3。 接著，以下部電極1 2作爲陽極，由電流源3 2開始，在陽 極（下部電極1 2 )和陰極3 3間，流動一定電流（例如電 流密度爲O.lmA/cm2之電流）。藉此而進行使得複合奈 米結晶層4呈電化學地氧化之氧化處理，形成包含晶粒 51、矽微結晶63和各個矽氧化膜52、64之漂移層6。 該電化學氧化裝置係具備：藉由浸漬在處理槽3 1之 電解液B中之一對電阻測定用電極3 4a、3 4b而檢測電解 液B之電阻之電阻檢測部3 5、檢測陽極和陰極3 3間之電 位差之電壓檢測部3 6、以及根據藉由電壓檢測部3 6所造 -18- (15) 200307326 成之檢測電壓和藉由電阻檢測部3 5所造成之檢測電阻 而控制電流源3 2之輸出之控制部3 7。控制部3 7係根 預先藉由電阻檢測部3 5所造成之檢測電阻値而求出藉 電解液B之電阻所造成之電壓上升値V0 (參照第6A )，然後，藉由控制電流源3 2而由電流源3 2，流動一 電流，以便於開始進行氧化處理。此外，控制部3 7係 行由藉著電壓檢測部3 6所造成之檢測電壓V而減算電 上升値V 0之修正。接著，在修正後之電壓Vt達到既 之上升電壓値V1 (參照第6B圖）時，藉由停止電源 之輸出而結束氧化處理。此外，在實施形態1，在藉由 行奈米結晶化製程所形成之複合奈米結晶層4，晶粒 及砂微結晶63以外之區域係成爲由非結晶矽所構成之 結晶區域。此外，在漂移層6，晶粒5 1、矽微結晶63 矽氧化膜52、64以外之區域，係成爲由非結晶矽或一 分氧化之非結晶砂所構成之非結晶區域65。但是，隨 奈米結晶化製程之條件’而使得非結晶區域6 5成爲孔 在該狀態下，複合奈米結晶層4係相同於習知例，可以 爲多孔質多結晶矽層。 在形成漂移層6後，例如藉由蒸鍍法等而使得由金 膜所構成之表面電極7，形成在漂移層6上。藉此而得 第4D圖所示之電子源10。 但是，正如第6A圖所示，在使用習知之電化學氧 方法而形成漂移層6之狀態下，在陽極和陰極3 3間之 壓達到既定電壓（V0 + V 1 )之時間點，結束氧化處理 値 據 由 圖 定 進 壓 定 32 進 5 1 非 及 部 著 〇 成 屬 到 化 電 -19- (16) 200307326 在此，在該既定電壓，除了隨著氧化膜（矽氧化膜52、 64 )之形成所帶來之電壓値之增加部分（V 1 )以外，還 包含由於電解液B之電阻所造成之電壓上升値V0，但是 ，該電壓上升値V 0，係由於電解液之製作•連續使用· 保管狀態所造成之電解液B之比電阻之不均、陰極電極之 形狀、樣本之表面狀態而變得不均，因此，在既定電壓（ V0+ VI )成爲一定之狀態下，隨著矽氧化膜52、64之形 成所帶來之電壓値之增加部分係變得不均，結果，電子源 1 0之射極電流或絕緣耐壓係變得不均，導致良品率降低 〇 相對於此，如果藉由實施形態1之製造方法的話，則 在形成漂移層6時，在對於成爲結晶層之複合奈米結晶層 4呈電化學地進行氧化之電化學氧化製程，於陽極和陰極 3 3間，通過電流而開始進彳了氧化。接著，在根據藉由預 先所求出之電解液B之電阻所造成之電壓上升値V0而修 正陽極和陰極3 3間之電壓之電壓値Vt達到上限電壓値 V 1之時間點，結束氧化。因此，不論由於電解液之製作 •連續使用•保管狀態所造成之電解液B之電阻不均，也 能夠抑制由氧化開始至氧化結束爲止之期間之陽極和陰極 3 3間之電壓値之增加部分之不均。也就是說，能夠抑制 隨著氧化膜（矽氧化膜52、64 )之形成所帶來之電壓値 之增加部分之不均，可以縮小電子源1 0之射極電流或絕 緣耐壓等之特性不均。 在實施形態1之電化學氧化方法，在通電於陽極和陰 -20 - (17) 200307326 極33間之前，藉由電阻測定用電極34a、34b而檢測 液B之電阻，由檢測電阻値而求出前述電壓上升値 在該狀態下，不通電於陽極和陰極3 3間而得到電壓 値V0，因此，在檢測電解液B之電阻時，可以防止 半導體層（結晶層）之複合奈米結晶層4氧化。此外 阻測定用電極34a、34b間之距離係最好設定成爲對 被處理物3 0和陰極3 3間之距離。此外，在實施形態 配合於被處理物3 0和陰極3 3間之距離或陰極3 3之 等之參數係輸入至控制部3 7。接著，在控制部3 7， 這些參數及電阻檢測部3 5之檢測電阻値而求出電解 之比電阻，由比電阻而求出前述電壓上升値V0。 此外，在電化學氧化製程所使用之電解液B係在 溶媒溶解電解質之溶液。因此，比起像習知一樣，藉 由硫酸、硝酸等之水溶液所構成之電解液中、呈電化 氧化半導體層而形成矽氧化膜5 2、64，還比較能夠 化膜中，不放入水分，使得矽氧化膜52、64之緻密 高，提高矽氧化膜5 2、64之絕緣耐壓。正如前面敘 在使用有機溶媒而作爲電解液B之溶媒之狀態下，比 用水而作爲電解液B之溶媒之狀態，還比較大多使得 液B之電阻，變得非常高，這個係在非極性有機溶媒 得特別顯著。像這樣，在使用有機溶媒之狀態下，由 解液B之電阻所造成之電壓上升値V0變大，因此， 形態1之電化學氧化製程係變得特別有效。 在利用實施形態1之電子源1 〇來作爲顯示器之 電解 V0。 上升 成爲 ，電 應於 1， 形狀 使用 液B 有機 由在 學地 在氧 性變 述， 起使 電解 , 變 於電 實施 電子 -21 - (18) (18)200307326 源之狀態下，可以適當地對於下部電極1 2、表面電極7 和漂移層6等，進行圖案化，將許多電子源元件1 0a，呈 矩陣狀地配列在基板1 1之前述主表面側。此外，在實施 形態1，以電子源1 0之製造製程，作爲例子而進行說明 ’但是，本發明之電化學氧化製程係並非限定在電子源之 製造製程，當然也可以使用在各種半導體裝置之製造製程 上0 (實施形態2 ) 以下，說明本發明之實施形態2。正如前面敘述，在 實施形態1之電子源1 0之製造製程，使用第5圖所示之 電化學氧化裝置，在氧化處理開始前，藉由電阻測定用電 極3 4a、3 4b而測定電解液B之電阻。接著，考慮被處理 物3 0和陰極3 3間之距離或陰極3 3之形狀等而修正電壓 檢測部3 6之檢測電壓。但是，在該狀態下，由於被處理 物3 0之表面狀態而使得電解液B之電阻，發生變動。 相對於此，正如第7圖所示，在實施形態2，於被處 理物3 0之半導體層（複合奈米結晶層4 )之主表面，不 同於要求之氧化對象區域3 0a，而另外設置電阻測定用區 域30b。接著，在通電於陽極和陰極33間之前，使用電 阻測定用區域3 Ob，檢測電解液B之電阻，而由檢測電阻 値，來求出電壓上升値V0。此外，使用該電壓上升値V0 ，而修正由於電壓檢測部3 6所造成之檢測電壓。在該方 面，實施形態2係不同於實施形態1。 -22- (19) (19)200307326 在實施形態2，能夠在檢測電解液B之電阻時，防止 成爲半導體層之複合奈米結晶層4發生氧化，並且，可以 檢測反應複合奈米結晶層4表面狀態之電解液B之電阻。 因此，可以使得檢測電阻値和通電開始時之電解液B之電 阻値間之差異變小，能夠更加地縮小電子源1 0之特性不 均。此外，電子源1 〇之構造及動作係相同於實施形態1 ，因此，省略圖示及說明。 (實施形態3) 以下，說明本發明之實施形態3。正如前面敘述，在 實施形態2之電化學氧化方法，必須在被處理物3 0，不 同於氧化對象區域3 0a，而另外設置電阻測定用區域3 Ob 。但是，由於氧化對象區域3 0a之圖案形狀等，而會有無 法設置電阻測定用區域3 Ob之狀態或者是不容易進行對應 於電阻測定用區域3 Ob之電極拉出之狀態發生。 因此，在實施形態3，使用第8圖所示之電化學氧化 裝置。接著，在進行被處理物3 0之氧化處理時，於通電 至陽極（下部電極12 )和陰極3 3間之前，使用形成爲形 狀相同於形成成爲電化學氧化對象之半導體層（複合奈米 結晶層4 )之被處理物3 0之同一形狀之電阻監視用試料 (並未圖示），檢測電解液B之電阻。接著，由檢測電阻 値，來求出前述電壓上升値V0。在該方面，實施形態3 係不同於實施形態2。 在實施形態3，於通電至陽極和陰極3 3間之前，使 -23- (20) (20)200307326 用電阻監視用試料，來檢測電解液B之電阻，由該檢測電 阻値，來求出前述電壓上升値V0，因此，可以在檢測電 解液B之電阻時，防止成爲半導體層之複合奈米結晶層4 發生氧化。並且，可以使得檢測電砠値和通電開始時之電 解液B之電阻値間之差異變小，能夠更加地縮小電子源 1 0之特性不均。此外，電子源1 0之構造及動作係相同於 實施形態1，因此，省略圖示及說明。 (實施形態4 ) 以下，說明本發明之實施形態4。正如前面敘述，在 實施形態1〜3之電化學氧化方法，在陽極（下部電極1 2 )和陰極3 3間之電壓達到上限電壓値V1之時間點，結 束氧化處理。在該狀態下，比起在漂移層6之厚度方向而 形成於接近下部電極12之位置上之矽氧化膜52、64，形 成在由下部電極12開始之遙遠位置上之矽氧化膜52、64 之膜厚過薄，或緻密性不充分，或者是無法得到充分之絕 緣耐壓。 因此，在實施形態4，使用第9圖所示之電化學氧化 裝置。接著，正如第1 〇圖所示，在陽極和陰極3 3間之修 正後之電壓Vt達到上限電壓値V 1後，使得陽極和陰極 3 3間之修正後之電壓Vt維持在上限電壓値V 1，並且， 在使得流動於陽極和陰極3 3間之電流I減少至既定値11 爲止時，結束氧化。 正如第9圖所示，實施形態4之電化學氧化裝置係具 -24- (21) (21)200307326 備：透過電流感測器3 8而檢測流動在陽極和陰極3 3間之 電流之電流檢測部3 9。此外，該電化學氧化裝置係除了 電流源3 2以外，還具備切換電壓源40以及電流源3 2和 電壓源40之切換開關41。在此，控制部37係在通電開 始前，根據藉由電解液B之電阻所造成之電壓上升値V0 而修正上限電壓値V1。接著，控制部3 7係在減少電流I 之期間，根據成爲流動電解液B之電流値和電解液B之 電阻間之乘積之電壓上升値V0，而依次地對於修正後之 電壓Vt，進行修正。此外，對於實施形態2、3之電化學 氧化裝置，也可以適用實施形態4之前述技術思想。 在實施形態4，可以抑制由通電開始至達到上限電壓 値V 1爲止之期間之電壓値增加部分之不均。此外，在達 到上限電壓値V 1後，配合電流減少至既定値〗丨爲止之期 間之流動電解液B之電流變化而對於修正後之電壓Vt， 進行修正，因此，在修正後之電壓Vt達到上限電壓値V 1 後’可以抑制隨著電流I減少至既定値11爲止之期間之 氧化膜之形成所帶來之電壓値不均。因此，能夠縮小電子 源1 〇之特性不均。此外，在電流I減少至既定値爲止時 ，結束氧化，因此，氧化膜係緻密化，絕緣耐壓也提高。 (實施形態5 ) 以下’說明本發明之實施形態5。在實施形態5，作 爲利用電化學氧化方法所形成之電子元件，係以相同於實 施形態1之狀態之同樣電子源，作爲例子而進行說明。也 -25- (22) (22)200307326 就是說，實施形態5之電子源1 0之構造、功能、優點和 電子釋出方法等係相同於實施形態1 (參考第1圖〜第3 圖）。 以下，參照第1 1 A圖〜第1 1 D圖，並且’說明實施 形態5之電子源1 0之製造製程。在該製造製程’首先相 同於實施形態1之狀態，在絕緣性基板1 1之某一邊之主 表面上而形成由金屬膜所構成之下部電極1 2後’在絕緣 性基板1 1之前述主表面側之整個面上，形成無摻雜之多 結晶矽層3。藉此而得到第1 1 A圖所示之構造體。 在形成多結晶矽層3後，藉由奈米結晶化製程（陽極 氧化處理作業）而形成混在多結晶矽之許多晶粒5 1 (參 照第3圖）和許多矽微結晶63 (參照第3圖）之複合奈 米結晶層4。藉此而得到第1 1 B圖所示之構造體。此外， 奈米結晶化製程係相同於實施形態1。 在奈米結晶化製程結束後，藉由進行氧化製程，而對 於複合奈米結晶層4，呈電化學地進行氧化。藉此而形成 由第3圖所示構造之複合奈米結晶層所構成之漂移層6， 得到第1 1 C圖所示之構造體。在氧化製程（氧化作業）， 使用前述第12A圖所示之電化學氧化裝置，進行成爲半 導體層（結晶層）之複合奈米結晶層4之電化學氧化。該 電化學氧化裝置係在基本上，成爲相同於第23A圖所示 之習知之電化學氧化裝置之同樣裝置。但是，藉由調整陰 極3 3之形狀而控制多結晶矽層3主表面之電流密度以便 於抑制對象區域E之周圍部之電流密度變得大於對象區域 -26- (23) (23)200307326 E之其他部分之方面，係不相同。 具體地說，正如第12A圖、第12B圖所示，藉由設 定格子狀陰極3 3之外形尺寸更加小於對象區域E (氧化 對象區域）之外形尺寸，以便於抑制在多結晶矽層3之周 圍部之電流密度變得大於對象區域E之其他部分。換句話 說，決定陰極3 3之形狀，而使得陰極之每單位面積之比 表面積在周圍部，變得小於其他部分，以便於涵蓋對象區 域E之整個面，使得電流密度變得均勻。在該方面，不同 於習知之電化學氧化方法。 在氧化製程，作爲放入至處理槽3 1之規定之電解液 B，係使用例如在由乙二醇所構成之有機溶媒中而溶解由 0.04mol/ 1之硝酸鉀所構成之溶質之溶液。接著，將形成 複合奈米結晶層4之被處理物3 0浸漬在電解液B中，在 電解液B中，呈對向地配置複合奈米結晶層4和陰極3 3 。在此，以下部電極1 2作爲陽極，由電源開始至陽極（ 下部電極1 2 )和陰極3 3間，流動定電流（例如電流密度 爲0.1mA / cm2之電流），進行對於複合奈米結晶層4呈 電化學地進行氧化之氧化處理。藉此而形成包含晶粒5 1 、矽微結晶63和各個矽氧化膜52、64之漂移層6。 在實施形態5，在藉由進行奈米結晶化製程而形成之 複合奈米結晶層4 ’晶板5 1和砂微結晶6 3以外之區域係 成爲由非結晶矽所構成之非結晶區域。此外，在漂移層6 ，晶粒5 1、矽微結晶63及各個矽氧化膜52、64以外之 區域，係成爲由非結晶砂或一部分氧化之非結晶砂所構成 -27- (24) 200307326 之非結晶區域6 5。但是，隨著奈米結晶化製程（陽極氧 化處理）之條件，而使得非結晶區域65成爲孔。在該狀 態下，複合奈米結晶層4係相同於習知例，可以成爲多孔 質多結晶矽層。 在形成漂移層6後，例如藉由蒸鍍法等而使得由金屬 膜所構成之表面電極7，形成在漂移層6上。藉此而得到 第11D圖所示構造之電子源10。200307326 (1) 发明. Description of the invention [Technical field to which the invention belongs] The present invention relates to a method for electrochemical oxidation of semiconductors. [Prior Art] Conventionally, as a technique for making a semiconductor porous or forming an oxide film on a semiconductor surface, a wet anodizing method is known. In addition, as a technique for forming an oxide film on a semiconductor surface, an electrochemical oxidation method using an electrochemical reaction is known. In addition, in recent years, an electric field emission type electron source formed by a process using a wet anodizing method and an electrochemical oxidation method has been proposed. For example, as shown in FIG. 20, in such an electric field emission type electron source 10 (hereinafter, simply referred to as "electron source 10"), the main surface on one side of the n-type silicon substrate 1 which becomes a conductive substrate On the other hand, a strong electric field drift layer 6 (hereinafter, simply referred to as "drift layer 6") composed of an oxidized porous polycrystalline silicon layer is formed. Next, on the drift layer 6, a surface electrode 7 composed of a metal thin film (for example, a gold thin film) is formed. On the other hand, an ohmic electrode 2 is formed on the back surface of the n-type silicon substrate 1. Here, the lower electrode 12 is constituted by the n-type silicon substrate 1 and the ohmic electrode 2. In the example shown in Fig. 20, a non-doped polycrystalline silicon layer 3 is interposed between the n-type silicon substrate 1 and the drift layer 6. However, it is also proposed to directly form an electron source of the drift layer 6 on the main surface of the n-type silicon substrate 1. In order to release electrons from the electron source 10 shown in Fig. 20, a collector electrode 21 is provided to face the surface electrode 7. Next, make the surface voltage -5- (2) (2) 200307326 between the electrode 7 and the collector electrode 21 into a vacuum state, and apply a DC voltage Vps between the surface electrode 7 and the lower electrode 12 to make the surface electrode 7 It has a high potential with respect to the lower electrode 12. At the same time, a DC voltage Vc is applied between the collector electrode 21 and the surface electrode 7 so that the collector electrode 21 becomes a high potential with respect to the surface electrode 7. If the respective DC voltages Vps and Vc are set appropriately, the electrons injected into the drift layer 6 from the lower electrode 12 drift in the drift layer 6 and are released through the surface electrode 7 (one point chain in FIG. 20) The line system shows the flow of the electrons I released through the surface electrode 7.). The surface electrode 7 is formed of a metal material having a small work function. In the electron source 10 shown in FIG. 20, a lower electrode 12 is constituted by an n-type silicon substrate 1 and an ohmic electrode 2. However, as shown in FIG. 21, it is also proposed to form an electron source 10 of a lower electrode 12 made of a metal material on the main surface on one side of the insulating substrate 11. The electron source 10 shown in Fig. 21 also emits electrons by the same process as the electron source 10 shown in Fig. 20. In such an electron source 10, the current flowing between the surface electrode 7 and the lower electrode 12 is generally called "diode current Ips", and the current flowing between the collector electrode 21 and the surface electrode 7 is called It is "emitter current (released electron current) Ie". At the electron source 10, the larger the ratio of the emitter current Ie to the diode current Ips (= Ie / Ips), the higher the electron emission efficiency (= (Ie / Ips) X 1 〇〇 [%]) becomes The higher. In addition, the higher the DC voltage Vps, the larger the emitter current Ie becomes. This electron source 10 has a small degree of dependence on the degree of vacuum of its electron emission characteristics, and during electron emission, -6- (3) (3) 200307326 does not cause a jump phenomenon, and can stably with high electron emission efficiency Free up electrons. In a state where the electron source 10 shown in FIG. 21 is used as the electron source of the display, the structure shown in FIG. 22 is adopted, for example. In the display shown in Fig. 22, a panel 30 made of a flat glass substrate is arranged facing the electron source 10. A collector electrode (hereinafter, referred to as an "anode electrode") composed of a transparent conductive film (such as an ITO film) is formed on the surface opposite to the electron source 10 of the panel 30. 21. In addition, on the surface facing the electron source 10 of the anode electrode 21, a fluorescent substance formed on each pixel and a black stripe composed of a black material formed between the fluorescent substances are disposed on each pixel. The fluorescent substance is coated on the opposite side from the electron source 10 of the anode electrode 21, and emits visible light through the electron beams radiated from the electron source 10. In the fluorescent substance, a collision occurs with a high-energy electron system radiated from the electron source 10 and accelerated by a voltage applied to the anode electrode 21. As fluorescent substances, various emission colors of R (red), G (green), and B (blue) are used. The panel 30 is separated from the electron source 10 by a rectangular frame (not shown), so that the air-tight space formed between the panel 30 and the electron source 10 becomes a vacuum state. Brother 2 The electron source 10 shown in the figure is equipped with an insulating substrate 11 made of a glass substrate, and a plurality of lower electrodes 1 arranged on the surface of the insulating substrate 11 2 to overlap the lower electrodes 1 2 Forms of a plurality of polycrystalline silicon layers 3, a plurality of drift layers 6 composed of oxidized porous polycrystalline silicon layers formed in the form of superimposed on the polycrystalline silicon layers 3, respectively, and embedded in a phase The polycrystalline silicon layer between adjacent drift layers 6 is composed of -7- (4) (4) 200307326 separation layer 16 and the drift layer 6 and separation layer 16 are arranged across the drift layer 6 and the separation layer 16 A plurality of surface electrodes 7 are provided in a direction intersecting with the lower electrode 12. In the electron source 10, the intersection point between the plurality of lower electrodes 12 provided on the surface of the insulating substrate 11 and the plurality of surface electrodes 7 provided in the direction intersecting with the lower electrode 12 A portion of the drift layer 6 is sandwiched on the part. Therefore, by appropriately selecting the combination between the surface electrode 7 and the lower electrode 12, a voltage is applied between the selected combinations so as to correspond to the point of intersection between the surface electrode 7 and the lower electrode 12 selected by the drift layer 6. A strong electric field is generated to release electrons. This is equivalent to arranging a polycrystalline silicon layer on the lower electrode 1 2 and the lower electrode 1 2 at a grid point of a matrix (lattice) composed of a group of a plurality of surface electrodes 7 and a group of a plurality of lower electrodes 12. 3. The state of the electron source element 10a formed by the drift layer 6 on the polycrystalline silicon layer 3 and the surface electrode 7 on the drift layer 6. Electrons can be released from the required electron source element 10a by selecting a combination between the surface electrode 7 and the lower electrode 12 to which a voltage is applied. In the conventional manufacturing process of the electron source 10, the drift layer 6 is a film-forming operation of forming an undoped polycrystalline silicon layer on the surface side of one side of the lower electrode 12 by using the polycrystalline silicon layer. Anodic oxidation to form a porous polycrystalline silicon layer containing polycrystalline silicon grains and nano-series silicon microcrystals; anodizing; and rapid thermal oxidation of the porous polycrystalline silicon layer by rapid heating It is formed by the oxidation operation of forming a thin silicon oxide film on the surface of the silicon microcrystals of the crystal grains and the nano-sequence. -8- (5) (5) 200307326 In the anodizing operation, as an electrolyte for anodizing, a mixed solution of a hydrogen fluoride aqueous solution and ethanol is used in a ratio of 1: 1. In the oxidation operation, for example, using a lamp annealing device, the substrate temperature is raised from room temperature to 900 ° C in a short period of time in dry oxygen, and then oxidized by maintaining it at 900 ° C for 1 hour. Substrate. Then, the substrate temperature was lowered to room temperature. As an anodizing device used in the anodizing operation, a device having a structure as shown in Fig. 24A is proposed. The anodizing device includes a treatment tank 31 containing an electrolytic solution A composed of a mixed solution of an aqueous hydrogen fluoride solution and ethanol, and a cathode 33 composed of a grid-shaped platinum electrode immersed in the electrolytic solution A in the processing tank 31. . Next, a to-be-processed object 30 having a polycrystalline silicon layer formed on the lower electrode 12 is immersed in the electrolytic solution A, and the lower electrode 12 is used as an anode. The anodic oxidation device includes a lower electrode 12 as an anode, and current is applied between the anode and the cathode 33 to make the anode a high potential current source 3 2. In addition, it also includes a light source (not shown) composed of a tungsten lamp that irradiates light on the main surface side of the object to be processed 30 (that is, the surface side of the polycrystalline silicon layer). By using these anodizing devices, an anodizing method in which a constant current flows between the anode and the cathode 33 is used to make the target region E of the polycrystalline silicon layer porous from the surface toward the depth direction. Polycrystalline silicon grains and nano-scale silicon microcrystalline porous polycrystalline sand layers. As shown in FIG. 25, in order to manufacture the electron source (6) (6) 200307326 1 0 shown in FIG. 22, a plurality of lower electrodes 1 may be provided on the main surface side of one side of the insulating substrate 1 1 After the second step, a polycrystalline silicon layer 3 is formed on the main surface side of the insulating substrate 11, and an area of the polycrystalline silicon layer 3 that overlaps the lower electrode 12 is anodized. Starting from the lower electrode 12, a current flows through the current introduction wiring 12 a extending continuously and integrally from the lower electrode 12. As described earlier, in the oxidation operation, rapid thermal oxidation by a rapid heating method is performed. However, in order to form a silicon oxide film with a good film quality on the surface of all the silicon microcrystals and crystal grains, it is proposed to use it in an electrolytic solution (electrolyte solution) composed of an aqueous solution of sulfuric acid, nitric acid, and the like in oxidation operations. The porous polycrystalline silicon layer is electrochemically oxidized by an electrochemical oxidation method. That is, it is thought that by oxidizing the porous polycrystalline sand layer in the drift layer 6, a thin silicon oxide film is formed on each surface of many silicon microcrystals and many crystal grains contained in the porous polycrystalline sand layer. Therefore, in order to form a silicon oxide film with good film quality on the surface of all the silicon microcrystals and crystal grains, it is proposed to form the drift layer 6 with, for example, an aqueous solution of 1 mo 1/1 sulfuric acid, nitric acid, or the like An electrochemical oxidation method for electrochemically oxidizing a porous polycrystalline silicon layer in an electrolytic solution. In order to electrochemically oxidize the porous polycrystalline silicon layer, FIG. 23A of FIG. 24A and FIG. 24B is used to replace the electrolytic solution A of the anodic oxidation device of FIGS. 24A and 24B with an electrolytic solution B composed of a sulfuric acid aqueous solution. , Figure 23B electrochemical oxidation device. As shown in FIG. 23B, the external dimensions of the cathode are set to be the same as those of the polycrystalline silicon layer. -10- (7) (7) 200307326 Region E has the same external dimensions. By using this electrochemical oxidation device, a current can be caused to flow from the current source 32 between the anode and the cathode 33, so that the porous polycrystalline silicon layer in the target region E can be electrochemically oxidized, On the surface of crystals and grains, a silicon oxide film is formed. In addition, in the state where the porous polycrystalline silicon layer is formed, the anodic oxidation treatment is terminated by flowing a predetermined current between the anode and the cathode 33, only for a predetermined time. In the state of electrochemical oxidation, a predetermined current flows between the anode and the cathode 33, so that the voltage between the anode and the cathode 33 rises to match the characteristics of the electron source 10 (such as emitter current or insulation withstand voltage, etc.) ) Stop the power supply at the time point set by the predetermined voltage (for example, refer to Japanese Patent Application Laid-Open No. 200 1-155622). If an electrochemical oxidation method that electrochemically oxidizes a porous polycrystalline silicon layer is used, the process of forming the drift layer 6 can be more advanced than the state where the porous polycrystalline silicon layer is thermally oxidized rapidly to form a drift layer 6. The temperature is lowered. Therefore, restrictions on the material of the substrate can be reduced, and the area and cost of the electron source 10 can be increased. However, in the conventional electron source 10 manufactured by the aforementioned electrochemical oxidation method, there is a problem that the so-called emitter current Ie or the in-plane unevenness of the dielectric breakdown voltage becomes large and the yield is low. That is to say, in the electronic component manufactured by the aforementioned electrochemical oxidation method, there is a problem that characteristics such as emitter current, insulation withstand voltage and the like become large. The following are the main reasons for variations in characteristics such as emitter current and insulation withstand voltage. 1) In the foregoing electrochemical oxidation method, the voltage rise caused by the resistance of the electrolyte B is caused by the voltage between the anode and the cathode '(8) (8) 200307326. The unevenness in the voltage rise caused by the uneven resistance makes the unevenness in the increase in voltage 値 caused by the formation of the oxide film. 2) As shown in FIG. 23B, the external dimension of the cathode 33 is set to be the same as the external dimension of the target region E of the polycrystalline silicon layer. Therefore, the electrolyte B passes through the electrolyte B and is shown by the arrow in FIG. 23A. The current flows through the channel, so that the current density around the target area E is higher than that in other areas. 3) During electrochemical oxidation, bubbles are attached to the main surface of the porous polycrystalline stone layer that becomes the semiconductor layer, and the reaction on the part where the bubbles are attached is suppressed. The result is that in 1), it is mainly in each batch processed Variations in characteristics such as emitter current or insulation withstand voltage become large. In addition, in 2) and 3), the variations in emitter current or insulation withstand voltage in the sample plane become large. Accidents of low yield of components occur. SUMMARY OF THE INVENTION The present invention has been made in order to solve the foregoing problems, and an object thereof is to provide an electrochemical oxidation method capable of further reducing unevenness in characteristics such as an emitter current or an insulation withstand voltage of an electronic component compared with a conventional one. In order to achieve the foregoing object, therefore, the electrochemical oxidation method of the present invention uses an electrode on the opposite side of the main surface of the semiconductor layer as the object of electrochemical oxidation as the anode, and the semiconductor layer and the cathode are bonded to the electrolyte. Next, a current is passed between the anode and the cathode to facilitate the oxidation of the -12- (9) (9) 200307326 conductor layer. In this electrochemical oxidation method, first, oxidation is started by passing a current between the anode and the cathode. Next, the correction voltage 値 Vt obtained by correcting the voltage V between the anode and the cathode based on the voltage rise 値 V0 caused by the electrolyte resistance obtained in advance is a value of the preset upper limit voltage 値 V 1 In the state, oxidation is completed. According to this electrochemical oxidation method, regardless of the resistance of the electrolytic solution, it is possible to suppress unevenness in an increase in the voltage 値 between the anode and the cathode during the period from the start of oxidation to the end of oxidation. In other words, it is possible to suppress unevenness in an increase in voltage 値 caused by the formation of an oxide film, and to reduce unevenness in characteristics of electronic components. Preferably, in this electrochemical oxidation method, the current density on the main surface of the semiconductor layer is controlled so as to suppress the current density at the periphery of the oxidation target region of the semiconductor layer from becoming larger than that of the other oxidation target regions. In this state, the in-plane unevenness of the current density in the oxidation target region can be made smaller than the conventional one, and the in-plane unevenness of the characteristics of the electronic component can be made smaller than the conventional one. In addition, it is preferable that the bubbles adhered to the main surface of the semiconductor layer are separated from the main surface when a current is passed. In this state, it is possible to prevent the reaction in the area to be oxidized from being suppressed by the bubbles, and to reduce the in-plane unevenness of the characteristics of the electronic device. [Embodiment] [Best Embodiment of Invention] This case is based on Japanese Patent Application No. 2002-138993 -13- (10) (10) 200307326 filed in Japan, and its contents are fully assembled here. Hereinafter, several embodiments of the present invention will be specifically described. However, components that are common to the various embodiments, that is, structures and functions that are substantially the same, are given the same reference numbers, and repeated descriptions are omitted. (Embodiment 1) In Embodiment 1, an electron source (electric field emission type electron source) of an electronic element formed by an electrochemical oxidation method will be described as an example. As shown in FIG. 1, the electron source 10 in Embodiment 1 has a main body on one side of a substrate 11 made of an insulating substrate (for example, a glass substrate having insulation, a ceramic substrate having insulation, etc.). On the front side, an electron source element 10a is formed. The electron source element 10a is formed by the lower electrode 1 formed on the aforementioned main surface side of the substrate 1 1, an undoped polycrystalline silicon layer 3 formed on the lower electrode 12, and a polycrystalline silicon layer 3 A drift layer 6 (a strong electric field drift layer) and a surface electrode 7 formed on the drift layer 6 are provided. That is, in the electron source element 10a, the surface electrode 7 and the lower electrode 12 are opposed to each other, and the drift electrode 6 is interposed between the surface electrode 7 and the lower electrode 12. In Embodiment 1, an insulating substrate is used as the substrate 11; however, a semiconductor substrate such as a silicon substrate may be used as the substrate. The semiconductor substrate and a conductive layer laminated on the back surface of the semiconductor substrate ( Such as an ohmic electrode). In addition, the polycrystalline silicon layer 3 is interposed between the drift layer 6 and the lower electrode 12. However, the drift layer 6 may be formed directly on the lower electrode 12. -14- (11) 200307326 The lower electrode 12 is an intermetallic compound made of a metal material (such as a metal such as Mo, cr, W, Ta, Ni, A1, CU, An, Pt, etc., or an alloy of these, or a sand compound ) Is composed of a single-layer thin film, and can also be a multilayer thin film composed of these metal materials. In addition, it can also be composed of semi-crystalline materials such as polycrystalline silicon doped with impurities. The thickness of the lower electrode 12 is set to about 30 nm. For the material of the surface electrode 7, a material having a small work function, gold 'is used. However, the material is not limited to gold. The surface electrode 7 does not have a single-layer structure, but may have a multilayer structure. The thickness of the surface electrode 7 is such that the electrons passing through the drift layer 6 can pass through, and can be set to about 10 to 15 nm. As shown in FIG. 2, in order to release electrons from the electron source 10, a collector electrode 21 is provided to face the surface electrode 7. Next, the surface electrode 7 and the collector electrode 21 are brought into a vacuum state, and a DC voltage Vps is applied between the table 7 and the lower electrode 12 so that the electrode 7 becomes a high potential with respect to the lower electrode 12. At the same time, a DC voltage V c is applied between the electrode 21 and the surface electrode 7 so that the collector electrode 21 becomes a high potential with respect to the surface electrode 7. If the DC voltages Vps and Vc are set as described above, the electrons injected from the lower electrode into the drift layer 6 drift in the drift layer 6 and are released through the electrode 7 (a point chain line in the second figure shows that The flow of electrons e-released by pole 7.). It is considered that the electrons reaching the drift surface are thermionic electrons, which easily penetrate the surface electrode 7 and are released. In the electron source 10, the emitter current I e is relative to the diode current T > or:. But ‘composition: body material 〇 For example: limitation: it can be set at this. The table electrode = surface: collector • make appropriate 12 and: surface surface electricity. Layer 6 Vacuum I Ips -15- (12) (12) 200307326 The larger the ratio (== Ie / Ips), the higher the electron emission efficiency (= (Ie / IPs) x 100 (%)) becomes. . As shown in FIG. 3, it is considered that the drift layer 6 is formed by performing a nanocrystallization process using an anodic oxidation method described later and an oxidation process using an electrochemical oxidation method. The crystal grains (semiconductor crystals) of the columnar polycrystalline silicon on the main surface side of the lower electrode 1 2 5 1. A thin silicon oxide film 5 formed on the surface of the crystal grain 51 2. Many interposed between the crystal grains 5 1 Nano-series silicon microcrystals (semiconductor microcrystals) 6 3, and many sand oxide films formed on the surface of each silicon microcrystal 6 3 to become oxide films having a film thickness smaller than the crystal grain size of the sand microcrystals 63 ( Insulating film) 64. Each crystal grain 51 extends in the thickness direction of the lower electrode 12. In the electron source 10, the following model is considered to cause electron emission. In other words, a DC voltage Vps is applied between the surface electrode 7 and the lower electrode 12 so that the surface electrode 7 becomes a high potential, and a DC voltage Vc is applied between the collector electrode 21 and the surface electrode 7 so that The collector electrode 21 is set to the high potential side. When the DC voltage Vps reaches a predetermined threshold (critical threshold) by this, starting from the lower electrode 12, for the drift layer 6, a thermally excited electron e-is injected. On the other hand, most of the electric field applied to the drift layer 6 is applied to the silicon oxide film 64. Therefore, the electron e- injected into the drift layer 6 is accelerated by a strong electric field applied to the silicon oxide film 64. Next, the electrons are in the drift layer 6 so that the region 'between the crystal grains 51 faces the surface and drifts along the direction of the arrow in Fig. 3, penetrates the surface electrode 7, and is released into a vacuum. In this way, in the drift layer 16- (13) (13) 200307326, the electron system injected from the lower electrode 12 hardly scatters the silicon microcrystal 63, and is performed by an electric field applied to the silicon oxide film 64. The drift is released by the surface electrode 7. In addition, the heat generated in the drift layer 6 is released by the crystal grains 51. Therefore, when electrons are emitted, no jumping phenomenon occurs, and electrons can be released stably. Hereinafter, the manufacturing process of the electron source 10 of Embodiment 1 will be described with reference to FIGS. 4A to 4D. In this manufacturing process, a metal film (for example, tungsten) having a predetermined film thickness (for example, about 300 nm) is first formed on a main surface of one side of the substrate 11 made of a glass substrate having insulation properties by sputtering. Film) composed of the lower electrode 1 2. Then, a predetermined film thickness (for example, 1. 5 // m) undoped polycrystalline silicon layer 3. Thereby, the structure (intermediate body) shown in FIG. 4A was obtained. In addition, the method for forming the polycrystalline silicon layer 3 is not limited to the plasma CVD method, and LPCVD method, catalyst CVD method, prefecture plating method, CGS (Continuous Grain Silicon · Continuous Grain Silicon) method, etc. may be used. . After the undoped polycrystalline silicon layer 3 is formed, a plurality of crystal grains 5 1 (see FIG. 3) mixed with polycrystalline silicon and a plurality of silicon microcrystals of a nano series are formed by performing the aforementioned nanocrystallization process. 63 (see Fig. 3) a composite nanocrystalline layer 4. Thereby, the structure shown in FIG. 4B is obtained. In the nanometer crystallization process, an anodic oxidation device shown in FIG. 24A and FIG. 24B is used, and a treatment tank containing an electrolytic solution A composed of a mixture of 55 wt% hydrogen fluoride aqueous solution and ethanol mixed with 1: 1 is used. . Continued -17- (14) 200307326 "Use a platinum electrode as the cathode 3 3, the lower electrode 12 as the anode, and apply light to the polycrystalline silicon layer 3 at the same time, only for a predetermined time (for example, 10 seconds) , Flowing a predetermined current (for example, a current with a current density of 12 mA / cm2). Thereby, a composite nanocrystalline layer 4 is formed. The composite nanocrystalline layer 4 is composed of polycrystalline silicon grains 51 and silicon microcrystals 63. In addition, in Embodiment 1, the composite nanocrystalline layer 4 constitutes a semiconductor layer. After the nano-crystallization process is completed, the aforementioned oxidation process is performed. Thereby, a drift layer 6 composed of a composite nanocrystalline layer having a structure shown in FIG. 3 is formed, and a structure shown in FIG. 4C is obtained. The oxidation process is performed using the electrochemical oxidation device shown in FIG. 5. That is, in the electrolytic solution put into the processing tank 31 (for example, in an organic solvent composed of ethylene glycol and dissolved by 0. A solution of a solute composed of potassium nitrate (04 mO / 1/1) B was immersed to form a to-be-processed object 30 of a composite nanocrystalline layer 4. Next, in the electrolytic solution B, a cathode 33 composed of a grid-shaped platinum electrode was arranged on the composite nanocrystalline layer 4 so as to face each other. Next, the lower electrode 12 serves as the anode, starting from the current source 32, and a certain current (for example, a current density of O.) flows between the anode (lower electrode 12) and the cathode 33. lmA / cm2 current). Thereby, an oxidation treatment is performed to make the composite nanocrystalline layer 4 electrochemically oxidize to form a drift layer 6 including crystal grains 51, silicon microcrystals 63, and silicon oxide films 52, 64. This electrochemical oxidation device includes a resistance detection unit 35 for detecting the resistance of the electrolyte B by pairing the resistance measurement electrodes 3 4a and 3 4b with one of the electrolytes B immersed in the processing tank 31, a detection anode, and The voltage detection section 36 of the potential difference between the cathodes 3 and 3 is controlled based on the detection voltage produced by the voltage detection section 36-18- (15) 200307326 and the detection resistance caused by the resistance detection section 35. The control section 37 for the output of the current source 32. The control unit 37 calculates the voltage increase 値 V0 (refer to Section 6A) caused by the resistance of the electrolyte B through the detection resistance 値 caused by the resistance detection unit 35 in advance, and then controls the current source 3 2 and a current flows from the current source 32 to facilitate the oxidation treatment. In addition, the control section 37 is a correction for subtracting the electric rise 値 V 0 by the detection voltage V caused by the voltage detection section 36. Then, when the corrected voltage Vt reaches the previous rising voltage 値 V1 (refer to FIG. 6B), the oxidation process is terminated by stopping the output of the power supply. Further, in Embodiment 1, in the composite nanocrystalline layer 4 formed by the nanocrystallization process, the regions other than the crystal grains and sand microcrystals 63 are crystalline regions composed of amorphous silicon. In addition, in the drift layer 6, the areas other than the crystal grains 51, the silicon microcrystals 63, and the silicon oxide films 52 and 64 are amorphous regions 65 made of amorphous silicon or partially oxidized amorphous sand. However, the amorphous region 65 becomes pores depending on the conditions of the nanocrystallization process. In this state, the composite nanocrystalline layer 4 is the same as the conventional example, and may be a porous polycrystalline silicon layer. After the drift layer 6 is formed, a surface electrode 7 made of a gold film is formed on the drift layer 6 by, for example, a vapor deposition method. As a result, the electron source 10 shown in Fig. 4D is obtained. However, as shown in FIG. 6A, in a state where the drift layer 6 is formed using a conventional electrochemical oxygen method, the oxidation is completed at a time point when the voltage between the anode and the cathode 33 reaches a predetermined voltage (V0 + V1). The processing data are shown in the figure below, and the pressure is set to 32 and 5 to 1 and it is a non-reportable component. It belongs to Huadian-19- (16) 200307326. Here, at this predetermined voltage, in addition to the oxide film (silicon oxide film 52, 64) In addition to the increase in voltage 带来 (V 1) caused by the formation of), the voltage rise 値 V0 due to the resistance of electrolyte B is included. However, the voltage rise 値 V 0 is due to the production of the electrolyte. The unevenness of specific resistance of electrolyte B, the shape of the cathode electrode, and the surface state of the sample caused by continuous use and storage state become uneven. Therefore, when the predetermined voltage (V0 + VI) becomes constant, with the The increase in the voltage 带来 caused by the formation of the silicon oxide films 52 and 64 becomes uneven. As a result, the emitter current of the electron source 10 or the insulation withstand voltage system becomes uneven, resulting in a decrease in yield. Therefore, if the first embodiment In the manufacturing method, when the drift layer 6 is formed, an electrochemical oxidation process that electrochemically oxidizes the composite nanocrystalline layer 4 that becomes a crystalline layer is started between the anode and the cathode 33 by current. Got oxidized. Then, at the time point when the voltage between the anode and the cathode 33 is corrected based on the voltage increase 値 V0 caused by the resistance of the electrolytic solution B obtained in advance, Vt reaches the upper limit voltage 値 V1, and the oxidation is terminated. Therefore, it is possible to suppress an increase in the voltage 値 between the anode and the cathode 33 during the period from the start of oxidation to the end of oxidation regardless of the uneven resistance of electrolyte B caused by the production, continuous use, and storage of the electrolyte. Uneven. In other words, it is possible to suppress the unevenness of the increase in voltage 値 caused by the formation of the oxide films (silicon oxide films 52, 64), and it is possible to reduce the characteristics such as the emitter current of the electron source 10 or the withstand voltage. Uneven. In the electrochemical oxidation method of the first embodiment, the resistance of the liquid B is detected by the resistance measurement electrodes 34a and 34b before the current is applied between the anode and the anode-20-(17) 200307326 electrode 33, and the resistance is determined by the detection resistance 値The aforementioned voltage rise is obtained. In this state, the voltage 値 V0 is obtained by not energizing the anode and the cathode 33. Therefore, when detecting the resistance of the electrolytic solution B, the composite nanocrystalline layer of the semiconductor layer (crystal layer) can be prevented. 4 Oxidation. The distance between the resistance measurement electrodes 34a and 34b is preferably set to the distance between the object 30 and the cathode 33. In addition, in the embodiment, parameters such as the distance between the object to be processed 30 and the cathode 33, or the cathode 33 are inputted to the control unit 37. Next, in the control unit 37, these parameters and the detection resistance 値 of the resistance detection unit 35 are used to obtain the specific resistance for electrolysis, and the specific resistance is used to obtain the aforementioned voltage rise 値 V0. In addition, the electrolytic solution B used in the electrochemical oxidation process is a solution in which the electrolyte is dissolved in a solvent. Therefore, rather than forming a silicon oxide film 5 2, 64 in an electrolytic solution composed of an aqueous solution of sulfuric acid, nitric acid, or the like, as shown in the prior art, a silicon oxide film 5 2 or 64 is formed. , Make the silicon oxide films 52, 64 dense and high, and improve the insulation withstand voltage of the silicon oxide films 5 2, 64. As mentioned above, in the state where organic solvent is used as the electrolyte of electrolyte B, compared with the state of water used as the solvent of electrolyte B, the resistance of liquid B is much higher. This is a non-polar organic The solvent is particularly significant. As described above, in the state where an organic solvent is used, the voltage increase 値 V0 caused by the resistance of the solution B becomes large, and therefore, the electrochemical oxidation process system of the form 1 becomes particularly effective. The electron source 10 of the first embodiment is used as the electrolytic V0 of the display. Ascending becomes, electricity should be at 1, the shape uses liquid B. Organically, it can be electrolyzed, changed to oxygen in the school, and changed to electricity. In the state of the electron -21-(18) (18) 200307326, it can be properly The lower electrode 12, the surface electrode 7, the drift layer 6, and the like are patterned, and a plurality of electron source elements 10 a are arranged in a matrix on the main surface side of the substrate 11. In addition, in the first embodiment, the manufacturing process of the electron source 10 is described as an example. However, the electrochemical oxidation process of the present invention is not limited to the manufacturing process of the electron source. Of course, it can also be used in various semiconductor devices. Manufacturing Process 0 (Embodiment 2) Hereinafter, Embodiment 2 of the present invention will be described. As described above, in the manufacturing process of the electron source 10 of Embodiment 1, the electrochemical oxidation device shown in FIG. 5 is used, and before the oxidation treatment is started, the electrolyte is measured by the electrodes 3 4a and 3 4b for resistance measurement. The resistance of B. Next, the detection voltage of the voltage detection unit 36 is corrected in consideration of the distance between the object to be processed 30 and the cathode 33, the shape of the cathode 33, and the like. However, in this state, the resistance of the electrolytic solution B changes due to the surface state of the object 30 to be treated. On the other hand, as shown in FIG. 7, in Embodiment 2, the main surface of the semiconductor layer (composite nanocrystalline layer 4) of the object 30 to be treated is different from the required oxidation target region 30a, and is provided separately. Area 30b for resistance measurement. Next, before applying current between the anode and the cathode 33, the resistance measurement area 3 Ob is used to detect the resistance of the electrolytic solution B, and the voltage increase 値 V0 is obtained from the detection resistance 値. In addition, using this voltage rise 値 V0, the detection voltage caused by the voltage detection section 36 is corrected. In this respect, the second embodiment is different from the first embodiment. -22- (19) (19) 200307326 In the second embodiment, when detecting the resistance of the electrolytic solution B, it is possible to prevent the composite nanocrystalline layer 4 which is a semiconductor layer from being oxidized, and to detect the reactive composite nanocrystalline layer 4 Resistance of electrolyte B in surface state. Therefore, the difference between the detection resistance 値 and the resistance 値 of the electrolytic solution B at the start of energization can be made small, and the unevenness in characteristics of the electron source 10 can be further reduced. In addition, since the structure and operation of the electron source 10 are the same as those of the first embodiment, illustration and description are omitted. (Embodiment 3) Hereinafter, Embodiment 3 of the present invention will be described. As described above, in the electrochemical oxidation method according to the second embodiment, it is necessary to provide a resistance measurement area 3 Ob in the object 30 to be treated, which is different from the oxidation target area 30a. However, due to the pattern shape of the oxidation target region 30a, a state in which the resistance measurement region 3 Ob cannot be set or a state in which the electrode corresponding to the resistance measurement region 3 Ob is not easily pulled out occurs. Therefore, in the third embodiment, the electrochemical oxidation device shown in Fig. 8 is used. Next, during the oxidation treatment of the object to be treated 30, a semiconductor layer (composite nanocrystal) having the same shape as that of an object to be electrochemically oxidized is used before being energized between the anode (lower electrode 12) and the cathode 33. Layer 4) A sample (not shown) for resistance monitoring of the same shape of the object 30 to be treated was used to detect the resistance of the electrolytic solution B. Next, the aforementioned voltage rise 値 V0 is obtained from the detection resistor 値. In this respect, the third embodiment is different from the second embodiment. Prior to Embodiment 3, before applying electricity between the anode and the cathode 33, -23- (20) (20) 200307326 was used to test the resistance of the electrolyte B with a resistance monitoring sample, and the detection resistance 値 was used to determine Since the aforementioned voltage rises by V0, it is possible to prevent oxidation of the composite nanocrystalline layer 4 that becomes a semiconductor layer when detecting the resistance of the electrolytic solution B. In addition, the difference between the detection voltage and the resistance value of the electrolytic solution B at the start of energization can be reduced, and the unevenness in characteristics of the electron source 10 can be further reduced. In addition, the structure and operation of the electron source 10 are the same as those of the first embodiment, and therefore, illustration and description are omitted. (Embodiment 4) Hereinafter, Embodiment 4 of the present invention will be described. As described above, in the electrochemical oxidation methods of Embodiments 1 to 3, the oxidation treatment is terminated at a time point when the voltage between the anode (lower electrode 12) and the cathode 33 reaches the upper limit voltage 値 V1. In this state, compared with the silicon oxide films 52 and 64 formed near the lower electrode 12 in the thickness direction of the drift layer 6, the silicon oxide films 52 and 64 formed far away from the lower electrode 12. The film thickness is too thin, or the compactness is insufficient, or sufficient insulation withstand voltage cannot be obtained. Therefore, in Embodiment 4, the electrochemical oxidation device shown in Fig. 9 is used. Next, as shown in FIG. 10, after the corrected voltage Vt between the anode and the cathode 33 reaches the upper limit voltage 値 V1, the corrected voltage Vt between the anode and the cathode 33 is maintained at the upper limit voltage 値 V 1. When the current I flowing between the anode and the cathode 33 is reduced to a predetermined value 値 11, the oxidation is terminated. As shown in FIG. 9, the electrochemical oxidation device of the fourth embodiment is provided with -24- (21) (21) 200307326. Preparation: The current flowing between the anode and the cathode 33 is detected by the current sensor 38. Detector 3 9. In addition, the electrochemical oxidation device includes a current source 32 and a switch 41 for switching the voltage source 40 and the current source 32 and the voltage source 40. Here, the control unit 37 corrects the upper limit voltage 値 V1 based on the voltage increase 値 V0 caused by the resistance of the electrolytic solution B before the start of the energization. Next, the control unit 37 sequentially corrects the corrected voltage Vt based on the voltage rise 値 V0 which is the product of the current 値 of the flowing electrolytic solution B and the resistance of the electrolytic solution B while reducing the current I. . In addition, the above-mentioned technical idea of the fourth embodiment can also be applied to the electrochemical oxidation devices of the second and third embodiments. In the fourth embodiment, it is possible to suppress the unevenness of the increase in the voltage 期间 during the period from the start of energization to the upper limit voltage 値 V1. In addition, after the upper limit voltage 値 V 1 is reached, the current V of the flowing electrolyte B is changed in accordance with the current reduction to a predetermined 値 丨 and the corrected voltage Vt is corrected. Therefore, the corrected voltage Vt reaches After the upper limit voltage “V 1”, unevenness in voltage caused by the formation of an oxide film as the current I decreases to a predetermined value “11” can be suppressed. Therefore, the variation in characteristics of the electron source 10 can be reduced. In addition, when the current I decreases to a predetermined value, the oxidation is terminated, so that the oxide film system is densified and the insulation withstand voltage is also improved. (Embodiment 5) Hereinafter, Embodiment 5 of the present invention will be described. In the fifth embodiment, as an electronic element formed by the electrochemical oxidation method, the same electron source as that in the first embodiment will be described as an example. Also -25- (22) (22) 200307326 That is, the structure, function, advantages, and electron emission method of the electron source 10 of Embodiment 5 are the same as those of Embodiment 1 (refer to Fig. 1 to Fig. 3) . Hereinafter, the manufacturing process of the electron source 10 according to the fifth embodiment will be described with reference to FIGS. 1A to 11D. In this manufacturing process, the state of the first embodiment is the same as that of the first embodiment, and the lower electrode 12 made of a metal film is formed on the main surface of one side of the insulating substrate 11 and the main electrode of the insulating substrate 11 is formed. On the entire surface side, an undoped polycrystalline silicon layer 3 is formed. Thereby, the structure shown in FIG. 1A is obtained. After the polycrystalline silicon layer 3 is formed, many crystal grains 5 1 (see FIG. 3) mixed with polycrystalline silicon are formed by a nanocrystallization process (anodic oxidation treatment operation) and 63 (see FIG. 3). ) The composite nanocrystalline layer 4. Thereby, the structure shown in FIG. 1B is obtained. The nanometer crystallization process is the same as that of the first embodiment. After the nanocrystallization process is completed, the composite nanocrystal layer 4 is electrochemically oxidized by performing an oxidation process. In this way, a drift layer 6 composed of a composite nanocrystalline layer having a structure shown in FIG. 3 is formed, and a structure shown in FIG. 1C is obtained. In the oxidation process (oxidation operation), the electrochemical oxidation device shown in FIG. 12A is used to perform the electrochemical oxidation of the composite nanocrystalline layer 4 as a semiconductor layer (crystalline layer). This electrochemical oxidation device is basically the same device as the conventional electrochemical oxidation device shown in Fig. 23A. However, by adjusting the shape of the cathode 33, the current density of the main surface of the polycrystalline silicon layer 3 is controlled so as to suppress the current density of the surrounding portion of the target region E from becoming larger than the target region-26- (23) (23) 200307326 E Other aspects are different. Specifically, as shown in FIG. 12A and FIG. 12B, the outer dimension of the grid-shaped cathode 3 3 is set to be smaller than the outer dimension of the target region E (oxidation target region), so as to be suppressed in the polycrystalline silicon layer 3. The current density in the peripheral portion becomes larger than in the other portions of the target area E. In other words, the shape of the cathode 33 is determined so that the specific surface area per unit area of the cathode becomes smaller in the surroundings than in other parts so as to cover the entire surface of the target area E and make the current density uniform. In this respect, it is different from the conventional electrochemical oxidation method. In the oxidation process, as the prescribed electrolytic solution B put into the processing tank 31, it is dissolved by using, for example, an organic solvent composed of ethylene glycol from 0. Solute solution of 04mol / 1 potassium nitrate. Next, the to-be-processed object 30 forming the composite nanocrystalline layer 4 is immersed in the electrolytic solution B. In the electrolytic solution B, the composite nanocrystalline layer 4 and the cathode 3 3 are arranged to face each other. Here, the lower electrode 12 serves as the anode, and a constant current (for example, a current density of 0.) flows from the power source to the anode (the lower electrode 1 2) and the cathode 33. A current of 1 mA / cm2) is subjected to an oxidation treatment for electrochemically oxidizing the composite nanocrystalline layer 4. Thereby, a drift layer 6 including crystal grains 5 1, silicon microcrystals 63, and silicon oxide films 52 and 64 is formed. In the fifth embodiment, areas other than the composite nanocrystalline layer 4 'crystal plate 51 and sand microcrystals 63 formed by the nanocrystallization process are amorphous regions made of amorphous silicon. In addition, in the drift layer 6, the crystal grains 51, silicon microcrystals 63, and regions other than silicon oxide films 52 and 64 are made of amorphous sand or partially oxidized amorphous sand. 27- (24) 200307326 Of non-crystalline regions 6 5. However, depending on the conditions of the nanocrystallization process (anodic oxidation process), the amorphous region 65 becomes a hole. In this state, the composite nanocrystalline layer 4 is the same as the conventional example, and can be a porous polycrystalline silicon layer. After the drift layer 6 is formed, a surface electrode 7 made of a metal film is formed on the drift layer 6 by, for example, a vapor deposition method. Thereby, an electron source 10 having a structure shown in Fig. 11D is obtained.

以上，如果藉由實施形態5之電子源1 〇之製造方法 的話，則控制成爲半導體層主表面之對象區域E之電流密 度，以便於抑制在電化學氧化之對象區域E周圍部之電流 密度變得大於對象區域E之其他部分，因此，能夠比起習 知，還更加縮小在對象區域E之電流密度之面內不均。因 此，可以比起習知，還更加縮小電子源1 0之射極電流Ie 之面內不均。也就是說，能夠比起習知，還更加縮小電子 元件之特性之面內不均。並且，藉由調整陰極3 3之形狀 而控制成爲半導體層主表面之對象區域E之電流密度，因 此，可以僅藉由調整陰極3 3之形狀，而比起習知，還更 加縮小在對象區域E之電流密度之面內不均。因此，可以 比起習知，還更加以低成本，來縮小電子源1 0之射極電 流I e之面內不均。 此外’前述技術思想係也可以使用在藉由陽極氧化方 法所造成之奈米結晶化製程。 (實施形態6 ) -28- (25) (25)200307326 以下，說明本發明之實施形態6。正如前面敘述，在 實施形態5之電化學氧化方法，藉由使得陰極3 3之外形 尺寸’更加小於對象區域E之外形尺寸，而提高在對象區 域E之電流密度之面內均一性。但是，在該狀態下，構成 _ @ 3 3之平行線群之間距係相同，因此，由於對象區域 E和陰極3 3間之間隔或電解液B之比電阻等，而無法充 分地使得對象區域E之電流密度，成爲均一化。 因此，在實施形態6，使用第1 3 A圖所示之電化學氧 化裝置，進行被處理物3 0之對象區域E之電化學氧化。 此外’電子源1 0之構造及動作係相同於實施形態1，因 此’省略圖示及說明。 實施形態6之電化學氧化裝置係在基本上，具有相同 於實施形態5之電化學氧化裝置之同樣構造，但是，陰極 3 3之形狀係不相同。也就是說，正如第1 3 a圖及第1 3 b 圖所示，在實施形態6，陰極3 3之外形尺寸係相同於習 知，幾乎相同於對象區域E之外形尺寸。接著，藉由使得 平行之各線間之間距，在陰極3 3之周圍部，更加大於中 央部，而提高在對象區域E之電流密度之均一性。換句話 說，在實施形態6，改變格子狀陰極3 3之平行之各線間 之間距，以便於控制在對象區域E之周圍部之電流密度， 更加大於對象區域E之其他部分。也就是說，藉由調整陰 極3 3之形狀而控制成爲半導體層主表面之對象區域E之 電流密度，以便於使得陰極33之每單位面積之比表面積 在陰極3 3之周圍部，變得小於陰極3 3之其他部分。 -29- (26) 200307326As described above, if the method of manufacturing the electron source 10 according to the fifth embodiment is used, the current density of the target region E serving as the main surface of the semiconductor layer is controlled so as to suppress the change of the current density in the peripheral region of the target region E that is subject to electrochemical oxidation. Since it is larger than the other parts of the target area E, the unevenness in the plane of the current density in the target area E can be reduced more than conventionally. Therefore, it is possible to reduce the in-plane unevenness of the emitter current Ie of the electron source 10 more than conventional. In other words, it is possible to reduce the in-plane unevenness of the characteristics of electronic components more than conventional. In addition, by adjusting the shape of the cathode 33, the current density of the target area E that becomes the main surface of the semiconductor layer is controlled. Therefore, by adjusting the shape of the cathode 33 alone, it is possible to reduce the area of the target area more than conventionally. The in-plane unevenness of the current density of E. Therefore, the in-plane unevenness of the emitter current I e of the electron source 10 can be reduced at a lower cost than conventionally. In addition, the aforementioned technical idea can also be used in a nanocrystallization process by anodization. (Embodiment 6) -28- (25) (25) 200307326 The following describes Embodiment 6 of the present invention. As described above, in the electrochemical oxidation method of Embodiment 5, the in-plane uniformity of the current density in the target region E is improved by making the external dimension of the cathode 33 more smaller than the external dimension of the target region E. However, in this state, the distance between the parallel line groups constituting _ @ 3 3 is the same. Therefore, the target area cannot be sufficiently made due to the distance between the target area E and the cathode 33 or the specific resistance of the electrolyte B, etc. The current density of E becomes uniform. Therefore, in Embodiment 6, the electrochemical oxidation device shown in Fig. 13A is used to perform the electrochemical oxidation of the target area E of the object 30 to be processed. In addition, the structure and operation of the 'electron source 10 are the same as those of the first embodiment, and therefore the illustration and description are omitted. The electrochemical oxidation device of the sixth embodiment basically has the same structure as the electrochemical oxidation device of the fifth embodiment, but the shape of the cathode 33 is different. That is, as shown in Figs. 13a and 1b, in the sixth embodiment, the outer dimension of the cathode 33 is the same as that of the conventional art, and is almost the same as the outer dimension of the target area E. Then, the distance between the parallel lines is made larger at the periphery of the cathode 33 than at the center, and the uniformity of the current density in the target region E is improved. In other words, in the sixth embodiment, the distance between the parallel lines of the grid-shaped cathode 33 is changed so as to control the current density in the surrounding portion of the target area E, which is greater than that of the other portions of the target area E. That is, by adjusting the shape of the cathode 33, the current density of the target area E that becomes the main surface of the semiconductor layer is controlled so that the specific surface area per unit area of the cathode 33 becomes smaller than that of the periphery of the cathode 33. The other parts of the cathode 33. -29- (26) 200307326

此外，在實施形態6，可以使用第1 3 C圖、第1 3 D圖 所示之氧化裝置。在該狀態下，陰極33之形狀、其陰極 3 3和對象區域E之間隔係在周邊部變大。因此’在周邊 部，由於電解液B所造成之電阻變大，提高在對象區域E 之電流密度之均一性。也就是說，藉由調整根據在對象區 域E之中央部和周邊部之電解液B所造成之電阻，調整 陰極和對象區域E (處理區域）間之間隔，而控制對象區 域E之電流密度。In Embodiment 6, the oxidation apparatus shown in Figs. 13C and 13D can be used. In this state, the shape of the cathode 33 and the distance between the cathode 33 and the target region E are increased at the peripheral portion. Therefore, at the peripheral portion, the resistance due to the electrolytic solution B increases, and the uniformity of the current density in the target region E is improved. That is, the current density of the target area E is controlled by adjusting the interval between the cathode and the target area E (processing area) by adjusting the resistance caused by the electrolytic solution B in the central and peripheral portions of the target area E.

像這樣，在實施形態6，相同於實施形態5，控制成 爲半導體層（多結晶矽層3及複合奈米結晶層4 )主表面 之電流密度，以便於抑制在電化學氧化之對象區域E周圍 部之電流密度變得大於對象區域E之其他部分，因此，能 夠比起習知，還更加縮小在對象區域E之電流密度之面內 不均。因此，可以縮小電子源1 〇之射極電流Ie之面內不 均。並且，藉由調整陰極33之形狀而控制半導體層主表 面之電流密度，因此，可以僅藉由調整陰極3 3之形狀， 而比起習知，還更加縮小在對象區域E之電流密度之面內 不均。因此，可以比起習知，還更加以低成本，來縮小電 子源1 〇之射極電流I e之面內不均。 此外’前述技術思想係也可以使用在藉由陽極氧化方 法所造成之奈米結晶化製程。 (實施形態7 ) 以下’說明本發明之實施形態7。正如前面敘述，在 -30- (27) (27)200307326 實施形態5或實施形態6 ’藉由調整陰極3 3之形狀而使 得對象區域E之電流密度，成爲均一化。在該狀態下，必 須配合對象區域E之形狀而設計陰極3 3之形狀。 相對於此，在實施形態7 ’使用第1 4 A圖所示之電化 學氧化裝置，進行由被處理物3 0之多結晶矽層3所構成 之半導體層之對象區域E之電化學氧化。此外，電子源 1 〇之構造及動作係相同於實施形態5，因此，省略圖示及 說明。 實施形態7之電化學氧化裝置係在基本上，成爲相同 於實施形態5之電化學氧化裝置之同樣構造。但是，正如 第14A圖及第14B圖所示，藉由在半導體層之對象區域E 之周邊，設置抑制在對象區域E之周邊部之電流密度之假 區域D，而控制半導體層主表面之電流密度。因此，可以 不改變陰極3 3之形狀，比起習知，還更加縮小在對象區 域E之電流密度之面內不均。因此，可以比起習知，還更 加以低成本，來縮小電子源1 0之射極電流Ie之面內不均 。此外，假區域D係藉由相同於對象區域E之同樣材料 所形成，因此，可以和對象區域E同時形成。 (實施形態8 ) 以下，說明本發明之實施形態8。實施形態8之電子 源1 0係在基本上，具有幾乎相同於第22圖所示之習知之 電子源1 0之構造。也就是說，正如第1 5圖所示，具備： 列設在絕緣性基板1 1之某一邊表面上之複數個下部電極 -31 - (28) (28)200307326 1 2、以分別重疊於各個下部電極12之形式而形成之複數 個多結晶矽層3、以分別重疊於各個多結晶矽層3之形式 所形成之複數個漂移層6、由埋入於相鄰接之漂移層6間 之多結晶矽層所構成之分離層1 6、以及在漂移層6和分 離層1 6上而跨越漂移層6和分離層1 6來列設在交差（垂 直）於下部電極12之方向上之複數個表面電極7。此外 ，漂移層6係相同於實施形態5，由複合奈米結晶層所構 在實施形態8之電子源1 0，相同於習知之電子源1 0 ，在相當於絕緣性基板Π之前述主表面上之所列設之複 數個下部電極1 2和在交差於下部電極1 2之方向上之所列 設之複數個表面電極7間之交點之部位上，夾住漂移層6 之一部分。因此，藉由適當地選擇表面電極7和下部電極 1 2間之組合，在所選擇之組合間，施加電壓，以便在相 當於漂移層6所選擇之表面電極7和下部電極1 2間之交 點之部位上，產生強電場作用，釋出電子。也就是說，這 個係相當在由複數個表面電極7之群組和複數個下部電極 1 2之群組所構成之矩陣（格子）之格子點來配置由下部 電極1 2、下部電極1 2上之多結晶矽層3、多結晶矽層3 上之漂移層6和漂移層6上之表面電極7所構成之電子源 元件1 0 a。因此，可以藉由選擇施加電壓之表面電極7和 下部電極1 2間之組合，而由所要求之電子源元件1 〇 a， 釋出電子。各個下部電極12係形成爲長方形狀，在長邊 方向之兩端部上，分別形成銲墊2 8。此外，各個表面電 -32- (29) (29)200307326 極7係也形成爲長方形狀，在由長邊方向之兩端部開始延 長之部位上，分別形成銲墊27。此外，電子源元件l〇a 係設置在每一個像素。 實施形態8之電子源1 〇之動作，係幾乎相同於第22 圖所示之習知之電子源10之動作。也就是說，在該電子 源1〇，將表面電極7配置在真空中，另一方面，在呈對 向地配置於表面電極7之面板30，設置集極電極（陽極 電極）21。接著，施加直流電壓Vps而使得所選擇之表面 電極7對於下部電極12，成爲正極，同時，施加直流電 壓Vc而陽極電極21對於表面電極7，成爲正極。結果， 藉由作用在漂移層6之電場，而使得由下部電極1 2注入 至漂移層6之電子，貫通漂移層6，通過表面電極7而進 行釋出。 在此，漂移層6係相同於實施形態1之狀態，具有第 3圖所示之構造。此外，即使是實施形態8之電子源1 〇， 也以相同於實施形態1之同樣模型，而引起電子釋出。此 外，在該電子源1 〇，通過表面電極7所釋出之電子線之 釋出方向係容易一致於表面電極7之法線方向，因此，不 需要設置複雜之陰影罩幕或電子聚焦透鏡。所以，能夠達 到顯示器之薄型化。 實施形態8之電子源1 〇係可以按照實施形態5之製 造方法所製造。例如漂移層6係大槪可以藉由以下之順序 而進行製造。也就是說，首先在形成下部電極1 2之絕緣 性基板1 1之前述主表面側之整個面上，堆積無摻雜之多 -33- (30) (30)200307326 結晶矽層。接著，藉由相同於實施形態5之同樣之奈米結 晶化製程而對於該多結晶矽層中之對應於漂移層6之部位 ，來進行陽極氧化’形呈複合奈米結晶層。然後’藉由相 同於實施形態5之同樣之氧化製程而對於複合奈米結晶層 ，呈電化學地進行氧化。藉此而形成漂移層6。此外’在 實施形態8，形成漂移層6時之奈米結晶化製程和氧化製 程係相同於實施形態5，但是，也可以相同於實施形態6 或實施形態7。 此外’正如第16圖所不’可以使得導入至位處在成 爲半導體層之多結晶矽層3周邊部之下部電極1 2之電流 導入用配線1 2a之幅寬，更加窄於導入至其他下部電極 1 2之電流導入用配線1 2a之幅寬。可以藉此而在陽極氧 化時和電化學氧化時，控制半導體層之主表面之電流密度 。在該狀態下，可以不改變陰極3 3之形狀，比起習知， 還更加縮小在對象區域E之電流密度之面內不均。因此， 可以比起習知，還更加以低成本，來縮小電子源1 0之射 極電流le之面內不均。 (實施形態9 ) 以下’說明本發明之實施形態9。在實施形態9，作 爲利用陽極氧化方法及電化學氧化方法所形成之電子元件 ’係以相同於實施形態1狀態之同樣電子源，作爲例子， 而進行說明。也就是說，實施形態9之電子源1 〇之構造 、功能、優點和電子釋出方法等係相同於實施形態〗（參 -34- (31) 200307326 考第1圖〜第3圖）。此外’在 1 〇來作爲顯示器之電子源之狀 部電極1 2、表面電極7和漂移 許多電子源元件1 〇 a，呈矩陣狀 邊之主表面側。 以下，參照第17A圖〜第 形態9之電子源1 〇之製造製程 同於實施形態1之狀態，在絕賴 表面上而形成由金屬膜所構成之 性基板1 1之前述主表面側之整 結晶矽層3。藉此而得到第1 7 A 在形成多結晶矽層3後，藉 氧化處理作業）而形成混在多結 多石夕微結晶6 3之複合奈米結晶 此而得到第1 7B圖所示之構造體 在奈米結晶化製程，使用舞 裝置，進行成爲半導體層之多結 奈米結晶化製程結束後，藉由進 奈米結晶層4，呈電化學地進行 圖所示構造之複合奈米結晶層所 17C圖所示之構造體。就氧化製 行敘述。在形成漂移層6後，例 金屬膜所構成之表面電極7，形 得到第1 7D圖所示構造之電子源 利用實施形態9之電子源 態下，可以適當地對於下 層6等，進行圖案化，將 地配列在基板1 1之某一 17D圖，並且，說明實施 .。在該製造製程，首先相 ^性基板1 1之某一邊之主 下部電極12後，在絕緣 個面上，形成無摻雜之多 圖所示之構造體。 由奈米結晶化製程（陽極 晶矽之許多晶粒5 1和許 層4 (參照第3圖）。藉 〇 ξ 24A圖所示之陽極氧化 晶矽層3之陽極氧化。在 行氧化製程，而對於複合 氧化。藉此而形成由第3 構成之漂移層6，得到第 程而言，在後面詳細地進 如藉由蒸鍍法等而使得由 成在漂移層6上。藉此而 10° -35- (32) (32)200307326 奈米結晶化製程係相同於實施形態1。此外，在氧化 製程（氧化作業），使用第1 8圖所示之電化學氧化裝置 ，進行成爲半導體層（結晶層）之複合奈米結晶層4之電 化學氧化。在氧化製程’作爲放入至處理槽3 1之規定之 電解液B，係使用例如在由乙二醇所構成之有機溶媒中而 溶解由〇.〇4mol/ 1之硝酸鉀所構成之溶質之溶液。接著 ，將形成複合奈米結晶層4之被處理物3 0浸漬在電解液 B中，在電解液B中，於複合奈米結晶層4，呈對向地配 置陰極33。在此，以下部電極12作爲陽極，由電源開始 至陽極（下部電極12 )和陰極3 3間’流動定電流（例如 電流密度爲0.1mA/ cm2之電流），進行對於複合奈米結 晶層4呈電化學地進行氧化之氧化處理。藉此而形成包含 晶粒51、矽微結晶63和各個矽氧化膜52、64 (參照第3 圖）之漂移層6。 但是，在氧化處理時，藉由電壓檢測手段（並未圖示 )而依次地檢測陽極和陰極3 3間之電壓，在陽極和陰極 3 3間之電壓由處理開始時之電壓僅上升所要求之電壓値 之時間點，結束氧化處理。在此，在通電於陽極和陰極 3 3間之期間，藉由振動產生器3 6之輸出而振動被處理物 3 0和陰極3 3。因此，在通電中，即使是在被處理物3 0之 複合奈米結晶層4之主表面及陰極33之表面，附著由於 電化學反應所產生之氣泡，該氣泡係也迅速地脫離。因此 ，防止附著在複合奈米結晶層4之主表面上之氣泡成爲罩 幕而抑制電化學氧化反應。也就是說，防止在電化學氧化 -36- (33) (33)200307326 之對象區域之反應由於氣泡而受到抑制。結果，能夠縮小 形成在對象區域上之矽氧化膜52、64之面內不均。此外 ，可以防止由於附著在陰極3 3上之氣泡而導致藉由電壓 檢測手段所造成之檢測電壓呈上升，因此，能夠防止矽氧 化膜52、64之絕緣耐壓之降低。 此外，在藉由振動產生器3 6而振動被處理物3 0之狀 態下，會有多孔質矽層受到損傷之狀態發生。因此，可以 不藉由振動產生器36而振動被處理物30，藉由將振動子 (並未圖示）配置在電解液B中，在通電中，振動電解液 B，而使得由於電化學反應所產生之氣泡，附著在電化學 氧化之對象區域，不損傷多孔質矽層，來防止電化學氧化 反應受到抑制。此外，可以防止由於附著在陰極3 3上之 氣泡而導致藉由電壓檢測手段所造成之檢測電壓呈上升， 因此，能夠防止矽氧化膜52、64之絕緣耐壓之降低。 以上，如果藉由實施形態9的話，則在氧化製程，於 通電中，即使是在被處理物3 0之複合奈米結晶層4之主 表面，附著由於電化學反應所產生之氣泡，該氣泡係也迅 速地脫離，因此，能夠防止所附著之氣泡成爲罩幕而抑制 電化學氧化反應。並且，能夠縮小形成在電化學氧化之對 象區域上之矽氧化膜52、64之膜厚或膜質之面內不均。 結果，可以比起習知，還更加縮小絕緣耐壓之面內不均。 並且，可以在通電中，防止由於附著在陰極33表面上之 氣泡而導致藉由電壓檢測手段所造成之檢測電壓呈上升， 因此，能夠防止矽氧化膜52、64之絕緣耐壓之降低。結 -37- (34) 200307326 果，可以縮小在批量間之絕緣耐壓之不均。 此外，前述技術思想係也可以使用在藉由陽極氧化方 法所造成之奈米結晶化製程。 (實施形態1 〇 )As described above, in Embodiment 6, the same as Embodiment 5, the current density that becomes the main surface of the semiconductor layer (polycrystalline silicon layer 3 and composite nanocrystalline layer 4) is controlled so as to suppress the area around the target area E for electrochemical oxidation. The current density of the part becomes larger than that of the other parts of the target area E, and therefore, it is possible to reduce the unevenness of the current density in the target area E even more than conventionally. Therefore, the in-plane unevenness of the emitter current Ie of the electron source 10 can be reduced. In addition, the current density of the main surface of the semiconductor layer is controlled by adjusting the shape of the cathode 33. Therefore, by adjusting the shape of the cathode 33 only, it is possible to reduce the current density surface in the target area E more than conventionally. Internal unevenness. Therefore, the in-plane unevenness of the emitter current I e of the electron source 10 can be reduced at a lower cost than conventionally. In addition, the aforementioned technical idea can also be used in a nanocrystallization process by anodization. (Embodiment 7) Hereinafter, Embodiment 7 of the present invention will be described. As described above, in -30- (27) (27) 200307326 in the fifth embodiment or the sixth embodiment, the current density in the target region E is made uniform by adjusting the shape of the cathode 33. In this state, it is necessary to design the shape of the cathode 33 according to the shape of the target area E. On the other hand, in Embodiment 7 ', the electrochemical oxidation device shown in FIG. 14A is used to perform the electrochemical oxidation of the target region E of the semiconductor layer composed of the polycrystalline silicon layer 3 of the object 30 to be processed. In addition, since the structure and operation of the electron source 10 are the same as those of the fifth embodiment, illustration and description are omitted. The electrochemical oxidation device of the seventh embodiment basically has the same structure as the electrochemical oxidation device of the fifth embodiment. However, as shown in FIGS. 14A and 14B, a dummy region D is provided around the target region E of the semiconductor layer to suppress the current density in the peripheral portion of the target region E to control the current on the main surface of the semiconductor layer. density. Therefore, without changing the shape of the cathode 33, the unevenness in the plane of the current density in the target area E can be reduced more than conventionally. Therefore, the in-plane unevenness of the emitter current Ie of the electron source 10 can be reduced at a lower cost than conventional. In addition, the dummy region D is formed of the same material as the target region E, and therefore, can be formed at the same time as the target region E. (Embodiment 8) Hereinafter, Embodiment 8 of the present invention will be described. The electron source 10 of the eighth embodiment basically has a structure almost the same as the conventional electron source 10 shown in FIG. In other words, as shown in FIG. 15, it includes: a plurality of lower electrodes arranged on one side surface of the insulating substrate 11 -31-(28) (28) 200307326 1 2. A plurality of polycrystalline silicon layers 3 formed in the form of a lower electrode 12, a plurality of drift layers 6 formed in a form of overlapping each of the polycrystalline silicon layers 3, and buried between adjacent drift layers 6 A separation layer 16 composed of a polycrystalline silicon layer, and a plurality of numbers which are arranged on the drift layer 6 and the separation layer 16 across the drift layer 6 and the separation layer 16 in a direction intersecting (perpendicular) to the lower electrode 12 Person surface electrode 7. In addition, the drift layer 6 is the same as in Embodiment 5, and the electron source 10 in Embodiment 8 is composed of a composite nanocrystalline layer, and is the same as the conventional electron source 10, on the aforementioned main surface corresponding to the insulating substrate II. A portion of the drift layer 6 is sandwiched at the intersection between the plurality of lower electrodes 12 listed above and the plurality of surface electrodes 7 arranged in the direction intersecting the direction of the lower electrode 12. Therefore, by appropriately selecting the combination between the surface electrode 7 and the lower electrode 12, a voltage is applied between the selected combinations so as to correspond to the intersection point between the surface electrode 7 and the lower electrode 12 selected by the drift layer 6. At this location, a strong electric field is generated to release electrons. In other words, this system is arranged on the lower electrode 1 2 and the lower electrode 1 2 at grid points of a matrix (lattice) composed of a group of a plurality of surface electrodes 7 and a group of a plurality of lower electrodes 12. The electron source element 10a composed of the polycrystalline silicon layer 3, the drift layer 6 on the polycrystalline silicon layer 3, and the surface electrode 7 on the drift layer 6. Therefore, by selecting a combination between the surface electrode 7 and the lower electrode 12 to which a voltage is applied, electrons can be released from the required electron source element 10a. Each of the lower electrodes 12 is formed in a rectangular shape, and pads 28 are formed on both ends in the longitudinal direction. In addition, each surface electrode -32- (29) (29) 200307326 pole 7 series is also formed in a rectangular shape, and pads 27 are formed at positions extending from both ends in the longitudinal direction. The electron source element 10a is provided at each pixel. The operation of the electron source 10 in Embodiment 8 is almost the same as the operation of the conventional electron source 10 shown in FIG. 22. In other words, in this electron source 10, the surface electrode 7 is arranged in a vacuum, and on the other hand, a collector electrode (anode electrode) 21 is provided on a panel 30 which is arranged opposite to the surface electrode 7. Next, a DC voltage Vps is applied so that the selected surface electrode 7 becomes a positive electrode with respect to the lower electrode 12, and a DC voltage Vc is applied and the anode electrode 21 becomes a positive electrode with respect to the surface electrode 7. As a result, electrons injected into the drift layer 6 from the lower electrode 12 through the electric field acting on the drift layer 6 pass through the drift layer 6 and are released through the surface electrode 7. Here, the drift layer 6 is the same as that in the first embodiment, and has a structure shown in FIG. In addition, even the electron source 10 of the eighth embodiment causes electrons to be released in the same model as that of the first embodiment. In addition, in the electron source 10, the release direction of the electron rays released through the surface electrode 7 is easy to coincide with the normal direction of the surface electrode 7. Therefore, it is not necessary to provide a complicated shadow mask or an electron focusing lens. Therefore, the thickness of the display can be reduced. The electron source 10 according to the eighth embodiment can be manufactured according to the manufacturing method according to the fifth embodiment. For example, the drift layer 6 can be manufactured by the following procedure. That is, firstly, an undoped -33- (30) (30) 200307326 crystalline silicon layer is deposited on the entire surface of the aforementioned main surface side of the insulating substrate 11 on which the lower electrode 12 is formed. Next, by using the same nano-crystallization process as in Embodiment 5, the composite nano-crystalline layer is formed by anodizing the portions corresponding to the drift layer 6 in the polycrystalline silicon layer. Then, the composite nanocrystalline layer is electrochemically oxidized by the same oxidation process as in Embodiment 5. Thereby, the drift layer 6 is formed. In addition, in the eighth embodiment, the nanocrystallization process and the oxidation process when the drift layer 6 is formed are the same as those in the fifth embodiment, but may be the same as those in the sixth or seventh embodiment. In addition, as shown in FIG. 16, the width of the current introduction wiring 12a introduced into the lower electrode 12 of the peripheral portion of the polycrystalline silicon layer 3 which becomes the semiconductor layer can be narrower than that introduced to the other lower portions. The width of the current introduction wiring 12a of the electrode 12 is wide. This allows the current density of the main surface of the semiconductor layer to be controlled during anodic oxidation and electrochemical oxidation. In this state, it is possible to reduce the unevenness in the plane of the current density in the target region E without changing the shape of the cathode 33, as compared with the conventional case. Therefore, the in-plane unevenness of the emitter current le of the electron source 10 can be reduced at a lower cost than conventionally. (Embodiment 9) Hereinafter, Embodiment 9 of the present invention will be described. In the ninth embodiment, as an electronic element formed by an anodic oxidation method and an electrochemical oxidation method, the same electron source as that in the first embodiment is described as an example. In other words, the structure, function, advantages, and electron emission method of the electron source 10 of Embodiment 9 are the same as those of the embodiment [Ref. -34- (31) 200307326 Consider Figs. 1 to 3]. In addition, it is used as the electron source of the display at 10, the partial electrode 12, the surface electrode 7, and the drift. Many electron source elements 10a have a matrix-shaped main surface side. Hereinafter, referring to FIG. 17A to the ninth embodiment, the manufacturing process of the electron source 10 is the same as that of the first embodiment, and the entire main surface side of the sexual substrate 11 made of a metal film is formed on the absolute surface. Crystalline silicon layer 3. In this way, the first 7A is obtained. After forming the polycrystalline silicon layer 3, the composite nanocrystal mixed with the multi-junction polylithic microcrystal 6 3 is formed by the oxidation treatment operation. Thus, the structure shown in FIG. 17B is obtained. After the nanocrystal crystallization process is completed using a dance device, the nanocrystal crystallization process using a dance device is completed. The nanocrystal layer 4 is then fed into the nanocrystal layer 4 to electrochemically perform the composite nanocrystal layer with the structure shown in the figure. The structure shown in Figure 17C. Describe the oxidation system. After the drift layer 6 is formed, the surface electrode 7 made of a metal film can be used to form an electron source having a structure shown in FIG. 17D. In the electron source state of Embodiment 9, the lower layer 6 and the like can be appropriately patterned. The ground is arranged in a 17D view of the substrate 11 and the implementation will be explained. In this manufacturing process, first, the main lower electrode 12 on one side of the substrate 11 is formed, and then the non-doped structure shown in the figure is formed on the insulating surfaces. Nanocrystalline crystallization process (many grains 51 and 4 of anode crystalline silicon (see Fig. 3). Anodization of anodic oxidation crystalline silicon layer 3 shown in Figure ξ24A. In the oxidation process, and For the composite oxidation, the drift layer 6 composed of the third is formed, and the process is obtained in detail later, for example, by the evaporation method, so that the drift layer 6 is formed on the drift layer. By this, 10 ° -35 -(32) (32) 200307326 The nanometer crystallization process is the same as in Embodiment 1. In addition, in the oxidation process (oxidation operation), the electrochemical oxidation device shown in FIG. 18 is used to form a semiconductor layer (crystal layer). Electrochemical oxidation of the composite nanocrystalline layer 4. In the oxidation process' as prescribed electrolyte B placed in the processing tank 31, it is dissolved in an organic solvent composed of ethylene glycol, for example. .04mol / 1 of a solute solution composed of potassium nitrate. Next, the to-be-processed object 30 forming the composite nanocrystalline layer 4 was immersed in the electrolytic solution B, and in the electrolytic solution B, the composite nanocrystalline layer was immersed. 4. The cathode 33 is arranged in the opposite direction. Here, the lower part is electrically 12 as an anode, a constant current (for example, a current with a current density of 0.1 mA / cm2) flows from the power source to the anode (lower electrode 12) and the cathode 33, and the composite nanocrystalline layer 4 is electrochemically oxidized The oxidation process is performed to form the drift layer 6 including the crystal grains 51, silicon microcrystals 63, and each of the silicon oxide films 52 and 64 (see FIG. 3). However, during the oxidation process, the voltage detection means (and (Not shown), the voltage between the anode and the cathode 33 is sequentially detected, and the oxidation treatment is terminated at a time point when the voltage between the anode and the cathode 33 is only increased by a voltage required by the voltage at the beginning of the process. Here, During energization between the anode and the cathode 33, the object to be processed 30 and the cathode 33 are vibrated by the output of the vibration generator 36. Therefore, even during the energization, even the compound to be treated 30 The main surface of the rice crystal layer 4 and the surface of the cathode 33 are adhered to the bubbles generated by the electrochemical reaction, and the bubbles are also rapidly detached. Therefore, the bubbles adhering to the main surface of the composite nano crystal layer 4 are prevented from becoming a cover. Curtain Electrochemical oxidation reaction. That is, the reaction in the target area of electrochemical oxidation-36- (33) (33) 200307326 is prevented due to bubbles. As a result, the silicon oxide film 52 formed on the target area can be reduced. In-plane unevenness of 64. In addition, it is possible to prevent the detection voltage caused by the voltage detection means from rising due to the bubbles attached to the cathode 33, so it is possible to prevent the insulation withstand voltage of the silicon oxide films 52 and 64. In addition, in a state where the processed object 30 is vibrated by the vibration generator 36, a porous silicon layer is damaged. Therefore, the processed object can be vibrated without the vibration generator 36. 30. By arranging a vibrator (not shown) in the electrolyte B, the electrolyte B is vibrated during energization, so that the bubbles generated by the electrochemical reaction adhere to the area of the target of electrochemical oxidation. The porous silicon layer is damaged to prevent the electrochemical oxidation reaction from being suppressed. In addition, it is possible to prevent an increase in the detection voltage caused by the voltage detection means due to the bubbles attached to the cathode 33, so that it is possible to prevent the insulation withstand voltage of the silicon oxide films 52 and 64 from decreasing. As described above, if the embodiment 9 is used, in the oxidation process and the current is applied, even on the main surface of the composite nanocrystalline layer 4 of the object to be treated 30, bubbles generated by the electrochemical reaction adhere to the bubbles. Since the system is also detached quickly, it is possible to prevent the attached air bubbles from becoming a mask and suppress the electrochemical oxidation reaction. In addition, it is possible to reduce the in-plane unevenness of the film thickness or film quality of the silicon oxide films 52 and 64 formed on the object area of electrochemical oxidation. As a result, it is possible to reduce the in-plane unevenness of the withstand voltage of the insulation more than before. In addition, it is possible to prevent an increase in the detection voltage caused by the voltage detection means due to the bubbles attached to the surface of the cathode 33 during the energization. Therefore, it is possible to prevent the dielectric breakdown voltage of the silicon oxide films 52 and 64 from decreasing. The result is -37- (34) 200307326, which can reduce the non-uniformity of insulation withstand voltage between batches. In addition, the aforementioned technical idea can also be used in a nanocrystallization process by anodization. (Embodiment 1 〇)

以下，說明本發明之實施形態1 〇。在實施形態9 ’使 用第1 8圖所示之氧化裝置。相對於此，在實施形態1 〇， 使用第1 9圖所示之電化學氧化裝置，進行被處理物3 0之 複合奈米結晶層4之電化學氧化。此外，電子源1 0之構 造及動作係相同於實施形態9，因此，省略圖示及說明。 此外，電子源1 〇之製造方法係在基本上，相同於實施形 態9之製造方法，因此，省略說明。Hereinafter, Embodiment 10 of the present invention will be described. In the ninth embodiment, the oxidation device shown in Fig. 18 is used. In contrast, in Embodiment 10, the electrochemical oxidation of the composite nanocrystal layer 4 of the object 30 to be treated was performed using the electrochemical oxidation device shown in FIG. 19. The structure and operation of the electron source 10 are the same as those of the ninth embodiment. Therefore, illustration and description are omitted. The manufacturing method of the electron source 10 is basically the same as the manufacturing method of the ninth embodiment, and therefore the description is omitted.

實施形態1 〇之電化學氧化裝置係具備：汲取處理槽 31內之電解液B之幫浦3 7。接著，在通電於陽極和陰極 3 3間之時，使得藉由幫浦3 7所汲取之電解液B，由噴嘴 (並未圖示）開始而朝向陰極3 3和被處理物3 0之半導體 層（多結晶砂層3、複合奈米結晶層4 )之主表面，進行 噴射。此外，在實施形態1 〇，藉由移動噴嘴，而在陰極 33之表面整體和被處理物30之半導體層之主表面整體， 噴射電解液B。 即使是在實施形態1 〇，也相同於實施形態9，在氧化 製程，於通電中，即使是在被處理物3 0之複合奈米結晶 層4之主表面，附著由於電化學反應所產生之氣泡，該氣 泡係也迅速地脫離。因此，能夠防止附著在複合奈米結晶 -38- (35) 200307326 層4主表面上之氣泡成爲罩幕而抑制電化學氧化反應。結 果，能夠縮小形成在電化學氧化之對象區域上之矽氧化膜 52、64之膜厚或膜質之面內不均。因此，可以比起習知 ，還更加縮小絕緣耐壓之面內不均。 並且，可以在通電中，防止由於附著在陰極33表面 上之氣泡而導致藉由電壓檢測手段所造成之檢測電壓呈上 升。因此，能夠防止矽氧化膜52、64之絕緣耐壓之降低 ，結果，可以縮小在批量間之絕緣耐壓之不均。此外，在 實施形態1 〇，藉由朝向半導體層之主表面，噴射電解液B ，而由半導體層之主表面，來脫離氣泡，因此，能夠更加 確實地脫離附著在半導體層主表面上之氣泡。 此外，前述技術思想係也可以使用在藉由陽極氧化方 法所造成之奈米結晶化製程上。 此外，不論是在任何一個實施形態，如果電化學氧化 裝置僅藉由改變電解液而在光源等之陽極氧化來放入必要 之要素的話，則可以使用作爲陽極氧化裝置。 以上，本發明係關於其特定之實施形態而進行說明， 但是，所謂其他可能之許多變化例和修正例係對於當前業 者，也是相當淸楚的。因此，本發明係並非藉由此種實施 形態所限定，應該是藉由附件之申請專利範圍所限定。 [產業上之可利用性] 正如以上敘述，本發明之電化學氧化方法係特別有用 於電場放射型電子源等之半導體裝置之製造製程上，適合 -39- (36) (36)200307326 使用在半導體製造製程之氧化製程上。 【圖式簡單說明】 本發明係藉由後面敘述之詳細說明及附件圖式而更加 充分地進行理解。此外，在附件之圖式中，於共通之構成 要素上，附加相同之參考編號。 第1圖係實施形態1之電子源（電場放射型電子源） 之示意之立面剖面圖。 第2圖係顯示第1圖所示之電子源動作之圖。 第3圖係擴大第1圖所示之電子源要部而顯示之示意 之立面剖面圖。 第4A圖〜第4D圖係第1圖所示之電子源或其製造 製程之主要作業之中間體之示意之立面剖面圖，顯示該電 子源之製造方法。 第5圖係實施形態1之電化學氧化裝置之示意立面圖 〇 第6A圖係顯示第5圖所示之電化學氧化裝置之檢測 電壓V和時間之關係之圖形，第6 B圖係顯示第1圖所示 之電子源之修正後之電壓Vt和時間之關係之圖形。 第7圖係實施形態2之被處理物之示意俯視圖。 第8圖係在實施形態3之電子源之製造過程所使用之 電化學氧化裝置之示意圖。 第9圖係在實施形態4之電子源之製造過程所使用之 電化學氧化裝置之示意圖。 -40- (37) 200307326 第1 〇圖係顯示在實施形態4之 正後之電壓Vt及電流I和時間之關係 第Π A圖〜第1 1 D圖係實施形， 造製程之主要作業之中間體之示意之 電子源之製造方法。 第12A圖係實施形態5之電化 面圖，第12B圖係第12A圖所示之 之示意立體圖。 第1 3 A圖係實施形態6之電化 面圖，第13B圖係第13A圖所示之 之示意立體圖。第1 3 C圖係實施形態 氧化裝置之示意立面圖，第13D圖保 化學氧化裝置要部之示意立體圖。 第14A圖係實施形態7之電化 造圖，第14B圖係第14A圖所示之 之示意立體圖。 第15A圖係破壞使用實施形態 之一部分之立體圖。 第1 6圖係使用第1 5圖所示之電 製程之主要作業之中間體之立體圖。 第17A圖〜第17D圖係實施形育 造製程之主要作業之中間體之示意之: 電子源之製造方法。 第18圖係實施形態9之電化學 電化學氧化裝置之修 之圖形。 療5之電子源或其製 立面剖面圖，顯示該 學氧化裝置之示意立 電化學氧化裝置要部 學氧化裝置之示意立 電化學氧化裝置要部 6之另外一個電化學 ;第1 3 C圖所示之電 學氧化裝置之槪略構 電化學氧化裝置要部 8之電子源之顯示器 子源之顯示器之製造 g 9之電子源或其製 立面剖面圖，顯示該 氧化裝置之示意立面 - 41 _ (38) 200307326 圖。 第1 9圖係實施形態1 0之電化學氧化裝置之示意立面 圖。 第20圖係顯示習知之電子源動作之圖。 第2 1圖係顯示習知之另外一個電子源動作之圖。The electrochemical oxidation device of Embodiment 10 is provided with a pump 37 for drawing the electrolytic solution B in the processing tank 31. Next, when the current is applied between the anode and the cathode 33, the electrolyte B drawn by the pump 37 is directed toward the semiconductor of the cathode 33 and the object 30 from a nozzle (not shown). The main surfaces of the layers (polycrystalline sand layer 3 and composite nanocrystalline layer 4) are sprayed. In Embodiment 10, by moving the nozzle, the entire surface of the cathode 33 and the entire main surface of the semiconductor layer of the object 30 are sprayed with the electrolytic solution B. Even in Embodiment 10, it is the same as Embodiment 9. In the oxidation process and current application, even on the main surface of the composite nanocrystalline layer 4 of the object 30 to be treated, it is caused by the electrochemical reaction. Bubbles, and this bubble system also quickly detached. Therefore, it is possible to prevent bubbles adhering to the main surface of the composite nanocrystal -38- (35) 200307326 layer 4 from acting as a mask and suppress the electrochemical oxidation reaction. As a result, it is possible to reduce the in-plane unevenness of the film thickness or film quality of the silicon oxide films 52 and 64 formed on the target area for electrochemical oxidation. Therefore, it is possible to reduce the in-plane unevenness of the withstand voltage of the insulation more than the conventional one. In addition, it is possible to prevent the detection voltage from rising due to the voltage detection means due to the bubbles attached to the surface of the cathode 33 during energization. Therefore, it is possible to prevent a reduction in the insulation withstand voltage of the silicon oxide films 52 and 64, and as a result, it is possible to reduce variations in the insulation withstand voltage between batches. In addition, in Embodiment 10, the electrolytic solution B is sprayed toward the main surface of the semiconductor layer, and bubbles are released from the main surface of the semiconductor layer. Therefore, the bubbles attached to the main surface of the semiconductor layer can be more reliably removed. . In addition, the aforementioned technical ideas can also be used in the nanocrystallization process by anodization. In addition, in any of the embodiments, an electrochemical oxidation device can be used as an anodizing device, if necessary components are placed in the light source or the like by anodizing only by changing the electrolytic solution. As mentioned above, the present invention has been described with respect to its specific implementation mode. However, many other possible variations and modifications are also quite clear to the current industry. Therefore, the present invention is not limited by this implementation mode, but should be limited by the scope of patent application of the attachment. [Industrial Applicability] As described above, the electrochemical oxidation method of the present invention is particularly applicable to the manufacturing process of semiconductor devices such as electric field emission type electron sources, and is suitable for -39- (36) (36) 200307326 for use in On the oxidation process of the semiconductor manufacturing process. [Brief Description of the Drawings] The present invention will be more fully understood through the detailed description and attached drawings described later. In addition, in the drawings of the appendix, common components are given the same reference numbers. FIG. 1 is a schematic cross-sectional view of an electron source (electric field emission type electron source) according to the first embodiment. Fig. 2 is a diagram showing the operation of the electron source shown in Fig. 1. Fig. 3 is a schematic elevational cross-sectional view showing the main part of the electron source shown in Fig. 1 enlarged. Figures 4A to 4D are schematic elevational cross-sectional views of the electron source or the intermediates of the main operation of the manufacturing process shown in Figure 1, showing the method of manufacturing the electron source. FIG. 5 is a schematic elevation view of the electrochemical oxidation device of Embodiment 1. FIG. 6A is a graph showing the relationship between the detection voltage V and time of the electrochemical oxidation device shown in FIG. 5, and FIG. 6B is a view showing The graph of the relationship between the corrected voltage Vt and time of the electron source shown in FIG. 1. Fig. 7 is a schematic plan view of the object to be processed in the second embodiment. Fig. 8 is a schematic diagram of an electrochemical oxidation device used in the manufacturing process of the electron source of the third embodiment. Fig. 9 is a schematic diagram of an electrochemical oxidation device used in the manufacturing process of the electron source of the fourth embodiment. -40- (37) 200307326 Figure 10 shows the relationship between the voltage Vt and the current I and the time after the positive in the fourth embodiment. Figure ΠA ~ Figure 1D shows the implementation of the main operations of the manufacturing process. Schematic manufacturing method of intermediate electron source. Fig. 12A is a schematic plan view of Embodiment 5 and Fig. 12B is a schematic perspective view shown in Fig. 12A. Fig. 1A is a plan view of the sixth embodiment, and Fig. 13B is a schematic perspective view shown in Fig. 13A. Figure 1 3C is a schematic elevation view of an embodiment of the oxidation device, and Figure 13D is a schematic perspective view of the main part of the chemical oxidation device. Fig. 14A is an electrochemical drawing of Embodiment 7, and Fig. 14B is a schematic perspective view shown in Fig. 14A. Fig. 15A is a perspective view showing a part of the use mode of the destruction. Figure 16 is a perspective view of the intermediate of the main operation using the electrical process shown in Figure 15. Figures 17A to 17D are schematic diagrams of the intermediates that perform the main operations of the Xingyu manufacturing process: a method of manufacturing an electron source. Fig. 18 is a diagram showing the repair of the electrochemical oxidation device according to the ninth embodiment. The electron source or its sectional elevation view of treatment 5 shows another schematic of the electrochemical oxidation device to be part of the electrochemical oxidation device, and the other electrochemical of the basic oxidation device to be part 6 of the chemical oxidation device; Section 1 3 C The structure of the electrical oxidation device shown in the figure is a schematic structure of the electrochemical oxidation device. The main part of the electron source, the display of the electron source, the display of the sub-source, the display of the electron source, or a cross-sectional view of the electron source, shows the schematic elevation of the oxidation device. -41 _ (38) 200307326 figure. Fig. 19 is a schematic elevation view of an electrochemical oxidation device of Embodiment 10. Fig. 20 is a diagram showing a conventional electron source operation. Figure 21 is a diagram showing the operation of another conventional electron source.

第22圖係使用第21圖所示之電子源之顯示器之示意 立體圖。 第23A圖係習知之電化學氧化裝置之示意立面圖’ 第23B圖係第23A圖所示之電化學氧化裝置要部之示意 立體圖。 第24A圖係陽極氧化裝置之示意立面圖，第24B圖 係第24A圖所示之陽極氧化裝置要部之示意立體圖。 第2 5圖係使用習知之電子源之顯示器之製造製程之 主要作業之中間體之立體圖。Fig. 22 is a schematic perspective view of a display using the electron source shown in Fig. 21. Fig. 23A is a schematic elevation view of a conventional electrochemical oxidation device 'Fig. 23B is a schematic perspective view of the main part of the electrochemical oxidation device shown in Fig. 23A. Fig. 24A is a schematic elevation view of the anodizing device, and Fig. 24B is a schematic perspective view of the main parts of the anodizing device shown in Fig. 24A. Figure 25 is a perspective view of the intermediate of the main operation of the manufacturing process of a display using a conventional electron source.

[圖號說明] A 電解液 B 電解液 D 假區域 E 對象區域 e 一 電子 I 電流. II 電流之既定値 I e 射極電流（釋出電子電流） -42- (39) 200307326 1 p s V VO VI Vc V p s Vt 1 2 3 4 6 7 10 10a 11 12 12a 16 2 1 27 28 30 30a 二極體電流 檢測電流 電流上升値 上限電壓値 直流電壓 直流電壓 修正後之電壓 η型矽基板 歐姆電極 多結晶矽層 複合奈米結晶層 漂移層 表面電極 電場放射型電子源 電子源元件 絕緣性基板 下部電極 配線 分離層 集極電極（陽極電極） 銲墊 銲墊 面板（被處理物） 氧化對象區域 -43- (40)200307326 30b 電阻測定用區域 3 1 處理層 32 電流源 33 陰極 34a 電阻測定用電極 34b 電阻測定用電極 3 5 電阻檢測部 36 電壓檢測部（振動產生器） 37 控制部（幫浦） 3 8 電流感測器 39 電流檢測部 40 電流源 4 1 切換開關 5 1 晶粒 52 矽氧化膜 63 氧化矽微結晶（半導體微結 64 矽氧化膜（絕緣膜） 65 非結晶區域[Illustration of drawing number] A Electrolyte B Electrolyte D Fake area E Object area e An electron I current. II Current is fixed 値 I e Emitter current (released electron current) -42- (39) 200307326 1 ps V VO VI Vc V ps Vt 1 2 3 4 6 7 10 10a 11 12 12a 16 2 1 27 28 30 30a Diode current detection current rise 値 upper limit voltage 値 DC voltage DC voltage corrected voltage n-type silicon substrate ohmic electrode Crystalline silicon layer Composite nanocrystalline layer Drift layer Surface electrode Electric field emission type Electron source Electron source element Insulating substrate Lower electrode Wiring separation layer Collector electrode (anode electrode) Pad pad panel (object) Oxidation target area -43 -(40) 200307326 30b Resistance measurement area 3 1 Processing layer 32 Current source 33 Cathode 34a Resistance measurement electrode 34b Resistance measurement electrode 3 5 Resistance detection section 36 Voltage detection section (vibration generator) 37 Control section (pump) 3 8 Current sensor 39 Current detection unit 40 Current source 4 1 Switch 5 1 Grain 52 Silicon oxide film 63 Silicon oxide microcrystal (semiconductor microjunction 64 silicon oxide Film (insulating film) 65 amorphous region

•44-• 44-

Claims (1)

200307326 (1) 拾、申請專利範圍 1 · 一種電化學氧化方法，其特徵爲：在藉由以相反於 成爲電化學氧化對象之半導體層主表面之相反側之電極作 爲陽極並且在半導體層和陰極接合於電解液之狀態而在陽 極和陰極間通過電流來氧化半導體層之電化學氧化方法， 在陽極和陰極間，通過電流，開始進行前述氧化，根據藉 由預先求出之電解液電阻所造成之電壓上升値V0而修正 陽極和陰極間之電壓V來求出之修正電壓値vt，係在成 爲預先所設定之上限電壓値V 1之狀態下，結束前述氧化 〇 2 ·如申請專利範圍第1項所記載之電化學氧化方法， 其中，在修正電壓値Vt成爲上限電壓値V 1之時間點， 結束前述氧化。 3 ·如申請專利範圍第1項所記載之電化學氧化方法， 其中，在修正電壓値Vt成爲上限電壓値V 1之時間點， 結束在一定電流之氧化，然後，在修正電壓値Vt維持在 上限電壓値V 1並且電流減少至既定値爲止時，完全地結 束前述氧化，即使是在電流減少期間，也根據電壓上升値 V0，而修正電壓V，來求出修正電壓値Vt。 4·如申請專利範圍第1項所記載之電化學氧化方法， 其中，在陽極和陰極間而通過電流前，藉由電阻測定用電 極而檢測電解液之電阻。 5·如申請專利範圍第1項所記載之電化學氧化方法， 其中，在陽極和陰極間而通過電流前，於半導體層之主表 -45_ (2) (2)200307326 面，利用不同於既定之氧化對象區域所另外設置之電阻測 定用區域，來檢測電解液之電阻。 6 ·如申請專利範圍第1項所記載之電化學氧化方法， 其中，在陽極和陰極間而通過電流前，使用形成爲相同於 設置半導體層之被處理物之同一形狀之電阻監視用試料， 來檢測電解液之電阻。 7.如申請專利範圍第1項所記載之電化學氧化方法， 其中，電解液係電解質溶解在有機溶媒中之溶液。 8 .如申請專利範圍第1項所記載之電化學氧化方法， 其中，控制半導體層主表面之電流密度，以便於抑制在半 導體層之氧化對象區域周邊部之電流密度變得大於氧化對 象區域之其他部分。 9. 如申請專利範圍第8項所記載之電化學氧化方法， 其中，藉由設定陰極形狀，而使得該陰極和半導體層間之 間隔，在陰極周邊部變大，以便於控制電流密度。 10. 如申請專利範圍第8項所記載之電化學氧化方法 ，其中，藉由設定陰極形狀，而使得該陰極之每單位面積 之比表面積，在陰極周邊部小於其他部分，以便於控制電 流密度。 1 1 .如申請專利範圍第8項所記載之電化學氧化方法 ，其中，藉由在半導體層之氧化對象區域周邊部，設置用 以降低氧化對象區域周邊部之電流密度之假區域’以便於 控制電流密度。 ! 2 .如申請專利範圍第8項所記載之電化學氧化方法 -46 - (3) (3)200307326 ，其中，前述電極係呈相互平行地設置複數列在相反於半 導體層主表面之相反側之面，藉由使得導入至重疊於氧化 對象區域周邊部之電極之電流導入用配線之幅寬，更加狹 窄於導入至重疊於其他部分之電極之電流導入用配線之幅 寬，以便於控制電流密度。 1 3 .如申請專利範圍第1項所記載之電化學氧化方法 ，其中，在通過電流時，使得附著在半導體層主表面上之 氣泡，在通過電流時，由主表面脫離。 1 4 .如申請專利範圍第1 3項所記載之電化學氧化方法 ，其中，藉由振動包含陽極和半導體層之基板，而脫離氣 泡。 1 5 .如申請專利範圍第1 3項所記載之電化學氧化方法 ，其中，藉由在電解液中，配置振動子，而施加振動至電 解液，以便於脫離氣泡。 1 6 .如申請專利範圍第1 3項所記載之電化學氧化方法 ，其中，藉由朝向前述半導體層之主表面而噴射電解液， 以便於脫離氣泡。 -47-200307326 (1) Patent application scope 1 · An electrochemical oxidation method, characterized in that by using an electrode on the opposite side of the main surface of the semiconductor layer as the object of electrochemical oxidation as an anode, and on the semiconductor layer and the cathode An electrochemical oxidation method in which a semiconductor layer is oxidized by an electric current between an anode and a cathode in a state of being connected to an electrolytic solution. The foregoing oxidation is started by an electric current between the anode and the cathode. The voltage 値 V0 rises and the correction voltage 値 vt obtained by correcting the voltage V between the anode and the cathode is the end of the aforementioned oxidation in a state where the upper limit voltage 値 V 1 is set in advance. The electrochemical oxidation method according to item 1, wherein the oxidation is terminated at a time point when the correction voltage 値 Vt becomes the upper limit voltage 値 V 1. 3. The electrochemical oxidation method as described in item 1 of the scope of the patent application, wherein at the time point when the correction voltage 値 Vt becomes the upper limit voltage 値 V 1, the oxidation at a certain current ends, and then, the correction voltage 値 Vt is maintained at When the upper limit voltage 値 V 1 and the current decrease to a predetermined value, the aforementioned oxidation is completely completed, and even during the current reduction period, the correction voltage 値 Vt is obtained by correcting the voltage V based on the voltage increase 値 V0. 4. The electrochemical oxidation method according to item 1 of the scope of patent application, wherein the resistance of the electrolytic solution is detected by an electrode for resistance measurement before a current is passed between the anode and the cathode. 5. The electrochemical oxidation method as described in item 1 of the scope of the patent application, wherein, before the current is passed between the anode and the cathode, on the main surface of the semiconductor layer -45_ (2) (2) 200307326, the use is different from the established The resistance measurement area is separately provided in the oxidation target area to detect the resistance of the electrolytic solution. 6 · The electrochemical oxidation method according to item 1 of the scope of the patent application, wherein before the current is passed between the anode and the cathode, a resistance monitoring sample having the same shape as that of the object to be treated provided with the semiconductor layer is used, To test the resistance of the electrolyte. 7. The electrochemical oxidation method according to item 1 of the scope of the patent application, wherein the electrolytic solution is a solution in which an electrolyte is dissolved in an organic solvent. 8. The electrochemical oxidation method described in item 1 of the scope of patent application, wherein the current density on the main surface of the semiconductor layer is controlled so as to suppress the current density at the periphery of the oxidation target region of the semiconductor layer from becoming larger than that of the oxidation target region. other parts. 9. The electrochemical oxidation method according to item 8 of the scope of patent application, wherein the shape of the cathode is set so that the interval between the cathode and the semiconductor layer is increased at the periphery of the cathode so as to control the current density. 10. The electrochemical oxidation method described in item 8 of the scope of patent application, wherein the shape of the cathode is set so that the specific surface area per unit area of the cathode is smaller than other parts at the periphery of the cathode in order to control the current density . 1 1. The electrochemical oxidation method described in item 8 of the scope of patent application, wherein a dummy region for reducing the current density in the periphery of the oxidation target region is provided at the periphery of the oxidation target region of the semiconductor layer so as to facilitate Control current density. 2. The electrochemical oxidation method -46-(3) (3) 200307326 as described in item 8 of the scope of patent application, wherein the aforementioned electrode system is provided in parallel with each other in a plurality of rows on opposite sides opposite to the main surface of the semiconductor layer On the other hand, by making the width of the current introduction wiring introduced to the electrode overlapped on the periphery of the oxidation target area narrower, the width of the current introduction wiring introduced to the electrode overlapped on the other part is narrower, so as to control the current density. 13. The electrochemical oxidation method according to item 1 of the scope of patent application, wherein when a current is passed, bubbles attached to the main surface of the semiconductor layer are separated from the main surface when a current is passed. 14. The electrochemical oxidation method as described in item 13 of the scope of patent application, wherein the substrate including the anode and the semiconductor layer is vibrated to release the air bubbles. 15. The electrochemical oxidation method as described in item 13 of the scope of patent application, wherein a vibrator is arranged in the electrolytic solution, and vibration is applied to the electrolytic solution so as to release bubbles. 16. The electrochemical oxidation method as described in item 13 of the scope of patent application, wherein the electrolytic solution is sprayed toward the main surface of the semiconductor layer in order to release bubbles. -47-