SI8311849A8 - Demodulator for decoding bits strings channels into strings of data bits - Google Patents

Description

Tehnični problemA technical problem

Tehnični problem je v tem, da je pri znanem postopku ko diranja delež nizkih frekvenc (vključno enosmerno komponento) v frekvenčnem spektru toka bitov kanalov dokaj visok. Nadaljnja po manjkljivost je v tem, da sta pretvornika kodiranja (modulator, demodulator), posebno demodulator, dokaj komplicirana.The technical problem is that, in the known encoding process, the proportion of low frequencies (including the DC component) in the frequency spectrum of the channel bit stream is quite high. A further disadvantage is that the encoders (modulator, demodulator), especially the demodulator, are quite complicated.

Stanje tehnikeThe state of the art

Pri digitalnih prenosnih ali magnetnih in optičnih sistemih za zapis in reprodukcijo je informacija, ki naj se prenaša ali zapisuje, običajno v obliki zaporedja simbolov.For digital portable or magnetic and optical recording and reproducing systems, the information to be transmitted or recorded is usually in the form of a sequence of symbols.

Ti simboli tyorijo skupaj (pogosto binarno) abecedo. V primeru, da se to nanaša na binarno abecedo (v nadaljevanju tega opisa je tacbeceda predstavljena s simboloma 1” in 0”), se lahko en simbol, npr. “I zapiše v skladu s kodo NRZ-znakov kot prehod med dvema stanjema magnetizacije ali fokusa na magnetnem kolutu, traku ali optičnem kolutu. Drugi simbol, ”0”, je posnet ob odsotnosti takšnega prehoda.These symbols tie together the (often binary) alphabet. In case this refers to a binary alphabet (hereinafter referred to as tacbeceda represented by symbols 1 ”and 0”), one symbol, e.g. “I write according to the NRZ code as a transition between two states of magnetization or focus on a magnetic disc, tape or optical disc. The second symbol, “0”, is recorded in the absence of such a transition.

- 3 Kot rezultat določenih zahtev sistema se v praksi na zaporedjih simbolov, ki se lahko pojavijo, izvajajo prisile. Pri nekaterih sistemih je zahteva, da imajo lastno uro. To ima za posledico, da mora imeti zaporedje simbolov, ki se naj oddajajo ali posnamejo, zadostne prehode, da bi se proizvedlo iz zaporedja simbolov signal ure, ki je potreben za detekcijo in sinhronizacijo. Nadaljnja zahteva je lahko v tem, da se naj določena zaporedja simbolov ne pojavijo v signalu informacije, ker so ta zaporedja namenjena posebnim namenom, npr. kot sinhronizacijsko zaporedje. Imitacija sinhronizacij skega zaporedja s signalom informacije razveljavi enoumnost sinhronizacijskega signala in zaradi tega njegovo primernost v ta namen. Nadalje je lahko potrebno, da si prehodi ne sledijo pregosto drug za drugim z namenom, da bi se omejilo medsimbolno interferenco.- 3 As a result of certain system requirements, coercion is applied in practice on sequences of symbols that may occur. Some systems require that they have their own clock. This implies that the sequence of symbols to be transmitted or recorded must have sufficient transitions to produce from the symbol sequence the clock signal required for detection and synchronization. A further requirement may be that certain sequences of symbols should not appear in the information signal, since these sequences are intended for specific purposes, e.g. as a synchronization sequence. Imitation of the synchronization sequence with the information signal invalidates the uniqueness of the synchronization signal and therefore makes it suitable for this purpose. Furthermore, it may be necessary that transitions do not follow one another too often in order to limit inter-symbolic interference.

V primeru magnetnega ali optičnega zapisa se lahko ta zahteva nanaša tudi na gostoto informacije na zapisnem mediju, ker se lahko , če se pri vnaprej določeni minimalni razdalji med dvema zaporednima prehodoma na zapisnem mediju minimalni časovni interval (^Tm£_n)» ki ustreza pri tem signalu, ki se zapisuje, lahko poveča, v enaki meri poveča gostoto informacije. Z minimalno razdaljo T med prehodi (B . = pm---/je v korelaciji tudi potrebna minimalna ^{miu ά} min širina pasu (¾^).In the case of a magnetic or optical record, this requirement may also relate to the density of information on the recording medium, because at a predetermined minimum distance between two consecutive transitions on the recording medium, a minimum time interval ( ^T m £ _n ) "corresponding to it can increase this signal, which increases the density of information, to the same extent. With a minimum distance T between transitions (B. = pm --- /, a minimum ^{miu ά} min bandwidth (¾ ^) is also required in correlation.

=--4= - 4

Če se uporabijo kanali informacije, ki ne prenašajo enosmerni tok, kot je običajno primer z magnetnimi zapisnimi kanali, ima to za posledico zahtevo, da zaporedja simbolov v kanalu informacije obsegajo najnižjo možno komponento enosmernega toka (po možnosti nobeno).If channels of information that do not transmit DC are used, as is usually the case with magnetic recording channels, this results in a requirement that the sequences of symbols in the channel of information comprise the lowest possible component of DC (preferably none).

Postopek tipa, opisanega v uvodnem odstavku, je opisan v referenci D(1). Članek se nanaša na kode blokov, zasnovane na d-, k- ali (d, k) omejene q-narne bloke simbolov, pri čemer ti bloki zadoščajo naslednjim zahtevam:The type procedure described in the introductory paragraph is described in reference D (1). The article deals with block codes based on d-, k- or (d, k) bounded q-character blocks of symbols, these blocks meeting the following requirements:

(a) d-omejitev dva simbola 'P-tipa sta ločena z vrsto vsaj d sledečih si simbolov 0 tipa;(a) the d-constraint of the two P-type symbols is separated by a series of at least d the following 0-type symbols;

(b) k-omejitev: maksimalna dolžina vrste zaporedij sledečih si simbolov tipa 0 je k.(b) k-limit: the maximum length of a series of sequences of the following type 0 symbols is k.

Zaporedje npr. binarnih hitov podatkov je deljeno v sledeče se in zaporedne bloke, od katerih ima vsak m bitov podatkov. Ti bloki m bitov podatkov so kodirani v bloke z n informacijskimi biti (n>m). Ker je n> m, presega število kombinacij z n informacijskimi hiti število možnih blokov bitov podatkov (2⁰¹). če se npr. d-omejitvena zahteva izvaja pri blokih informacijskih bitov, ki naj bodo preneseni ali posneti, se izbere kartiranje 2^m blokov bitov podatkov na npr 2¹⁰ blokov informacijskih bitov (izmed možnega števila 2¹¹ blokov) tako, da se izvaja kartiranje samo pri tistih blokih informacijskih bitov, ki zadoščajo postavljenim zahtevam.The sequence e.g. binary data hits are divided into the following se and sequential blocks, each of which has m bits of data. These blocks of data bits are encoded into blocks of information bits (n> m). Since n> m, it exceeds the number of combinations of information hits by the number of possible blocks of data bits (2 ⁰¹ ). if e.g. d-constraint request is executed for blocks of information bits to be transmitted or recorded, mapping of 2 ^m blocks of data bits is selected to eg 2 ¹⁰ blocks of information bits (out of a possible number of 2 ¹¹ blocks) so that mapping is performed only for those blocks information bits that meet the set requirements.

-- 3- 3

Tabela I na str. 439 reference D(1) prikazuje, koliko različnih blokov informacijskih bitov je tam v odvisnosti od dolžine bloka (n) in zahteve, vsiljene na d. Tako je tam 8 blokov informacijskih bitov, ki imajo dolžino n = 4 ob pogoju, da je minimalna razdalja d = 1. Tako so lahko bloki bitov podatkov, ki imajo dolžino m=3 (2^ = 8 besed podatkov) predstavljeni z bloki informacijskih bitov, ki imajo dolžino n 4, dvema sledečima si simboloma '‘1-tipa v blokih informacijskih bitov, ki so ločeni z vsaj enim simbolom ”Oⁿ-tipa. Za ta primer je kodiranje potem ( <-> označuje kartiranjeTable I on p. 439 reference D (1) shows how many different blocks of information bits are there depending on the length of block (n) and the request imposed on d. Thus, there are 8 blocks of information bits having a length n = 4 provided that the minimum distance is d = 1. Thus, blocks of data bits having a length of m = 3 (2 ^ = 8 words of data) can be represented by blocks of information bits having length n 4, the following two symbols are 1-type in blocks of information bits separated by at least one symbol "O ^n- type. For this example, the encoding is then (<-> indicates the mapping

Če se združi blok informacijskih bitov, pa v nekaterih primerih ni možno zadostiti zahtevi, (v primeru d-omejitve) brez dodatnih ukrepov. V navedenem članku je predloženo, da se vključi.ločevalne bite med bloke informacijskih bitov.However, if a block of information bits is combined, in some cases it is not possible to satisfy the requirement (in the case of a d-restriction) without further action. This article proposes to include.location bits among blocks of information bits.

V primeru kodiranja z d-omejitvijo je dovolj en blok ločevalnih bitov, ki obsega d-bite O”-tipa. V zgoraj navedenem primeru, kjer je d=1, je en ločevalni bit (ena ničla) zato zadosten. Vsak blok treh bitov podatkov je potem oddan s 5 (4+1) biti kanalov.In the case of d-constrained encoding, a single block of separation bits is sufficient, comprising d-bits of the O ”type. In the above case, where d = 1, one separating bit (one zero) is therefore sufficient. Each block of three data bits is then transmitted with 5 (4 + 1) bits of channels.

- 6 Omeniti je treba, da podaja referenca D(2), da se neravnovesje enosmernega toka (d, k) omejenih kod lahko omeji z medsebojnim povezovanjem blokov bitov kanalov s pomočjo t.zv. invertirajoče ali neinvertirajoče povezave. Če se tako ravna, je znak deleža trenutnega bloka bitov kanalov glede na enosmerno tokovno neravnovesje izbran tako, da se enosmerno tokovno neravnovesje predhodnih blokov bitov kanalov zmanjša. Vendar pa se tukaj obravnava (d, k) - omejena koda, katere bloki informacijskih bitov so lahko povezani brez prehajanja v spopad z (d, k) omejitvijo, tako da dodajanje ločevalnih bitov iz razlogov (d, k) omejitve ni potrebno.- 6 It is worth mentioning that reference D (2) states that the imbalance of direct current (d, k) of restricted codes can be limited by interconnecting blocks of channel bits by means of so-called. inverting or non-inverting links. If so, the sign of the proportion of the current block of channel bits relative to the DC current imbalance is chosen to reduce the DC current imbalance of the previous block of channel bits. However, (d, k) is considered here - bounded code whose blocks of information bits can be connected without going into conflict with (d, k) constraint, so that the addition of separating bits is not necessary for reasons (d, k) of the constraint.

Opis rešitve tehničnega problemaDescription of solution to a technical problem

Tehnični problem je bil rešen z novim postopkom kodiranja, opisanega v uvodnem odstavku za kodiranje zaporedja binarnih bitov podatkov v zaporedje binarnih bitov kanalov, ki izboljšuje nizkofrekvenčne spektralne lastnosti signala, ki naj bo izveden iz bitov kanalov in kjer postopek omogoča uporabo preprostega demodulatorja, ki je predmet te prijave.A technical problem has been solved by a new encoding procedure described in the introductory paragraph for encoding a sequence of binary data bits into a sequence of binary channel bits that improves the low-frequency spectral properties of a signal to be derived from channel bits and where the process allows the use of a simple demodulator that is the subject of this application.

Nov postopek je označen s tem, da obsega naslednje stopnje.The new process is characterized in that it comprises the following stages.

1. pretvarjanje blokov, ki vsebujejo m-bite bitov podatkov, v bloke, ki vsebujejo n bitov informacijskih bitov,1. converting blocks containing m-bits of data bits into blocks containing n bits of information bits,

2. generiranje stavka možnih zaporedij bitov kanalov, pri čemer obsega vsako zaporedje vsaj en blok informacijskih bitov in en blok ločevalnih bitov in vsaka od teh možnih zaporedij obsega bloke informacijskih bitov, dopolnjenih z enim od možnih kombinacij bitov blokov ločevalnih bitov;2. generating a statement of possible sequences of channel bits, each sequence comprising at least one block of information bits and one block of separation bits, and each of these possible sequences comprises blocks of information bits supplemented by one of the possible combinations of bits of blocks of separation bits;

3. določevanje enosmernega tokovnega neravnovesja za vsako od možnih zaporedij bitov kanalov, določenih s predhodno stopnjo,3. determining the DC current imbalance for each of the possible sequences of channel bits determined by the prior stage,

4. za vsako od možnih zaporedij bitov kanalov določevanje vsote števila ločevalnih bitov in števila sledečih si in zaporednih informacijskih bitov tipa 0, ki so neposredno pred bitom tipa ”1,in vsote števila, ki sledi za bitom tipa 1, pri čemer tvori ta bit del' enega od blokov ločevalnih bitov, in vsote števila ločevalnih bitov in števila sledečih si in zaporednih informacijskih bitov tipa ”0, ki so neposredno pred in ki sledijo za blokom ločevalnih bitov,4. for each of the possible sequences of channel bits, determine the sum of the number of separating bits and the number of next and sequential information bits of type 0 immediately preceding the bit of type 1 and the sum of the number following the type 1 bit, forming that bit part 'of one of the separation bit blocks, and the sum of the number of separation bits and the number of next and sequential information bits of type' 0 immediately preceding and following the block of separation bits,

5. generiranje prvega označevalnega signala za tista zaporedja bitov kanalov, katerih vrednosti vsote, določene v predhodni stopnji so višje od 2d in ne večje kat enake k,5. generating the first marker signal for those channel bits whose sum values determined in the preceding step are higher than 2d and no greater than k,

6. izbiranje tistega zaporedja bitov kanalov iz zaporedij bitov kanalov, ki so rezultirali v prvem indikacijskem signalu, katero zmanjšuje enosmerno tokovno neravnovesje na minimum.6. selecting that sequence of channel bits from the channel bit sequences that resulted in the first indication signal, which minimizes the direct current imbalance.

Izvedbeni primeri izuma in njihove prednosti bodo sedaj v nadaljevanju opisane glede na risbe. V teh risbah:Embodiments of the invention and their advantages will now be described below with reference to the drawings. In these drawings:

slika 1 prikazuje nekaj zaporedij bitov za ponazarja nje izvedbe formata kodiranja po izumu;Figure 1 shows some bit sequences to illustrate the embodiment of the encoding format of the invention;

slika 2 prikazuje nekatere nadaljnje izvedbe formata kodiranja kanala, ki se uporablja pri zmanjševanju enosmernega tokovnega neravnovesja po izumu;Figure 2 shows some further embodiments of the channel coding format used to reduce the DC current imbalance of the invention;

slika 3 je načrt pretoka izvedbe postopka po izumu; slika 4 ponazarja blok sinhronizacijskib bitov za uporabo v postopku po izumu; slika 5 prikazuje izvedbo demodulator ja v skladu z izumom za dekodiranje bitov podatkov, ki so kodirani v skladu s postopkom;Figure 3 is a flow diagram of an embodiment of the process of the invention; Figure 4 illustrates a block of synchronization bits for use in the method of the invention; Figure 5 shows an embodiment of a demodulator according to the invention for decoding bits of data encoded according to the process;

slika 6 prikazuje izvedbo sredstev za detektiranje zaporedja sinhronizacijskib bitov po izumu;Figure 6 shows an embodiment of means for detecting a sequence of synchronization bits according to the invention;

slika 7 prikazuje izvedbo formata okvira za uporabo v postopku po izumu.Figure 7 shows an embodiment of a frame format for use in the method of the invention.

Ustreznim elementom v slikah so bili dani enaki refe renčni znaki.The corresponding elements in the pictures were given the same reference characters.

Reference so naslednje:The references are as follows:

(1) Tang, D.T., Babi, L.R., Block codes for a class of constrained noiseless cbannels”. Information and Control, zvezek 17, št. 5, dec. 1970, strani 436 do 461.(1) Tang, D.T., Babi, L.R., Block codes for a class of constrained noiseless cbannels ”. Information and Control, Volume 17, No. 5, dec. 1970, pp. 436 to 461.

(2) Patel, A.M., Charge-constrained byte-oriented (0,3) code, IBM Technical Disclosure Bulletin, zvezek 19, št. 7, dec. 197θ, strani 2715 do 2717·(2) Patel, A.M., Charge-constrained byte-oriented (0,3) code, IBM Technical Disclosure Bulletin, Volume 19, No. 7, dec. 197θ, pages 2715 to 2717 ·

G vSlika 1 prikazuje nekaj zaporedij bitov, da bi se ponazorilo postopek kodiranja toka binarnih, bitov podatkov (sl. 4a) v tok binarnih bitov kanalov (slika 4b). Tok bitov podatkov je deljen v sledeče si in zaporedne bloke BD. Vsak blok bitov podatkov obsega m bitov podatkov. S pomočjo primera bo v nadaljnjem toku tega opisa in slikah uporabljena izmira m = 8. Isto pa seveda velja za vsako drugo vrednost m. Blok m bitov podatkov BD^ nasploh obse ga eno od 2⁰³ možnih zaporedij bitov.G vFigure 1 shows some bit sequences in order to illustrate the process of encoding binary, data bits (Fig. 4a) into the stream of binary channel bits (Fig. 4b). The data bit stream is divided into the following si and successive BD blocks. Each block of data bits comprises m data bits. With the help of an example, in the subsequent flow of this description and figures, the m = 8 dimension will be used. The same applies, of course, to every other value of m. The block of m bits of BD ^ data generally comprises one of the 2 ⁰³ possible bit sequences.

Takšna zaporedja bitov niso tako primerna za direktno optično ali magnetno snemanje in to iz različnih razlogov, če si namreč dva simbola podatkov tipa 4, ki sta npr. posneta na zapisnem mediju kot prehod iz ene smeri magnetiziranja v drugo ali kot prehod v vdrtino, sledita drug za drugim, potem ta prehoda ne smeta biti preblizu skupaj zaradi njihovega možnega medsebojnega vpliva. To omejuje gostoto informacije. Istočasno je povečana minimalna širina pasu B ki je potreb na za prenos ali zapis toka bitov, če je minimalna razdalja T_m._n med sledečima si prehodoma B^^ = 1/(2T ) majhna. Druga zahteva, ki se pogosto postavlja na sisteme za prenos podatkov in sisteme za optičen ali magneten zapis, je ta, da morajo imeti zaporedja hitov zadostne prehode, da izdvajajo iz oddanega signala 3ignal ure, s katerim se lahko izvaja sinhronizacija. Blok, ki ima m ničel, pred katerim se nahaja v najslabšem primeru situacije blok, ki se končuje s številom ničel in kateremu sledi, blok, ki se prične s številom ničel, bi otežkočil izločanje signala ure.Such sequences of bits are not so suitable for direct optical or magnetic imaging, and for different reasons, if you are two symbols of data type 4, such as. recorded on a recording medium as a transition from one magnetization direction to another or as a transition into a well, following each other, then these transitions should not be too close together due to their possible interplay. This limits the density of information. At the same time, the minimum bandwidth B required to transmit or record the bitstream is increased if the minimum distance is T _m . _n between the following passages B ^^ = 1 / (2T) is small. Another requirement that is often imposed on data transmission systems and optical or magnetic recording systems is that the hit sequences must have sufficient transitions to extract from the transmitted signal a 3-signal clock that can be synchronized. A block having m zeros preceded by a worst-case situation a block ending with a number of zeros followed by a block starting with a number of zeros would make it difficult to extract the clock signal.

- ηο Informacijski kanali, ki ne prenašajo enosmerni tok, kot so to kanali za magnetni zapis, morajo nadalje zadovoljevati zahtevi, da ohsega tok podatkov, ki se snema, komponento enosmernega toka, ki je kar najmanjša. Z optičnim zapisom je poželjno, da se nizkofrekvenčni del spektra podatkov v kar največji meri duši, in sicer z vidika servokrmiljenj. Dodatno je demodulacija poenostavljena, kadar je komponenta enosmernega toka relativno majhna.- ηο Information channels which do not transmit direct current, such as magnetic channels, must further satisfy the requirement that the recording data stream is kept to be the minimum DC component. With the optical record, it is desirable that the low-frequency portion of the data spectrum be attenuated as far as possible from the point of view of the steering. In addition, demodulation is simplified when the DC component is relatively small.

Zaradi gornjega razloga in drugih razlogov se t.zv. kodiranje kanala izvaja na hitih podatkov,preden se ti prenašajo preko kanala ali preden se zapisujejo. V primeru kodiranja v blokih (referenca d(1)) so bloki bitov podatkov, od katerih vsak vsebuje m bitov, kodirani kot bloki informacijskih bitov, od katerih obsega vsak n^ ..informacijskih bitov. Slika 4 prikazuje, kako je blok bitov podatkov BD^ pretvorjen v blok informacijskih bitov BL·. S pomočjo primera bo v nadaljnjem toku tega opisa in v slikah uporabljena izbira n^ = 14. Ker je večji kot m,ne bodo uporabljene vse kombinacije ki se lahko tvorijo z n^ biti: tiste kombinacije, ki ne ustre zajo dobro kanalu, ki naj bo izkoriščen, niso uporabljene. Ta ko je potrebno za zahtevano ena-proti-ena kartiranje podatkov v besede kanalov izmed več kot 16.000 možnih besed kanalov iz brati samo 256 besed. Zaradi tega je potrebno vstaviti na besede kanalov nekatere zahteve. Baa zahteva je ta, da naj se znotraj istega bloka n^ informacijskih bitov nahaja med dvema zaporednima informacijskima bitoma prvega tipa .-“1 tipa naha ja vsaj d sledečih si in zaporednih informacijskih bitov enegaFor the above reason and other reasons, the so-called It performs channel coding on hit data before it is transmitted through the channel or before it is recorded. In the case of block coding (reference d (1)), data bits blocks, each containing m bits, are encoded as blocks of information bits, each comprising n ^ ..information bits. Figure 4 shows how the block of data bits BD ^ is converted to the block of information bits BL ·. By way of example, the choice n ^ = 14 will be used in the continuation of this description and in the figures. Since it is greater than m, not all combinations that can be formed will be used: those combinations that do not fit the channel will be used, not used. This one takes the required one-to-one mapping of data into word channels out of more than 16,000 possible word channels from read only 256 words. For this reason, some requirements must be inserted into the channel words. The baa requirement is that, within the same block of n ^ information bits, be located between two consecutive information bits of the first type .- “1 type finds at least d the following and consecutive information bits of one

- 11 tipa ”0 tipa. Tabela I na str. 4$9 reference D(1) prikazuje koliko je takšnih binarnih besed v odvisnosti od vrednosti d- 11 types ”0 types. Table I on p. 4 $ 9 reference D (1) shows how many such binary words depend on the value of d

Iz tabele je razvidno, da se za n^ = 14 nahaja tam 277 besed z vsaj dvema (d = 2) bitoma 0 tipa med sledečimi si biti ('Ί tipa). Če se kodira bloke z osmimi biti podatkov, od ka 8 terih je lahko 2 = 256 kombinacij, kot bloke bitov 14 kanalov, se lahko zahteva d=2 zato v zadostni meri izpolni.The table shows that for n ^ = 14 there are 277 words with at least two (d = 2) bits of type 0 between the following bits ('Ί of type). If blocks of eight data bits are encoded, of which 8 can be 2 = 256 combinations, as blocks of bits of 14 channels, the requirement d = 2 can therefore be sufficiently fulfilled.

Povezava bloka informacijskih bitov BI^ pa ni možna brez nadaljnjih ukrepov, če se iste zahteve d-prisile ni uveljavilo ssno v bloku n^ bitov, temveč se razteza tudi preko meje med dvema sledečima si blokoma. Glede na to predlaga referenca D(1) (stran 451), da se med bloke bitov kanalov vključi enega ali več ločevalnih bitov. Zlahka se lahko vidi da je, če se vključi število ločevalnih bitov '‘0-tipa, ki je vsaj enako d, d-prisila izpolnjena. Slika 1 prikazuje, da sestoji blok bitov kanalov BCk iz bloka informacijskih bitov BL· in bloka ločevalnih bitov BS^. Blok ločevalnih bitov obsega n^ bitov tako, da blok bitov kanalov BCk obsega n^ + n^ bitov. Zaradi primera bo v nadaljnjem toku opisa in v slikah uporabljena izbira n^ = 3, v kolikor ni drugače označeno.The connection of the BI ^ block of information bits is not possible without further action if the same d-compulsion requirement has not been enforced ssno in the block of n ^ bits, but also extends beyond the boundary between the two following blocks. Against this background, reference is made to D (1) (page 451) to include one or more punctuation bits between the channel bit blocks. It can easily be seen that if the number of bits of the '' 0-type, which is at least equal to d, is included, the d-forcing is satisfied. Figure 1 shows that the block of bits of BCk channels consists of the block of information bits BL · and the block of separation bits BS ^. The block of separation bits comprises n ^ bits such that the block of bits of the BCk channels comprises n ^ + n ^ bits. For the sake of example, the choice n ^ = 3 will be used in the following description and in the figures, unless otherwise indicated.

Z namenom, da bi se naredilo generiranje ure kar naj bolj zanesljivo, je lahko nadaljnja zahteva ta, da je maksimalno število bitov 0 tipa, ki se lahko pojavijo neprekinjeno med dvema sledečima si bitoma 1” tipa znotraj enega bloka informacijskih bitov, omejeno na vnaprej določeno vred nost k. V primeru, kjer je m=8 in n^=14, je možno izločiti iz 277 besed, ki zadoščajo d=2, tiste besede, ki imajo npr. za :In order to make the generation of the clock as reliable as possible, a further requirement may be that the maximum number of bits of type 0 that can occur continuously between two subsequent bits of 1 "type within one block of information bits is limited to a predetermined a certain value of k. In the case where m = 8 and n ^ = 14, it is possible to exclude from 277 words sufficient d = 2 those words which have e.g. for:

.......... -12 zelo visoko vrednost. Izgleda, da se lahko k omeji na 10........... -12 very high value. It looks like k may be limited to 10.

Zaradi tega se stavek 2^ (na sploh 2¹¹¹) blokov hitov podatkov, δ vsak z 8 biti (na sploh m) kartira v stavek tudi 2 (na sploh 2¹¹¹) blokov informacijskih hitov, kjer so ti informacijski hiti bili izbrani iz 2^ (na sploh 2¹¹) možnih blokov informacijskih hitov, kar je deloma rezultat dejstva, da so bile vsiljene naslednje zahteve: d=2 in k=10 (na sploh d, k-vsiljeno). Se vedno je izbira posameznika, kateri od blokov hitov podatkov ho povezan z enim od blokov informacijskih hitov. V zgoraj navedeni referenci (D(l)) je prevod številke iz hitov podatkov v informacijske hite enoumno določen v matematično zaključeni obliki. Čeprav se lahko načeloma ta prevod uporabi, je prednost dana različni povezavi, kot ho nadalje v nadaljevanju razloženoFor this reason, the sentence 2 ^ (generally 2 ¹¹¹ ) of the hit data blocks, δ each with 8 bits (at all m), is mapped to the sentence also 2 (at all, 2 ¹¹¹ ) of the hit information blocks, where these information hits were selected from 2 ^ (generally 2 ¹¹ ) possible blocks of information hits, which is partly due to the fact that the following requirements were imposed: d = 2 and k = 10 (in general, d, k-forced). It is still the choice of the individual which of the data hit blocks ho is associated with one of the information hit blocks. In the above reference (D (l)), the translation of a number from data hits into information hits is uniquely determined in mathematically completed form. Although this translation may in principle be used, preference is given to a different connection, as explained below

Povezava nadaljnjih -k-prisiljenih besed kanalov BL· je možna samo, kar se nanaša tudi na d-prisiljene bloke, če so bili med bloki informacijskih hitov BL· nameščeni ločevalni bloki. Načeloma se lahko uporabljajo v ta namen isti ločevalni bloki, vsak z n^ hiti, ker zahteve po d-prisili: in k-prisili niso druga drugi nasprotne, temveč so celo komplementarne. Če zaradi tega vsota števila vrednosti hitov tipa 0, ki se nahaja pred podanim ločevalnim blokom»presega število vrednosti, ki sledijo po tem ločevalnem postopku in n₂ biti samega ločevalnega bloka presegajo vrednost k, potem se naj vsaj ena od vrednosti bitov tipa “O” ločevalnega bloka nadomesti z vrednostjo bita tipa ”1 z namenom, da bi se delilo zaporedje ničel v zaporedja, ki niso vsako zase ne daljša kot k bitov.The connection of further -k-forced words of BL · channels is only possible, which also applies to d-forced blocks if separation blocks were installed between the BL information hits. In principle, the same punctuation blocks can be used for this purpose, each meaning that the requirements for d-coercion: and k-coercion are not opposite, but even complementary. For this reason, if the sum of the number of hit values of type 0, which is in front of the given separating block, "exceeds the number of values following this separation procedure and n _{2 of} the separating block itself exceeds the value of k, then at least one of the values of bits of type" O "Is replaced by the separator block with the value of a bit of type" 1 in order to divide the sequence of zeros into sequences not each longer than k bits.

- 13 Dodatno k njihovi funkciji zagotavljanja, da so izpolnjene zahteve (d, k)-prisile, se lahko ločevalni bloki dimenzionirajo tako, da se lahko uporabijo tudi za zmanjšanje neravnovesja enosmernega toka na minimum. To nastopa ob spoznanju; dejstva, da je za nekatere povezave blokov informacijskih bitov dejansko predpisan vnaprej določen format blokov ločevalnih bitov, da pa pri velikem številu primerov niso postavljene na format bloka ločevalnih bitov ali nobene zahteve ali pa samo omejene zahteve. Stopnja prostosti, ki je s tem oblikovana, je uporabljena za zmanjšanje neravnovesja toka na minimum.- 13 In addition to their function of ensuring that the (d, k) requirements are met, the separation blocks can be dimensioned so that they can also be used to minimize DC imbalance. This comes with knowing; the fact that for some connections of blocks of information bits, a predetermined format of the block of block bits is actually prescribed, but that, in many cases, they are not set to the format of the block of block bits or any request or only limited requirements. The degree of freedom thus formed is used to minimize the current imbalance.

Nastopanje in rast neravnovesja enosmernega toka se lahko razloži na sledeč način. Blok informacijskih bitov BI^, kot je prikazan v sliki 1b, je posnet na zapisni medij, npr. v obliki formata MRZ-znamke. S tem formatom je ”1 označena s prehodom na začetku ustrezne celice bita in postane 0, kadar ni zapisan noben prehod. Zaporedje bitov, prikazano z BI^ prevzame potem obliko, ki je označena z WP, pri čemer je potem to zaporedje bitov posneto na zapisni medij v tej obliki. To zaporedje ima neravnovesje enosmernega toka, ker ima pri predloženem zaporedju pozitivno raven dolžino, ki je daljša od tiste od negativne ravni. Merilo, ki je za neravnovesje enosmernega toka pogosto uporabljeno, je vrednost, digitalne v» vsote, skrajšana na d.s.v. Ce predpostavimo, da sta ravni valovne oblike + 1 oz. - 1, je d.s.v. potem enak nedoločenemu integralu valovne oblike WP in če je +6T v primeru, prikazanem v sliki 16, je T dolžina enega intervala bita. če so takšnaThe onset and growth of DC imbalance can be explained as follows. The BI ^ information bit block, as shown in Figure 1b, is recorded on a recording medium, e.g. in MRZ format. With this format, "1" is indicated by the transition at the beginning of the corresponding bit cell and becomes 0 when no transition is written. The bit sequence shown by BI ^ then takes the form indicated by WP, whereupon the sequence of bits is recorded on the recording medium in this format. This sequence has an unbalance of direct current because in the presented sequence the positive level has a length longer than that of the negative level. The criterion commonly used for DC power imbalance is the value, digital, of "sums, abbreviated to d.s.v. Assuming that the waveform levels are + 1 or. - 1, is d.s.v. then equals an indefinite integral of the WP waveform and if + 6T in the example shown in Fig. 16, T is the length of one bit interval. if they are

ϊ. .. _·_ηζμ _ zaporedja ponovljena, bo neravnovesje enosmernega toka raslo. Na sploh ima to ravnovesje enosmernega toka za posledico premik osnovne črte in zmanjšuje efektivno razmerje signal - šum in zaradi tega zanesljivost detekcije posnetega signala.ϊ. .. _ · _ηζμ _ sequences repeated, the DC imbalance will grow. In general, this direct current balance results in a displacement of the baseline and reduces the effective signal-to-noise ratio and therefore the reliability of detection of the recorded signal.

Blok ločevalnih bitov BS^ je uporabljen tako .kot sledi, za omejevanje neravnovesja enosmernega toka. V danem trenutku je podan blok bitov podatkov Bit . Ta blok bitov podatkov BK se pretvori v blok informacijskih bitov BI, npr. s pomočjo tabele, shranjene v spominu. Za tem se generira stavek možnih blokov bitov kanalov, ki vsebujejo (n^ + n₂) bitov. Vsi ti bloki obsegajo isti blok informacijskih bitov (celice bitov 1 do vključno 14, slika 1b) dopolnjenih z možnimi kombinacijami bitov n₂ ločevalnih bitov (celice bitov 15, 16 in 17, slikaThe BS ^ separation bit block is used as follows .to limit the DC imbalance. A block of bits of Bit data is given at a given time. This BK data block is converted to a BI information bit block, e.g. using a table stored in memory. Following this, a statement of possible blocks of channel bits containing (n ^ + n ₂ ) bits is generated. All these blocks comprise the same block of information bits (cells bits 1 through 14 inclusive, Fig. 1b) supplemented with possible combinations of bits n ₂ separating bits (cells bits 15, 16 and 17, Fig.

1b). Zaradi tega je v prikazanem primeru v sliki 1b proizvei den stavek, ki sestoji iz 2¹¹ =8 možnih blokov bitov kanalov.1b). As a result, in the example shown in Figure 1b, a day statement is produced consisting of 2 ¹¹ = 8 possible blocks of channel bits.

Zatem se določijo iz vsakega od možnih blokov bitov kanalov, načeloma v poljubnem zaporedju, naslednji parametri:Thereafter, the following parameters are determined from each of the possible blocks of channel bits, in principle in any order:

a) za ustrezen možen blok bitov kanalov je glede na predhoden blok bitov kanalov določeno, ali zahteva po d-prisili in zahteva po k-prisili ne prihaja v nasprotje s formatom predloženega bloka ločevalnih bitov;a) for the corresponding possible block of channel bits, with respect to the previous block of channel bits, it is determined whether the d-coercion request and the k-coercion requirement do not conflict with the format of the submitted bit block;

d) določitev d_rs.v. za ustrezen možen blok bitov kanalov.d) determining d _r sv for the corresponding possible block of channel bits.

Prvi indikacijski signal je proizveden za tiste možne bloke bitov kanalov, ki niso v nasprotju s zahtevami d-prisile in k-prisile. Izbira parametrov kodiranja zagotavlja, da se takšen signal indikacije generira za vsaj enega od možnih blokov informacijskih bitov. Končno se iz možnih blokov bitovThe first indication signal is produced for those possible channel bits that do not contradict the requirements of d-coercion and k-coercion. The choice of coding parameters ensures that such an indication signal is generated for at least one of the possible blocks of information bits. Finally out of the possible block bits

- 15 kanalov, za katere je bil generiran prvi indikacijski signal, izbere npr. tisti blok bitov kanalov, ki ima v absolutnem smislu najnižji d.s.v. Vendar pa je še boljši postopek akumuliranje d.s.v. : predhodnih blokov bitov kanalov in izbiranje iz blokov bitov kanalov, ki so primerni za naslednji prenos, tisti blok, ki bo povzročil, da se bo absolutna vrednost akumuliranega d.s.v. znižala. Tako izbrana beseda se potem prenese ali zapiše.- 15 channels for which the first indication signal was generated, select e.g. that block of channel bits that, in absolute terms, has the lowest d.s.v. However, an even better process is to accumulate d.s.v. : previous channel bit blocks and selecting from channel bit blocks that are suitable for the next transmission, the block that will cause the absolute value of the accumulated d.s.v. lowered. The word thus selected is then transferred or written down.

Prednost tega postopka je v tem, da se ločeval ni biti, ki so že potrebni v druge namene, sedaj lahko uporabijo tudi na preprost način za omejevanje neravnovesja enosmernega toka. Dodatna prednost je v tem, da je poseg v signal, ki se oddaja, omejen na bloke ločevalnih bitov in ni razširjen na bloke informacijskih bitov (ob neupoštevanju polaritete valovne oblike, ki se oddaja ali zapisuje). Demodulacija čitanega, posnetega signala se nanaša potem samo na informacijske bite. LoČevahe bite potem ni potrebno upoštevati.The advantage of this process is that separators not already needed for other purposes can now also be used in a simple way to limit the DC imbalance. An additional advantage is that the interference with the transmitted signal is limited to blocks of separation bits and is not extended to blocks of information bits (disregarding the polarity of the waveform being transmitted or recorded). The demodulation of the read, recorded signal then applies only to information bits. Then the separate bits need not be taken into account.

Slika 2 prikazuje nekatere druge izvedbe postopka. Slika 2a shematsko prikazuje zaporedja blokov bitov kanalov ..., BCk, BCk_+zp ···, P^ri čemer ti bloki obsegajo vnaprej določeno število (n^ + n^) bitov. Vsak blok bitov kanalov obsega bloke informacijskih bitov,ki sestojijo iz n^ bitov, in bloke ločevalnih bitov ... BS^_g, ^i+1* od katerih vsak sestoji iz ng bitov.Figure 2 shows some other embodiments of the process. Figure 2a schematically shows the sequences of block bits of channels ..., BCk, BCk _{+ with} p ···, P ^r i, these blocks comprising a predetermined number (n ^ + n ^) of bits. Each block of channel bits comprises blocks of information bits consisting of n ^ bits and blocks of separating bits ... BS ^ _g, ^ i + 1 * each of which consists of ng bits.

- ‘16 V tej izvedbi je neravnovesje enosmernega toka določeno preko več blokov, npr., kot je prikazano v sl. 2a, preko dveh blokov bitov kanalov BC^ in BC η. Neravnovesje enosmernega toka je določeno na podoben način, kot je opisano za izvedbo s sl. 1 ob pogoju, da so možni formati superblokov proizvedeni za vsak superblok SBCk , kar pomeni, da so bloki informacijskih bitov za blok BCk in bloke B(k_+Zj dopolnjeni z vsemi možnimi kombinacijami, ki se lahko izoblikujejo z n₂ ločevalnimi biti blokov Kk in blokom B3^₊^. Ta kombinacija, ki zmanjša neravnovesje enosmernega' toka na minimum, je izbrana zatem iz tega stavka. Ta postopek ima prednost, da ima preostalo neravnovesje enosmernega toka bolj enakomeren značaj, ker vrednosti več kot en blok bitov kanalov naprej, katerega poseg je optimalen.- '16 In this embodiment, the direct current imbalance is determined by several blocks, e.g., as shown in FIG. 2a, via two block bits of channels BC ^ and BC η. The DC imbalance is determined in a similar manner to that described for the embodiment of FIG. 1 provided that the possible formats of superblocks are produced for each superblock SBCk, which means that the information bits for the block BCk and blocks B (k _{+ Z} j are supplemented with all possible combinations that can be formed from ₂ separating bits of blocks Kk and block B3 ^ ₊ ^ This combination, which minimizes DC imbalance to a minimum, is then selected from this sentence This procedure has the advantage that the residual DC imbalance has a more uniform character since the values of more than one forward channel block , whose intervention is optimal.

Prednostna varianta tega postopka ima določeno prednost, da je superblok SBCk (slika 2a) premaknjen za en blok bitov kanalov samo potem, ko je bilo neravnovesje enosmernega toka zmanjšano na minimum .To pomeni, da se obdeluje blok BCk (v sliki 2a), ki je del superbloka SBCk, in da vsebuje (nepri kazan ) naslednji superblok SBCkbloka BCk_+z^ in BC^₊₂ (¹¹^ prikazan), za katera je bila izvedena zgoraj opisana operacija zmanjšanja neravnovesja enosmernega toka na minimum. Tako je blok BCkdel tako superbloka SBCk in naslednjega bloka SBC^_+Zj. Potem je popolnoma možno, da se (začasna) izbira za ločevalne bite v bloku BS^_+Zj, izvedena v superbloku SBCk , raz liku je od končne izbire, izvedene v superbloku SBC^_+/j. Ker se vsak blok obdeluje večkrat (v predloženem primeru dvakrat),se neravnovesje enosmernega toka in zaradi tega delež šuma še naAn advantageous variant of this process has the advantage that the superblock SBCk (Fig. 2a) is moved by one block of channel bits only after the DC imbalance has been reduced to a minimum. This means that the BCk block (in Fig. 2a) is processed, It is part of the SBCk superblock, and contains (unspecified) the following SBCkblock superblock BCk _{+ z} ^ and BC ^ ₊₂ ( ¹¹ ^ shown) for which the above-described direct current unbalance operation was minimized. Thus the BCkdel block is both the superblock SBCk and the next block SBC ^ _{+ Z} j. Then it is possible that the (temporary) selection for the separation bits in the BS ^ _{+ Z} j block made in the SBCk superblock is different from the final selection made in the SBC ^ _{+ /} j superblock. As each block is machined twice (in the present case twice), the DC imbalance and therefore the noise share continue to

- T? - dalje zmanjšujeta.- T? - further reduced.

Slika 2b prikazuje nadaljnjo izvedbo, pri kateri je neravnovesje enosmernega toka določeno za več blokov istočasno (SBCj), npr., kot je prikazano v sliki 2b,za štiri bloke bitov kanRlov BCj^\ BCj^²\ BCj^ in BCj^\ Vsak od teh blokov bitov kanalov obsega vnaprej določeno število n^ informacijskih bitov. Vendar pa število ločevalnih bitov, obseženih v blokih ločevalnih bitov BSj^\ BSj^²\ BSj^^ in (4)Figure 2b shows a further embodiment in which the DC imbalance is determined for several blocks at a time (SBCj), e.g., as shown in Figure 2b, for the four blocks of bits of the channel BCj ^ \ BCj ^ ² \ BCj ^ and BCj ^ \ Each of these channel bit blocks comprise a predetermined number of n ^ information bits. However, the number of separation bits scattered in the blocks of the separation bits BSj ^ \ BSj ^ ² \ BSj ^^ and (4)

BSj^{x 7}, ni za vsak blok bitov kanalov enako. Število informacijskih bitov lahko znaša npr. 14 in število ločevalnih bitov za bloke BSj^\ BSj^²^ in BSj^ je lahko za vsak blok 2 in za blok BSj^^ 6. Določevanje neravnovesja enosmernega toka se izvaja na podoben način, kot je opisano za izvedbo s slike 2a.BSj ^{x 7} , is not the same for every block of channel bits. The number of information bits can be, e.g. 14 and the number of separation bits for blocks BSj ^ \ BSj ^ ² ^ and BSj ^ can be for each block 2 and for block BSj ^^ 6. Determining the DC imbalance is performed in a similar manner as described for the embodiment of Figure 2a.

Dodatno k prednostim, ki so bile že predhodno omenjene in ki veljajo tudi tukaj,ima ta postopek prednost, da dosegljivost relativno dolgega bloka ločevalnih bitov poveča možnosti zmanjšanja neravnovesja enosmernega toka. Bolj podrobneje je preostalo neravnovesje enosmernega toka zaporedja bitov kanalov, v katerem obsega vsak blok bitov kanalov enako število, npr. 3 bite, večje od preostalega neravnovesja enosmernega toka zaporedja bitov kanalov, katerega bloki ločevalnih bitov obsegajo povprečje 3 bitov, vendar deljenih vIn addition to the advantages previously mentioned, which also apply here, this process has the advantage that the reach of a relatively long block of separation bits increases the chances of reducing the DC imbalance. In more detail, the residual DC imbalance of a sequence of channel bits in which each block of channel bits comprises an equal number, e.g. 3 bits larger than the residual DC imbalance of the sequence of channel bits whose block separation blocks comprise an average of 3 bits but divided by

2-2-2-6 bitov.2-2-2-6 bits.

Omeniti je treba, da se lahko pisana časovna zaporedja funkcij in s tem povezanih stanj postopka realizirajo s pomočjo univerzalnih sekvenčnih logičnih vezij, kot so to komercialno dosegljivi mikroprocesorji s pripadajočimi pomnil- 18 - niki in periferno opremo. Slika 3 prikazuje karto toka takšne izvedbe. Naslednja pojasnjevanja so povezana z opisi geometričnih figur, ki ponazarjajo v časovnem zaporedju funkcije in stanja postopka kodiranja. Stolpec A prikazuje referenčni simbol, B opis in stolpec C pojasnjevanje, ki je združeno s pripadajočo geometrično sliko.It is worth noting that the written sequences of functions and associated process states can be realized using universal sequential logic circuits, such as commercially available microprocessors with associated memory and peripheral equipment. Figure 3 shows a flow chart of such an embodiment. The following explanations relate to descriptions of geometric figures that illustrate in a timeline the function and state of the encoding process. Column A shows the reference symbol, B description, and Column C, which is combined with the associated geometric image.

DSC acc.DSC acc.

BD_± BD _±

BL· (BD_±)BL · (BD _± )

C vrednosti digitalne vsote (d.s.v.) predhodnih blokov bitov kanalov je ob pričetku postopka dana vrednost nič. Prvi besedi podatkov BD je podano število i=0. Nadaljujte z geometrično figuro 2;The value of the digital sum (d.s.v.) of the preceding channel bit blocks is zero at the start of the process. The first word of the BD data is the number i = 0. Continue with geometric figure 2;

iz pomnilnika je izbran blok bitov podatkov m bitov iz števila i. Nadaljujte z geometrično figuro 3;a block of data bits m bits from number i is selected from memory. Continue with geometric figure 3;

Blok bitov podatkov, ki ima število i (BD^), je pretvorjen v blok informacijskih bitov, ki sestoji iz n^ bitov (BK) s pomočjo tabele, shranjene v pomnilniku; nadaljujte z geometrično figuro 4;A block of data bits having the number i (BD ^) is converted to a block of information bits consisting of n ^ bits (BK) by means of a table stored in memory; proceed with geometric figure 4;

j:=j+1 j £ Q?j: = j + 1 j £ Q?

BC^J':=BI.+BS^a'BC ^J ': = BI. + BS ^a '

11.11.

LSV^a=?LSV ^a =?

--19Ob vrednosti O se sproži parameter j; parameter j 3^e število enega od q blokov bitov kanalov, ki sestoji iz n^+n.^ bitov, ki se ga po možnosti izbere za prenos ali snemanje; nadaljujte z geometrično figuro 5;--19Of the value O is triggered, parameter j; parameter j 3 ^{is the} number of one of the q blocks of channel bits, consisting of n ^ + n. ^ bits, which is preferably selected for transmission or recording; proceed with geometric figure 5;

Parameter j je povečan za 1; nadaljujte z geometrično figuro ⁶» če so bili za vse možne q bloke bitov kanalov določeni ustrezni parametri, se operacije nadaljujejo z operacijo, označeno z geometrično figuro V geometrični figuri 6 je to označeno z zanko N. Če je j Q,se operacije nadaljujejo z operacijo, označeno z geometrično figuro 7; j-ti možni blok bitov kanalov BCk je izoblikovan z nadomestitvijo bloka informacijskih bitov BL· z j-to kombinacijo bloka ločevalnih bitov BS^a; nadaljujte z geometrično sliko 8;The parameter j is increased by 1; continue with geometric figure ⁶ »if for all possible q blocks of channel bits the corresponding parameters have been specified, operations are continued with operation labeled geometric figure In geometric figure 6, this is indicated by loop N. If j Q, operations continue with the operation indicated by geometric figure 7; the jth possible block of bits of the BCk channels is formed by replacing the block of information bits BL · with the jth combination of the block of separation bits BS ^a ; proceed with geometric figure 8;

d.s.v. j-tega možnega bloka bitov kanalov je določen, nadaljujte z geometrično sliko 9»d.s.v. jth possible block of bits of channels is defined, continue with geometric image 9 »

- 2C 10 > k^J ? ' max <aQ)?- 2C 10> k ^J ? 'max <aQ)?

mmmm

DSV (^:=maxDSV (^: = max

Preizkušeno je, če j-ti možni blok bitov kanalov v povezavi s predhodnimi bloki bitov kanalov BCh _/j zadošča zahtevi po k-prisili. če je ta zahteva izpoljnjena, se operacije nadaljujejo z operacijo, označeno v geometrični sliki 10 (zanka V), če ta zahteva ni izpolnjena,potem je naslednja stopnja operacija, podana z geometrično sliko 11 (zanka P).It is tested if the jth possible block of bits of channels in conjunction with the previous blocks of bits of channels BCh _ / j meets the requirement for k-compulsion. if this requirement is fulfilled, the operations continue with the operation indicated in geometric figure 10 (loop V), if this requirement is not met, then the next step is the operation given by geometric figure 11 (loop P).

Preizkusi se, če j-ti možni blok bitov kanalov v povezavi s predhodnim blokom bitov kanalov BCh vTest if the jth possible block of bits of channels in conjunction with the previous block of bits of channels BCh in

zadošča zahtevi po d-prisili. Ce je ta zahteva izpolnjena, je naslednja stopnja operacija, označena z geometrično sliko 12 (zanka N). Če ta zahteva ni izpolnjena, potem se operacija nadaljuje s stopnjo, označeno z geometrično sliko 11 (zanka P);the d-coercion requirement is satisfied. If this requirement is fulfilled, the next step is the operation indicated by geometric figure 12 (loop N). If this requirement is not fulfilled, then the operation is continued with the step indicated by geometric figure 11 (loop P);

d.s.v. j-tega bloka bitov kanalov je podana tako visoka vrednost (maksimum), da se ta blok v nobenem primeru ne more izbrati; nadaljujte z geometrično sliko 12;d.s.v. the jth block of channel bits is given such a high value (maximum) that this block cannot in any case be selected; proceed with geometric figure 12;

dsv^\dsv^\ accdsv ^ \ dsv ^ \ acc

DSV acc min /DSV:=DSV^^e^ QDSV acc min / DSV: = DSV ^ ^e ^ Q

Bc£Bc £

DSV ^DSV^) ' acc i:=i+1DSV ^ DSV ^) 'acc i: = i + 1

--21- d.s.v. j-tega bloka bitov kanalov (dsv^)) je dodan akumuliranemu dsv (DSV ) predhodnih acc blokov bitov kanalov, da bi se dobilo novo akumulirano vrednost--21- d.s.v. jth channel block bit (dsv ^)) is added to the accumulated dsv (DSV) of the previous acc channel block bits to obtain a new accumulated value

d.s.v. (DSV^\ nadaljujte z a c c geometrično sliko 5jd.s.v. (DSV ^ \ continue with a c c geometric figure 5j

Določena je minimalna vrednost dsv od q možnih hitov kanalov.The minimum dsv value of q possible channel hits is specified.

To izgleda kot d.s.v. prvega bloka bitov kanalov; nadaljujte z geometrično sliko 14;This looks like a d.s.v. the first block of channel bits; proceed with geometric figure 14;

Izmed q možnih blokov je izbran prvi blok bitov kanalov; nadaljujte z geometrično sliko 15i Akumulirana vrednost d.s.v.Of the q possible blocks, the first block of channel bits is selected; continue with geometric figure 15i Accumulated value of d.s.v.

(DSV ) je izenačena z akumuliac c rano vrednostjo d.s.v. izbranega prvega bloka informacijskih hitov; nadaljujte z geometrično sliko 16; Število blokov bitov podatkov in informacijskih bitov je povečano za 1. Nadaljujte z geometrično sliko 2; cikel se sedaj ponavlja za naslednji, (i+l)-ti blok bitov podatkov.(DSV) is equated with the accumulated c d value of d.s.v. selected first block of information hits; proceed with geometric figure 16; The number of blocks of data bits and information bits is increased by 1. Continue with geometric figure 2; the cycle now repeats for the next, (i + l) th block of data bits.

........- 22 Zgoraj prikazana karta pretoka je uporabna za izvedbo, prikazano v sliki 1. Za izvedbe s slike 2 veljajo ustrezne karte pretoka ob upoštevanju že opisanih modifikacij.........- 22 The flow chart shown above is useful for the embodiment shown in Figure 1. The embodiments of Figure 2 are subject to the corresponding flow charts, subject to the modifications described above.

Z namenom, da bi se omogočilo, kadar se demodulira oddan ali posnet tok bitov kanalov, razlikovanje med informacijskimi biti in ločevalnimi biti (n^+n^), namreč n^ sinhronizira jočimi informacijskimi biti in n^ sinhronizira jočimi ločevalnimi biti, so v tok bitov kanalov vključeni bloki.In order to allow, when demodulated broadcast or recorded stream of channel bits, to distinguish between information bits and separating bits (n ^ + n ^), namely, n ^ synchronizes the blurred information bits and n ^ synchronizes the blinding separating bits, stream bits channels included blocks.

Blok sinhronizacijskih bitov se vstavi npr. za vsakim vnaprej določenim številom blokov informacijskih in ločevalnih bitov. Po detekciji te besede se lahko enoumno določi, v katerem položaju hita se nahajajo informacijski biti in v katerih položajih hita se nahajajo ločevalni biti. Treba je zato uvesti ukrepe, da bi se preprečilo, da bi bila sinhronizacij ska beseda imitirana z določenimi zaporedji hitov v blokih informacije in ločevanja. Glede na to se lahko izbere enoten blok sinhronizacijskih hitov, torej sinhronizacijskih bitov, ki se ne nahajajo v zaporedjih informacijskih in ločevalnih hitov. Zaporedja, ki ne izpolnjujejo zahteve, da so dprisiljene ali k-prisiljene, v ta namen niso toliko privlačne kot gostota informacije ali pa potem nastopa negativen vpliv na lastnosti lastnega dajanja takta. Vendar pa je izbira znotraj skupine zaporedij, ki izpolnjujejo zahteve po (d, k)prisili, zelo omejena.The synchronization bits block is inserted e.g. behind each predefined number of blocks of information and separation bits. Upon detection of this word, it can be unambiguously determined in which hit position the information bits are located and in which hit positions the separating bits are located. Measures should therefore be taken to prevent the word synchronization from being imitated by specific hit sequences in blocks of information and separation. Accordingly, a single block of synchronization hits can be selected, that is, synchronization bits that are not located in the information and separation hit sequences. Sequences that do not satisfy the requirement of being forced or k-forced are not as attractive as the density of information for this purpose, or thereafter have a negative effect on the characteristics of their own clocking. However, selection within a group of sequences that satisfy the (d, k) compulsion requirements is very limited.

Predlaga se zato drugačen postopek. Blok sinhronizacijskih bitov obsega npr. vsaj dvakrat zaporedoma in sledeče si zaporedje, ki obsega S bitov tipa O med dvema zaporedje- 2% ma bitov tipa ”1. Prednostno je S enak k. Slika 4 prikazuje blok sinhronizacijskih bitov SYN. Blok obsega dvakrat zaporedoma in sledeče si zaporedje (10000000000, 1, ki ji sledi 10 ničel), označeno z SIKP^ os. STNP^. To zaporedje se lahko nahaja tudi v toku bitov kanalov, namreč za zaporedje, kjer je k=lO. Da bi se pa preprečilo zaporedju, da bi se pojavilo dvakrat zaporedoma in sledeče si izven bloka sinhroni za cijskih bitov, je prvi indikacijski signal potlačen, če se nahaja pred vsoto števila ločevalnih bitov in številom zaporednih in sledečih informacijskih bitov tipa 0“ neposredno bit tipa ”1”, pri čemer je zadnji, ki tvori del bloka ločevalnih bitov, enak k in tudi enak vsoti števila zaporednih in sledečih si informacijskih bitov tipa 0, ki sledi neposredno za navedenim bitom tipa 1 bloka ločevalnih bitov. Drug, že označen način, da bi se preprečilo imitacijo, bi bila dvakratna zaporedna uporaba zaporedja 100000000000, t.j. 1, ki ji sledi 11 ničel.Therefore, a different procedure is proposed. The block of synchronization bits comprises e.g. at least twice in succession and the next sequence comprising S bits of type O between two sequences - 2% of bits of type "1. Preferably S is equal to k. Figure 4 shows the block of SYN synchronization bits. The block spans twice in a row, followed by the sequence (10000000000, 1 followed by 10 zeros), denoted by the SIKP ^ axis. STNP ^. This sequence can also be found in the stream of bits of channels, namely for the sequence where k = lO. However, in order to prevent the sequence from appearing twice in a row and following synchronous bits out of the block, the first indication signal is suppressed if it is located before the sum of the number of separating bits and the number of consecutive and subsequent information bits of type 0 "directly bit type "1", the last one forming part of the block of separation bits, is equal to k and also equal to the sum of the number of consecutive and subsequent information bits of type 0 that follows directly behind the said bit of type 1 of the block of separation bits. Another, already indicated way to prevent imitation would be to use the 100000000000 sequence twice, i.e. 1 followed by 11 zeros.

Dodatno obsega blok sinhronizacijskih bitov tudi blok sinhronizacij skih ločevalnih bitov. Punkcija bloka ločevalnih bitov je natanko ista kot funkcija, opisana prej za blok ločevalnih bitov med bloki informacijskih bitov (zaradi tega morajo za ta namen izpolnjevati (d, k)-prisilo in omejeno zahtevo po neravnovesju enosmernega toka). Ukrepi, ki jih je treba sprejeti, da bi se preprečilo, da bi bil 'sinhronizaci jski vzorec imitiran v toku bitov kanalov, da bi se pojavil dvakrat zaporedoma in v nadaljevanju, ti isti ukrepi preprečujejo tudi temu vzorcu, da bi se pojavil trikrat pred ali za blokom sinhronizaci j skih blokov.In addition, the block of synchronization bits also includes the block of synchronization separation bits. Punctuation of the block of separating bits is exactly the same as the function described earlier for the block of separating bits between blocks of information bits (therefore, for this purpose, they must satisfy the (d, k) -direction and the limited requirement for direct current imbalance). Measures to be taken to prevent the 'synchronization pattern from being imitated in the channel bit stream to appear twice in succession and below, these same measures also prevent this pattern from appearing three times before or after the sync block.

......- 24 Zgoraj opisan postopek, ki se lahko nanaša tudi na moduliranje ali kodiranje, ima v nasprotni smeri, t.j. med demodulacijo in dekodiranjem, občutno bolj preprost značaj. Omejevanje neravnovesja enosmernega toka je izvedeno brez vpliva na bloke informacijskih bitov, tako da je informacija v ločevalnih blokih brez vpliva na demoduliranje informacije. Dodatno je izbira, izvedena na delu modulatorja, kateri m bitov dolg' blok bitov podatkov je povezan z nekim n^ dolgim blokom informacijskih bitov, pomembna ne samo za modulator, temveč tudi za demodulator. Od te izbire je namreč odvisna kompleksnost demodulatorja. V magnetnih zapisnih sistemih je kompleksnost modulatorja in demodulatorja enako pomembna, ker sta na sploh oba prisotna v aparatu. V sistemih za optični zapis je zapisni medij tipa “samo črtanje”, tako da mora oprema potrošnika vsebovati samo demodulator. Tako je v tem zadnjem primeru posebno pomembno, da se zmanjša kompleksnost demodulatorja kar najbolj, celo na račun kompleksnosti modulatorja.......- 24 The procedure described above, which may also refer to modulation or coding, has the opposite direction, i.e. between demodulation and decoding, a significantly simpler character. The limitation of the DC imbalance is performed without affecting the blocks of information bits, so that the information in the separating blocks has no effect on the demodulation of the information. In addition, the choice made on the part of the modulator which m bits long 'block of data bits is associated with some n ^ long block of information bits is important not only for the modulator but also for the demodulator. The choice depends on the complexity of the demodulator. In magnetic recording systems, the complexity of the modulator and the demodulator is equally important because they are generally present in the apparatus. Optical record systems have “deletion-only” recording media, so consumer equipment should only contain a demodulator. Thus, in the latter case, it is particularly important to minimize the complexity of the demodulator, even at the expense of the complexity of the modulator.

Slika 5 prikazuje izvedbo demodulatorja, ki demodulira bloke 8 bitov podatkov iz blokov 14 informacijskih bitov. Slika 5a prikazuje blok-shemo demodulatorja in slika 5h prikazuje shematsko del vezja. Demodulator obsega Ili-vrata 17-0 do vključno 17-51, od katerih imajo vsaka enega ali več vhodov. Eden od 14 hitov v blokih informacijskih bitov je doveden na vsak vhod, ki so invertirajočega ali neinvertirajočega tipa Slika 5b prikazuje v stolpcu Ck , kako se to izvaja. Stolpec 1 prikazuje položaj najmanj -pomembnega bita 14-bitnega : :- --- -:,- 25' informacijskega bloka, stolpec 44 položaj najpomembnejšega bita G in vmesne kolone.2 do vključno 45 predstavljajo preostale položaje bitov, pomembne v skladu s položajem bita. Vrste 0 do vključno 54 se nanašajo na število IN-vrat, to pomeni, da se npr. vrsta 0 nanaša na vbodni format IN-vrat 47-0, vrsta 4 se nanaša na vhodni format IN-vrat 47-4, itd. Simbol 4 v i-tem stolpcu vrste j označuje, da so j-ta IN-vrata 47 napajana preko neinvertirajočega vhoda z vsebino i-tega položaja bitov B^. Simbol 0 v i-tem stolpcu vrste j označuje, da so j-ta IN-vrata 47 napajana preko invertirajočega vhoda z vsebino i-tega položaja bitov (CL). Zaradi tega je (vrsta 0), invertirajoč vhod IN-vrat 47-0 priključen na i-ti položaj bita (C^) in je neinvertirajoč vhod priključen na četrti položaj hita (θ_α); da je (vrsta 4) neinvertirajoč vhod IN-vrat 47-0 priključen na tretji položaj hita (C^) itd.Figure 5 shows an implementation of a demodulator that demodulates blocks 8 of data bits from blocks 14 of information bits. Figure 5a shows a block diagram of a demodulator and Figure 5h shows a schematic portion of a circuit. The demodulator comprises Ili-gates 17-0 to 17-51 inclusive, each with one or more inputs. One of the 14 hits in the blocks of information bits is fed to each input, which are inverted or non-inverted. Figure 5b shows in column Ck how this is performed. Column 1 shows the position of the least significant bit 14-bit:: - --- -:, - 25 'of the information block, column 44 the position of the most important bit G and the intermediate column.2 up to and including 45 represent the remaining positions of the bits relevant in accordance with the position bits. Types 0 to 54 include the number of IN-ports, i.e., e.g. type 0 refers to the IN format of the IN-port 47-0 format, type 4 refers to the IN-port format of the input 47-4, etc. The symbol 4 in the i-th column of type j indicates that the j-th IN port 47 is powered via a non-inverting input with the contents of the i-th position of bits B ^. A symbol 0 in the jth row of type j indicates that the jth IN port 47 is powered via an inverting input with the contents of the ith bit position (CL). Because of this (type 0), the inverting input of the IN port 47-0 is connected to the ith position of the bit (C ^) and the non-inverting input is connected to the fourth hit position (θ _α ); that (type 4) the non-inverting input of the IN-port 47-0 is connected to the third hit position (C ^), etc.

Demodulator nadalje obsega 8 ALI-vrat 48-4 do vključno 48-8, katerih vhodi so priključeni na izhode IN-vrat 47-0 do vključno 47-51. Slika 5h prikazuje v stolpcu A^, kako je to uresničeno. Stolpec A^ se nanaša na IN-vrata 48-1, stolpec A^ se nanaša na IN-vrata 48-2, ... in stolpec Ag se nanaša na IN-vrata 48.8. kasnejši A v i-tem stolpcu j-te vrste označuje, da je izhod IN-vrat 47-j priključen na vhod ALI-vrat 48-iThe demodulator further comprises 8 OR ports 48-4 to 48-8 inclusive, whose inputs are connected to the outputs of IN ports 47-0 to 47-51 inclusive. Figure 5h shows in column A ^ how this is realized. Column A ^ refers to IN-port 48-1, column A ^ refers to IN-port 48-2, ... and column Ag refers to IN-port 48.8. a later A in the i-th column of the j-th type indicates that the output of the IN-port 47-j is connected to the input OR the gate 48-i

Za IN-vrati 47-50 in 47-54 je vezje spremenjeno na naslednji način. Invertirajoč vhod obeh IN-vrat 47-50 in 17-51 je vsak priključen na vhod nadaljnjih IN-vrat 49» Izhod ALI-vezja 48--4 je priključen na nadaljnji vhod IN-vrat 49.For IN ports 47-50 and 47-54, the circuit is modified as follows. The inverting input of both IN ports 47-50 and 17-51 are each connected to the input of the further IN ports 49 »The output of the ALI circuit 48--4 is connected to the further input of the IN ports 49.

• - - _ 2ύ Vsak izhod ALI-vrat 18-1, 18-2, 18-3 in 18-5 do vključno 18-8 in izhod INr-vrat 19 so priključeni na izhod 20-i. Dekodiran blok 8 bitov podatkov je zaradi tega na razpolago na tem izhodu v paralelni obliki.• - - _ 2ύ Each ALI output port 18-1, 18-2, 18-3 and 18-5 up to and including 18-8 and output INr port 19 are connected to output 20-i. The decoded block of 8 bits of data is therefore available at this output in parallel form.

Demodulator, ki je prikazan v sliki 5a, je lahko alternativno v obliki t.zv. PPLA (logično zaporedje, ki se lahko programira v polju), npr. Signetics bipolarni PPLA tipa 82S100/82S101. Tabela, prikazana v sl. 5, je tabela za to zaporedje, ki se lahko programira.The demodulator shown in Fig. 5a may alternatively be in the form of a so-called PPLA (Field Programmable Logic Sequence) e.g. Signetics bipolar PPLA type 82S100 / 82S101. The table shown in FIG. 5, is a table for this programmable sequence.

Demodulator, prikazan v sliki 5, je zaradi svoje preprostosti eminentno primeren za optične zapisne sisteme tipa samo čitanje.The demodulator shown in Figure 5, for its simplicity, is eminently suitable for read-only optical record systems.

Blok sinhronizacijskih bitov se lahko detektira s sredstvi, prikazanimi v sliki 6. Oddan ali čitan zapisan signal se dovaja na vhodni priključek 21. Signal je formata MRZ-M(arka). Ta signal je doveden neposredno na prvi vhod ALI-vrat 22 In na drugi vhod ALI-vrat 23 preko zakasnilnega elementa 23. T.zv. NRZ-I signal se lahko dobi potem na izhodu ALI-vrat 22, ki so priključeni na vhod pomičnega registra 24, Pomični register obsega vrsto odsekov, od katerih ima vsak odcep, katerih število je enako številu bitov, vsebovanih v bloku sinhronizacij skih bitov. V prej uporabljenem primeru mora imeti pomični register 23 odsekov, namreč z namenom da bi bil v stanju, da vsebuje zaporedje 10000000000100000000 001. Vsak odcep je priključen na vhod IN-vrat 25, pri čemerThe block of synchronization bits can be detected by the means shown in Figure 6. The transmitted or read recorded signal is fed to the input terminal 21. The signal is of the MRZ-M format (sheet). This signal is fed directly to the first input of the OR gate 22 and to the second input of the ALI gate 23 via the delay element 23. The NRZ-I signal can then be obtained at the output of the OR gate 22 connected to the input of the shift register 24, the shift register comprises a series of sections each having a number equal to the number of bits contained in the synchronization bit block. In the previously used case, the movable register must have 23 sections, namely, in order to be able to contain the sequence 10000000000100000000 001. Each branch is connected to the input of IN-port 25, wherein

V je ta vhod ali invertirajoč ali neinvertirajoč vhod. Ce je na vhodih IN-vrat 25 prisotno sinhronizacijsko zaporedje, boV is this input or inverting or non-inverting input. If a synchronization sequence is present at the inputs of IN-port 25, it will

- 27 -potem na izhodu 26 teh IN-vrat proizveden signal, ki se lahko uporabi kot indikacijski signal za detekcijo sinhronižacijskega vzorca. S pomočjo tega signala se tok bitov deli v dva bloka (η^+η₂)-bitov. Ti bloki bitov kanalov so prestavljeni drug za drugim v nadaljnji premični register. Najpomembnejši n^ biti so čitani vzporedno in dovedeni na vhode IN-vrat 17, kot je prikazano v sliki 5a* Najmanj pomembni n₂ biti so za demodulacijo nepomembni.- 27 - then, at the output of 26 of these IN ports, a signal is produced that can be used as an indication signal to detect the synchronization pattern. Using this signal, the bit stream is divided into two blocks (η ^ + η ₂ ) -bits. These channel bit blocks are moved one after the other to a further moving register. The most important n ^ bits are read in parallel and brought to the inputs of the IN-port 17, as shown in Fig. 5a * The least significant n ₂ bits are irrelevant for demodulation.

Kodiran signal je npr. posnet na optični zapisni medij. Signal ima obliko, označeno v sliki 1b z WF. Signal je doveden na zapisni medij v vijačni strukturi informacije. Struktura informacije obsega zaporedje števila superblokov, npr. tipa, prikazanega v sliki 7. Superblok Sik obsega blok sinhronizacijskih bitov SUL , pri čemer je ta blok izveden, kot je prikazano v sliki 4, in več blokov bitov kanalov (v tej izvedbi 33), od katerih ima vsak (n^+n₂) bitov BC^, BC₂, ... BC^. Βϋ kanala tipa 1 je predstavljen s pre hodom v zapisni medij, npr. prehodom iz nevdrtine v vdrtino; bit kanala tipa O je predstavljen za zapisnem mediju z odsotnostjo prehoda. Vijačna informacijska steza je razdeljena v osnovne celice, celice bitov. Na zapisnem mediju tvorijo te celice bitov prostorsko strukturo, ki ustreza razdelitvi v čas (periodni čas enega bita) toka bitov kanalov.The encoded signal is e.g. recorded on optical recording media. The signal has the form indicated in Figure 1b by WF. The signal is fed to the recording medium in the helical structure of the information. The information structure comprises a sequence of numbers of superblocks, e.g. of the type shown in Figure 7. A Sik superblock comprises a block of SUL synchronization bits, this block being executed as shown in Figure 4, and several channel bit blocks (in this embodiment 33), each of which has (n ^ + n ₂ ) bits BC ^, BC ₂ , ... BC ^. Tipa type 1 channel is represented by the transition to the recording medium, e.g. the transition from the bore into the bore; an O channel bit is represented for the recording medium with no transition. The helical information path is divided into base cells, bits cells. On the recording medium, these bit cells form a spatial structure corresponding to the division into a time (period of one bit) of the channel bit stream.

Neodvisno od vsebine informacijskih in ločevalnih bitov se lahko na zapisnem mediju razloči vrsta podrobnosti. Za medij podaja k-prisila, da je maksimalna razdalja med dvema sosednjima prehodoma k+1 celic bitov. Najdaljša vdrtina (ali nevdrtina) ima zato dolžino (k+1) celic bitov, d-prisila podaja, da je minimalna razdalja med dvema sosednjima prehodoma d+1. Najkrajša vdrtina (ali nevdrtina) ima zato dolžino (d+1) celic bitov. Pri pravilnih razdaljah sledi nadalje (ali je pred njim) vdrtini z maksimalno dolžino nevdrtina z maksimalno dolžino. Ta struktura je del bloka sinhronizacijskib bitov.Independent of the content of the information and separation bits, a variety of details can be distinguished on the recording medium. For media, it gives the k-compulsion that the maximum distance between two adjacent passages is k + 1 bit cells. The longest hole (or non-hole) therefore has a length (k + 1) of bits cells, the d-forcing specifies that the minimum distance between two adjacent passes is d + 1. The shortest hole (or hole) therefore has a length (d + 1) of bits cells. At the correct distances, the maximum length of the hole with the maximum length shall be followed (or preceded by). This structure is part of a block of synchronization bits.

V prednosti izvedbi k=10, d=2 in superblok Sik obsega 588 celic bitov kanalov. Super blok SIL obsega blok sinhronizacijskih bitov s 27 celicami bitov in 33 blokov s celicami bitov kanalov, od katerih ima vsak 17 (14+3) celic bitov kanalov.Advantageously, k = 10, d = 2 and superblock Sik comprise 588 cells of channel bits. The SIL super block comprises a block of synchronization bits with 27 bit cells and 33 blocks with channel bit cells, each of which has 17 (14 + 3) channel bit cells.

Modulator, prenosni kanal, npr. optični zapisni medij, in demodulator so lahko sirupa j del isistema, npr. sistema za pretvarjanje analogne informacije (glasba, govor) v digitalno ninformacijo, pri čemer se ta informacija zapiše na optični zapisni medij. Informacija, posneta na zapisni medij (ali njena kopija) ,se lahko reproducira s pomočjo razporeditve, ki je primerna za reprodukcijo tipa informacije, ki je bila zapisana na zapisni medij.Modulator, transmission channel, e.g. the optical recording medium, and the demodulator may be syrups j part of the system, e.g. a system for converting analogue information (music, speech) into digital information, recording this information on optical recording media. Information recorded on a recording medium (or a copy thereof) may be reproduced by means of an arrangement suitable for reproducing the type of information recorded on the recording medium.

Pretvorniško vezje podrobneje obsega analognodigitalni pretvornik za pretvarjanje analognega signala (glasbe, govora), ki bo zapisan v digitalni signal vnaprej določenega formata (kodiranje izvora). Dodatno lahko pretvorniško vezje obsega del sistema za korekcijo napake. V pret- 29 vorniškem vezju, se digitalni signal pretvori v format, s pomočjo katerega se lahko napake, ki se posebno pojavijo med čitanjem zapisnega medija, korigirajo v razporeditvi za reprodukcijo signalov. Sistem za korekcijo napake, ki je primeren v ta namen, je opisan v patentnih prijavah, ki so bile vložene od Sony Corporation na Japonskem pod številko 14539 dne 21. maja 1980 oz. 5. junija 1980.The converter circuit further comprises an analogodigital converter for converting an analog signal (music, speech) that will be written to a digital signal of a predetermined format (source coding). Additionally, the inverter circuit may comprise a portion of the error correction system. In a converter circuit, the digital signal is converted to a format whereby errors that occur especially when reading the recording medium can be corrected in the arrangement for reproducing the signals. An error correction system suitable for this purpose is described in patent applications filed by Sony Corporation in Japan under No. 14539 on May 21, 1980, respectively. June 5, 1980.

Digitalni, pred napako zaščiten signal se zatem dovede na modulator, ki je bil predhodno opisan (kodiranje kanala) za pretvorbo v digitalni signal, ki je prirejen na lastnosti kanala. Dodatno se dovaja sinhronizacijski vzorec in signal se dovede v primeren format okvira. Tako dobljen signal je uporabljen za proizvajanje krmilnega signala, npr. za laser (format HRZ-znamke),s pomočjo katerega se dovede na zapisni medij vijačna struktura informacije v obliki zaporedja vdrtin/hevdrtin <tapre j določene dolžine.The error-prone digital signal is then fed to a modulator previously described (channel coding) for conversion to a digital signal adapted to channel properties. A synchronization pattern is further fed and the signal is fed into the appropriate frame format. The signal thus obtained is used to produce a control signal, e.g. for laser (HRZ-mark format), by means of which a helical structure of information in the form of a sequence of holes / hevdrtin <tapre j of a certain length is brought to the recording medium.

Zapisni medij ali njegova kopija se lahko čitajo s pomočjo razporeditve za reprodukcijo informacijskega bita, izvedenega iz zapisnega medija. Glede na to obsega razporeditev modulator, ki je že bil opisan v podrobnostih, dekodirni del sistema za korekcijo napake in digitalen/analogni pretvornik za ponovno oblikovanje natančne kopije analognega signala, ki je doveden na pretvorniško vezje.The recording medium or a copy thereof may be read by means of an arrangement for reproducing the information bit derived from the recording medium. Accordingly, the arrangement comprises a modulator already described in detail, a decoding part of the error correction system and a digital / analog converter for reproducing an exact copy of the analog signal supplied to the converter circuit.

- Μ «ν'- Μ «ν '

Najboljši, prijavitelju znan način za gospodarsko izkoriščanje predmeta izumaThe best method known to the applicant for the economic exploitation of the object of the invention

Demodulator po izumu je izveden s pomočjo dvainpetdeset IN-vrat 17-0 do 17-51, osem ALI-vrat 18-1 do 18-8 in dodatnih IN-vrat 19- Zanje so lahko uporabljene ustrezne komercialne izvedbe različnih proizvajalcev. Način povezave je razviden iz priložene slike 5a, ki podaja blok shemo demodulatorja, medtem ko prikazuje sl. 5b tabelo, kako so ti bloki medseboj povezani. Tako prikazuje npr. prva (vodoravna) črta (črta 0) slike 5b, da naj bo C. za i = 4 priključen na IN-vrata 17-0 in C za i = 0 naj bo priključen (invertirano) na ista IN-vrata 17-0. Prav tako podaja, da naj bo izhod IN-vrat 17-0 priključen na ALI-vrata 18-3. Ustrezno so iz te tabele na sl. 5b razvidne tudi vse ostale oovezave posameznih vrat.The demodulator according to the invention is made by means of fifty-five IN ports 17-0 to 17-51, eight OR ports 18-1 to 18-8, and additional IN ports 19- Appropriate commercial embodiments of various manufacturers may be used. The connection mode can be seen in the accompanying Figure 5a, which provides a block diagram of the demodulator while showing FIG. 5b a table of how these blocks are interconnected. Thus showing e.g. the first (horizontal) line (line 0) of Figure 5b, that C. for i = 4 be connected to the IN port 17-0 and C for i = 0 to be connected (inverted) to the same IN port 17-0. It also states that the output of IN-port 17-0 should be connected to OR-port 18-3. Accordingly, from the table in FIG. 5b also shows all other door bindings.

Claims (2)

PATENTNI ZAHTEVKIPATENT APPLICATIONS 1. Demodulator za dekodiranje zaporedja bitov kanalov v zaporedje bitov podatkov, pri čemer je d-, k- omejeno zaporedje bitov kanalov vsebovano v zaprtem sestavu besed kanalov, kjer se bloki informacijskih bitov n_t bitov kanalov in bloki ločevalnih bitov n^ blokov kanalov zaporedoma menjavajo in kjer delujejo bloki ločevalnih bitov na zmanjševanju enosmerne neuravnovešenosti, nastale predhodno v zaporedju blokov, v zaporedju bitov podatkov, pri čemer ima naveden demodulator zaporedni vhod 21 za priključitev na naveden kanal, prvi pretvornik za pretvarjanje iz zaporedja v vzporednost, napajan z zaporednim vhodom 21, dekoder blokov 17-0 do 17-51; 18-1 do 18-8, napajan z navedenim prvim pretvornikom za pretvarjanje iz zaporednosti v vzporednost za sprejemanje bloka informacij od njega, in izhod uporabnika 20-1 do 20-8, napajan z navedenim dekoderjem bloka za predstavljanje bloka podatkov kot dekodiranega pripravi uporabnika, označen s tem, da obsega demodulator nadalje drug pretvornik (24) za pretvarjanje iz zaporednosti v vzporednost, napajan z zaporednim vhodom (21), detektor (25) sinhronizacijske besede, napajan z drugim pretvornikom (24) za pretvarjanje iz zaporednosti v vzporednost, ki ima širino vhoda vsaj 2k bitov za detektiranje d,- k- omejene sinhronizacijske besede, ki ne more biti vsebovana v zaporedju besed kanala v navedenem sestavu, nadalje generator cikla, ki ima aktivizacijski vhod, napajan z navedenim detektorjem (25) za sprejemanje detekcijskega signala, in ima izhod aktivizacijskega signala, voden do dekoderja blokov (17-0 do 1751; 18-1 do 18-8) za sinhronizem s sprejemom vrste zaporednih blokov kanalov z (nj + r^) biti, vsak, ki vodijo sekundarni aktivizacijski signal do dekoderja blokov (17-0 do 17-51; 18-1 do 18-8), pri čemer ima ta n_x vzporednih vhodov za detektiranje n₂ neprekinjenih bitov kanalov v navedenem bloku kanalov in ima m manjši kot n_t vzporednih izhodov, da bi na njem vzporedno predstavljal blok podatkov z m-biti.A demodulator for decoding a sequence of channel bits into a sequence of data bits, wherein a d-, k- restricted sequence of channel bits is contained in a closed channel word assembly, where information bits n _t channel bits and separator bits n ^ channel blocks are successively change and where the separator bits operate to reduce the one-way imbalance previously generated in the block sequence in the sequence of data bits, said demodulator having a serial input 21 for connecting to said channel, a first converter for converting from sequence to parallel fed by a serial input 21, block decoder 17-0 to 17-51; 18-1 to 18-8, powered by said first converter for converting from sequence to parallel to receive a block of information from it, and output from user 20-1 to 20-8, powered by said block decoder to represent the block of data as decoded user preparation characterized in that the demodulator further comprises a second inverter (24) for converting from sequence to parallel, powered by the serial input (21), a word-detector (25) powered by another inverter (24) for converting from sequence to parallel, having an input width of at least 2k bits for detecting d, a k-limited synchronization word that cannot be contained in the channel word sequence in said assembly, further a cycle generator having an activation input powered by said detector (25) to receive the detection signal, and having an activation signal output guided to the block decoder (17-0 to 1751; 18-1 to 18-8) for synchronization by receiving a series of successive channel blocks with (n j + r ^) be, each leading a secondary activation signal to the block decoder (17-0 to 17-51; 18-1 to 18-8), wherein this n _{x has} parallel inputs to detect n ₂ continuous channel bits in said channel block and m has less than n _t parallel outputs to represent a data block with m-bits on it in parallel . 2. Demodulator po zahtevku 1, označen s tem, da ima dekoder blokov (17-0 do 17-51; 18-1 do 18-8) prvo vrsto večkratnih IN-vrat (17-0 do 17-5), pri čemer so ta IN-vrata (17-0 do 17-5) napajana vzporedno z izhodi prvega pretvornika iz zaporednosti v vzporednost in da ima dekoder blokov (17-0 do 17-51; 18-1 do 18-8) drugo vrstoDemodulator according to claim 1, characterized in that the block decoder (17-0 to 17-51; 18-1 to 18-8) has a first row of multiple IN ports (17-0 to 17-5), wherein these IN ports (17-0 to 17-5) are powered in parallel with the outputs of the first converter from sequence to parallel and that the block decoder (17-0 to 17-51; 18-1 to 18-8) has a second type -30 večkratnih ALI-vrat (18-1 do 18-8), pri čemer so ta ALI-vrata (18-1 do 18-8) napajana vzporedno z izhodi IN- vrat (17-0 do 17-5) in da tvorijo večkratni izhodi z ALI-vrat (18-1 do 18-8) izhod uporabnika.-30 multiple ALI ports (18-1 to 18-8), these ALI ports (18-1 to 18-8) being powered parallel to the IN- gate outputs (17-0 to 17-5) and yes multiple outputs from the ALI gate (18-1 to 18-8) are the output of the user.