SG172495A1 - Spin torque and multi-level domain wall memory - Google Patents
Spin torque and multi-level domain wall memory Download PDFInfo
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- SG172495A1 SG172495A1 SG2009084724A SG2009084724A SG172495A1 SG 172495 A1 SG172495 A1 SG 172495A1 SG 2009084724 A SG2009084724 A SG 2009084724A SG 2009084724 A SG2009084724 A SG 2009084724A SG 172495 A1 SG172495 A1 SG 172495A1
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- 230000015654 memory Effects 0.000 title claims abstract description 80
- 230000005291 magnetic effect Effects 0.000 claims abstract description 71
- 238000000034 method Methods 0.000 claims abstract description 17
- 230000004888 barrier function Effects 0.000 claims abstract description 12
- 239000000463 material Substances 0.000 claims description 35
- 230000005415 magnetization Effects 0.000 claims description 17
- 230000005290 antiferromagnetic effect Effects 0.000 claims description 12
- 125000006850 spacer group Chemical group 0.000 claims description 12
- 229910003321 CoFe Inorganic materials 0.000 claims description 9
- 229910052796 boron Inorganic materials 0.000 claims description 7
- 229910018979 CoPt Inorganic materials 0.000 claims description 6
- 229910005335 FePt Inorganic materials 0.000 claims description 6
- 229910052726 zirconium Inorganic materials 0.000 claims description 5
- 229910019233 CoFeNi Inorganic materials 0.000 claims description 4
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 claims description 4
- 229910019041 PtMn Inorganic materials 0.000 claims description 3
- 229910052707 ruthenium Inorganic materials 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 229910045601 alloy Inorganic materials 0.000 claims 3
- 239000000956 alloy Substances 0.000 claims 3
- 238000002955 isolation Methods 0.000 claims 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims 2
- 229910052742 iron Inorganic materials 0.000 claims 2
- 229910052759 nickel Inorganic materials 0.000 claims 2
- 229910052763 palladium Inorganic materials 0.000 claims 2
- 229910052697 platinum Inorganic materials 0.000 claims 2
- 229910015136 FeMn Inorganic materials 0.000 claims 1
- -1 IrMn Inorganic materials 0.000 claims 1
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- 229910052804 chromium Inorganic materials 0.000 claims 1
- 229910052681 coesite Inorganic materials 0.000 claims 1
- 229910052593 corundum Inorganic materials 0.000 claims 1
- 229910052906 cristobalite Inorganic materials 0.000 claims 1
- 229910052703 rhodium Inorganic materials 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 229910052682 stishovite Inorganic materials 0.000 claims 1
- 229910052905 tridymite Inorganic materials 0.000 claims 1
- 229910001845 yogo sapphire Inorganic materials 0.000 claims 1
- 230000000694 effects Effects 0.000 description 14
- 230000008569 process Effects 0.000 description 9
- 230000005294 ferromagnetic effect Effects 0.000 description 5
- 239000002070 nanowire Substances 0.000 description 5
- 239000011810 insulating material Substances 0.000 description 4
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- 230000008901 benefit Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 2
- 239000000696 magnetic material Substances 0.000 description 2
- 230000002860 competitive effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
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- 238000004519 manufacturing process Methods 0.000 description 1
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- 230000010287 polarization Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
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Abstract
An MRAM device and a method of operating the MRAM device are provided. TheMRAM device includes a first magnetic hard layer, a tunnel barrier layer providedover the first magnetic hard layer, a magnetic memory layer provided over the tunnelbarrier layer, a second magnetic hard layer provided over the magnetic memorylayer, wherein the lateral size of the second magnetic hard layer is smaller than thelateral size of the magnetic memory layer.Figure 2
Description
Spin torque and multi-level domain wall memory
The present invention relates to a non-volatile magnetic memory device, particularly to magnetoresistive random access memory (MRAM) device.
Until now, hard disk drive (HDD) offers an advantage of storing data at low cost.
At the same time, other type of memories such as flash memory caught up and now representing a threat to HDD. Flash memory belongs to a category of non-volatile memories (NVM). It allows the data to be stored even when power is down.
The flash memory market is getting bigger and also the cost per gigabit (Gbit) is higher than that of HDD. HDD technology is moving towards patterned media where bits are made by lithography process. The cost per Gbit should not be increased by more than 10% or 20% in order to remain competitive. This is one of the major challenges facing HDD technology.
A current trend is to develop NVM beyond flash memory, which is cheaper and has a high performance. MRAM and PC-RAM represent good candidates for future
NVM. It is expected that MRAM could be used for 5 nm cell size. However this is not possible for flash memory.
For MRAM, reducing writing current is under intensive investigation and development. Even though the cell size can be made smaller, the high writing current requires a relatively large transistor and thus storage density cannot be improved. 10 nm width domain wall (DW) can be created depending on effective anisotropy
K, and exchange stiffness A of the magnetic material. The width of the DW can be expressed as: Wpw = 4 =. More recently, DW width of 3 nm has been achieved in some magnetic materials such SrRuQo,.
Recent studies discovered that DW can be moved by polarized current. This phenomenon called spin torque is similar to changing a magnetization direction in magnetoresistive devices. Basic principle is when a polarized current passes through a DW, its spin direction follows local orientation of magnetization and consequently changes from one direction to the other (up to down or down to up). Conservation of angular momentum in spin rotation is manifested by a transfer of torque to DW and if it is high enough, the DW may move from one direction to the other.
Major challenges of DW-based MRAM are controllability of the DW position and capability to predict its DW position for a given magnetic field, electrical current or both. A so-called “racetrack” scheme had been proposed which comprises a ferromagnetic nanowire (Figure 1). Data is recorded in a form of patterns of domains that can move along the ferromagnetic nanowire using a highly spin polarized current. However, almost half of the ferromagnetic nanowire has no domains allowing them to move in. Reading in this “racetrack scheme” is done once a sequence of domains moves accurately. The flux from DW only determines the data, However, there is a high chance that this sequence will be changed once the writing current is applied. In addition, fabrication of the racetrack-based ferromagnetic nanowire and the controllability of the DW formation and movement are major challenges of racetrack memory.
In this invention, we propose a new way of creating a DW in a specific position of the device by spin torque effect. A polarized current is injected into each MRAM cell via a magnetically hard layer for writing which has a lateral size smaller than a magnetically soft memory layer. Magnetic spins in the memory layer can be reversed, creating a DW. One advantage of having a small lateral size magnetically hard layer for writing is an increase in spin torque efficiency, leading to a low writing current. A change in DW position can be done by applying a sequence of writing current pulses with different pulse widths, different writing current magnitudes or both. Reading of data can be easily achieved through tunneling magnetoresistive effect between the memory layer and a magnetically hard layer for reading which has a same lateral size as the memory layer and is separated from each other by a thin insulator layer (tunnel barrier).
A device for multi-level domain wall memory comprising a smaller lateral sized hard layer for writing and a conductive spacer layer in contact with a memory layer.
The memory layer and a hard layer for reading are separated by a tunnel barrier. A domain wall in the memory layer is created by spin torque effect. High efficiency of the spin torque effect is achieved by having the conductive spacer layer separating the hard layer for writing and the memory layer. Formation of a domain wall and its movement along the memory layer depends on writing current and/or write pulse duration, magnetic properties of the memory layer and also geometry of the device such as aspect ratio. Such pulsed writing will help to achieve different extent of domain wall motion. Information is read based on a read current and its associated magnetoresistance (MR) values. Different positions of domain wall in the memory layer lead to different MR values, thus offering a multi-level recording device.
FIG. 1 is an illustration of “racetrack” scheme which comprises a ferromagnetic nanowire (prior art).
FIG. 2 is a magnetoresistive random access memory (MRAM) cell structure according to the invention.
FIG. 3 is a magnetoresistive random access memory (MRAM) cell structure with in-plane anisotropy according to the invention.
FIG. 4 is a magnetoresistive random access memory (MRAM) cell structure with magnetically hard layer for writing and magnetically hard layer for reading comprising synthetic anti-ferromagnetic structure according to the invention.
FIG. 5 is a magnetoresistive random access memory (MRAM) cell structure with at least one magnetically hard layer for writing or magnetically hard layer for reading exchange-coupled to an anti-ferromagnetic layer according to the invention.
FIG. 6 is an illustration of a reversal in magnetization direction and creation of domain wall in a memory layer according to the invention.
FIG. 7 is an illustration of domain wall movement from a lower resistance state to a higher resistance state according to the invention.
FIG. 8 is an illustration of a multi-pulse writing current to move DW from a lower resistance state to a higher resistance state according to the invention.
FIG. 9 is an illustration of a multi-pulse writing current to move DW from state 0 to higher resistance states using different current amplitudes according to the invention.
FIG. 10 is an illustration of a writing process from a higher resistance state to a lower resistance state according to the invention.
FIG. 11 is a diagram of a MRAM cell with a first and a second electrode, illustrating a reading process.
FIG. 12 is an illustration of resistance level at different states in a MRAM cell according to the invention.
FIG. 13 is an illustration of perpendicular anisotropy in a magnetically hard layer for writing and in-plane anisotropy in a magnetically hard layer for reading and memory layer of a MRAM cell structure according to the invention.
FIG. 14 is a magnetoresistive random access memory (MRAM) cell structure with conductive contact adjacent to insulating material according to the invention.
Table 1 is a table of data written in a MRAM cell corresponding to a state number and resistance level according to the invention.
Embodiments of a magnetoresistive random access memory (MRAM) device comprising cell structure which utilizes spin torque effect to write domains in a memory layer are disclosed. Formation of a domain wall (DW) and its movement along the memory layer depend on writing current and/or write pulse duration, magnetic properties of the memory layer and also geometry of the device such as aspect ratio. Using pulsed writing will help to achieve different extent of the DW motion. Stored information is read based on a read current and its associated MR values.
Figure 2 shows one embodiment of a MRAM cell structure. A magnetically hard layer for writing has a lateral dimension smaller than a magnetically soft memory layer to achieve higher writing current density. The magnetically hard layer for writing is separated from the memory layer by a non-magnetic conductive spacer layer. Area adjacent to the magnetically hard layer for writing and non-magnetic conductive spacer layer is filled with an insulating material. Underneath the non-magnetic conductive spacer layer is a magnetic tunneling junction (MTJ) device, where the magnetically soft memory layer is separated from a magnetically hard layer for reading by a tunnel barrier.
Materials for the non-magnetic conductive spacer layer can be Cu, Ag or Au.
Materials for the magnetically soft memory layer with perpendicular anisotropy can be L1o-CoPt, Lio-FePt, CoFePt, (Co/Pt) mutlilayers, (Co/Pd) multilayers, (Co/Ni) multilayers. The magnetically soft memory layer can be also made of a lamination of more than one layer from the materials cited above. The magnetically soft memory layer is sandwiched between the magnetically hard layer for writing and the magnetically hard layer for reading. The magnetically hard layer for writing and the magnetically hard layer for reading can be made from similar materials like the magnetically soft memory layer. Because materials with perpendicular anisotropy have smaller spin polarization compared to the in-plane anisotropy materials, it is preferred that a thin layer such as Co, CoFe, CoFeX, {where X is B or Zr) is used in contact to the tunnel barrier separating the magnetically soft memory [ayer and the magnetically hard layer for reading. Percentage atomic concentration of X can be up to 25%.
The insulating material next to the magnetically hard layer for writing can be made from insulating oxides such as SiO», Al,O3 or nitride like SizNa.
The tunnel barrier materials can be MgO, which provide a high read signal and other oxide materials such as Al;O3.
Thickness of the magnetic layers can vary from 3 nm to 20 nm. Thickness of tunnel barrier can vary from 0.5 nm to 2 nm.
In another embodiment, the magnetically hard layer for writing, the magnetically soft memory layer, and the magnetically hard layer for reading are made of materials with in-plane anisotropy (Figure 3). Materials for the magnetically soft memory layer with in-plane anisotropy can be CoFe, NiFe, CoFeNi, CoFeX, CoFeNiX (where X is B or Zr). Percentage atomic concentration of X can be up to 25%. The memory layer can be also made of a lamination of more than one layer from the materials cited above. The magnetically hard layer for writing and the magnetically hard layer for reading can be made from similar materials like the magnetically soft memory layer or magnetically hard materials like CoPt and FePt with in-plane anisotropy. These magnetically hard materials (CoPt or FePt) can be used with lamination to CoFe,
NiFe, CoFeNi, CoFeX, CoFeNiX (where X is B, Zr). Similarly, the percentage atomic concentration of X can be up to 25%.
In another embodiment, at least one of the magnetically hard layer with in-plane anisotropy for writing and magnetically hard layer with in-plane anisotropy for reading is made of synthetic anti-ferromagnetic structure where two magnetic layers from the materials cited earlier are separated by a thin ruthenium layer. The ruthenium thickness is below 1 nm (Figure 4). One advantage of the synthetic anti- ferromagnetic (SAF) structure is a reduction of magnetostatic field from the magnetic layer in the SAF structure closer to the magnetically soft memory layer. This is because magnetizations of the two sub-hard layers in the SAF structure are in opposite directions.
In yet another embodiment, at least one of the magnetically hard layer with in- plane anisotropy for writing and magnetically hard layer with in-plane anisotropy for reading can be exchange-coupled to an anti-ferromagnetic layer to fix the respective magnetization direction. The anti-ferromagnetic layer provides an exchange bias field which fix magnetization of an adjacent magnetic layer (Fig. 5). By this way, the layer for writing and the layer for reading need not be magnetically hard as their magnetizations can be fixed by the anti-ferromagnetic layer. The anti-ferromagnetic layer is made of IrMn, PtMn or any IrMn or PtMn based materials. Thickness of the anti-ferromagnetic layer can vary from 5 nm to 15 nm.
To increase efficiency of writing current (spin torque effect), the magnetically hard layer for writing is much smaller than the magnetically soft memory layer so that high current density can be generated (spin torque is proportional to current density).
Furthermore, the non-magnetic conductive spacer layer separating the magnetically hard layer for writing and magnetically soft memory layer enhances the spin torque effect because these three layers are considered a giant magnetoresistive (GMR) part and provide better spin torque efficiency as compared to tunnel magnetoresistive (TMR) part. During a readout process, existence of a low resistance Cu spacer layer does not add much to the overall device resistance. The resistance level read out 40 originates mainly from the TMR part (Fig. 2).
When the writing current is passed applied to the magnetically hard layer for writing, the spin torque effect generated will initiate a reversal of magnetization direction in the magnetically soft memory layer underneath the magnetically hard layer for writing (Figure 6a). When the writing current is cut off, a DW will be created in the magnetically soft memory layer (Figure 6b). For better controllability of DW movement, the writing current is applied from one side of the MRAM cell structure.
Due to spin torque in the magnetically hard layer for writing, magnetization in the magnetically soft memory layer in contact with the non-magnetic conductive spacer layer will be subjected to high spin torque effect, leading to magnetization direction reversal and creation of DW. It is important to note that DW can be shifted to the left or the right depending on parameters, such writing pulse width, writing current strength, writing current direction etc. After the writing current is turned off, a new state is recorded. A large number of states can be obtained by adjusting the parameters stated above: materials, writing current pulse and magnitude, device geometry, magnetic field generated by the electrode for exampie.
To write a next state, another writing current can be applied which will be polarized through the magnetically hard layer for writing and then through the left part of the magnetically soft memory layer as can be seen in Figure 7. A majority of electrons with spin direction similar to the switched part of the magnetically soft memory layer (circled) are also shown in Figure 7.
Writing processes of the MRAM cell is disclosed. To have a good control of the
DW position, it is important to apply a writing current with a correct pulse width and magnitude. In addition, magnetic field generated from electrical current during writing process is important to assist the movement of the DW. This way, less power consumption is needed.
There are a few possibilities to move DW from one state to another state: a. Multi-pulse writing current. b. Large single pulse current. c. Large current magnitude. d. Combination of b and c.
Examplary examples of case a are discussed below
The lateral size of the magnetically soft memory layer was fixed at 150 nm by 30 nm, representing an areal density of 480 Gb/in? for 8 levels of storing information.
The magnetically hard layer for writing was 30 nm by 30 nm. Both the magnetically hard layer for writing and magnetically soft memory layer possess perpendicular anisotropy.
Example 1
Starting from an erased state (state 0), a 2-pulse writing current with two amplitudes of same width (2 ns) is applied. The first pulse has larger amplitude than the second pulse and this creates DW by partially reversing magnetization in the magnetically soft memory layer. Once the DW is created, a second pulse with a delay at is applied to move the DW (Figure 8). The amplitude of the second pulse is chosen to move DW towards a desired position. The delay at can vary from 0 to 2 ns and the amplitude of the second pulse can vary from 0 to a few mA and is usually lower than the amplitude of the first pulse. This way, the amplitude of the second pulse controls the position of the DW. In this example, we applied two pulses having the same width. It is also possible to change the pulse width as an additional parameter. In addition, it is also possible to use more than 2 writing current pulses to reach each state by using smaller current amplitudes.
Example 2
As shown in Figure 9, we started from an erased state where magnetization is in up direction (state 0). After applying a 6 mA single-pulse writing current, magnetization direction in the magnetically soft layer is reversed (white region) and
DW is created (state 1). From state 1, we apply a second writing current pulse with different amplitude. When a 1 mA second pulse writing current is applied, the DW moves almost to the middle of the magnetically soft memory layer and state 2 is created. If a 2.2 mA second writing current pulse is applied, the DW moves further to the right side of the magnetically soft memory layer and state 3 is created. Finally when a 5 mA second writing current pulse is applied, the magnetic direction in the entire magnetically soft memory layer reverses to down direction (state 4).
Example 3
To move DW from a higher state to a lower state, large current amplitude is first applied to erase previous information in the magnetically soft memory layer. After this, writing processes as presented in Examples 1 and 2 are applied to write the desired information in the magnetically soft memory layer (Figure 10). However, other possible ways include reversing writing current direction as spin torque effect has a particutarity to move DW from one side to the other just by reversing the writing current direction. An appropriate writing current magnitude and pulse width should be used to change from one state to the other.
In case b, depending on materials properties and electrical current magnitude, if the pulse current is short, DW may not be created. Thus, having larger pulse width can help DW to be created.
Case c is related to spin torque efficiency. There is a minimum writing current needed to create a DW within the magnetically soft memory layer.
A reading process of the MRAM cell is disclosed. Reading is carried out by measuring resistance level of the MRAM. A read current lower than the writing current is used, and reading is not carried out domain by domain but by reading the state of the memory layer. This depends on a resistance value of the state to be read (Figure 11). Resistance difference between different states can be measured in a same way using tunneling magnetoresistance effect and not GMR effect. In another exemplary example, it is possible to have 8 states just by moving DW from one side to the other as shown in Table 1 and Figure 12. The readout is possible using TMR effect. From the direction of magnetization in the magnetically soft memory layer, the resistance measured by tunneling magnetoresistance (TMR) effect can be different.
By this way, depending on the value of resistance level, different states in each
MRAM cell can be determined.
One embodiment of the present invention includes perpendicular anisotropy hard layer for writing the information. The magnetizations in the magnetically soft memory layer and magnetically hard layer for reading in MTJ part can be in-plane (Figure 13).
In another embodiment of the present invention, a conductive electrode (conductive contact) is placed adjacent to the insulating material as shown in Figure 14. This will allow the current to flow more efficiently during the writing process for creating and moving the DW. This can be applied for MRAM cell structures of in- place and perpendicular anisotropy.
Claims (29)
1. An MRAM device, comprising: - a first magnetic hard layer, - a tunnel barrier layer provided over the first magnetic hard layer, - a magnetic memory layer provided over the tunnel barrier layer, - a second magnetic hard layer provided over the magnetic memory layer, - wherein the lateral size of the second magnetic hard layer is smaller than the lateral size of the magnetic memory layer.
2. The MRAM device according to claim 1, wherein a ratio between the lateral size of the second magnetic hard layer and the lateral size of the magnetic memory layer ranges between 1/4 and 1/16.
3. The MRAM device according to any one of the claims 1 or 2, wherein an isolation layer is provided over magnetic memory layer, wherein the isolation layer is disposed adjacent to the second magnetic hard layer, thereby covering at least some of the surface of the magnetic memory layer not being covered by the second magnetic hard layer.
4, The MRAM device according to any one of the claims 1 to 3, wherein a non-magnetic conductive spacer layer is provided between the second magnetic hard layer and the magnetic memory layer.
5. The MRAM device according to any one of the claims 1 to 4, wherein the second magnetic hard layer is split into a first sublayer and a second sublayer, wherein the magnetization of the first sublayer is opposite to the magnetization of the first sublayer, and wherein a non-magnetic conductive layer is provided between the first sublayer and the second sublayer.
6. The MRAM device according to any one of the claims 1 to 5, wherein an antiferromagnetic layer is provided over the second magnetic hard layer.
7. The MRAM device according to any one of the claims 1 to 6, wherein the thicknesses of the first magnetic hard layer, the magnetic memory layer, and the second magnetic hard layer respectively ranges between 3nm and 20nm.
8. The MRAM device according to any one of the claims 1 to 7, wherein the thickness of the tunnel barrier layer ranges between 0.5nm and 4nm.
9. The MRAM device according to any one of the claims 4 to 8, wherein the thickness of the non-magnetic conductive spacer layer between the magnetic memory layer and the second magnetic hard layer ranges between 1nm and 4nm.
10. The MRAM device according to any one of the claims 5 to 9, wherein the thickness of the non-magnetic conductive layer provided between the first sublayer and the second sublayer of the second magnetic hard layer ranges between 0.3nm and 1nm.
11. The MRAM device according to any one of the claims 6 to 10, wherein the thickness of the antiferromagnetic layer ranges between 5nm to 15nm.
12. The MRAM device according to any one of the claims 1 to 11, wherein the material of the tunnel barrier layer comprises at least one material of the group consisting of MgO and AI203.
13. The MRAM device according to any one of the claims 1 to 12, wherein the magnetic memory layer has a perpendicular anisotropy.
14. The MRAM device according to claim 13, wherein the material of the magnetic memory layer comprises at least one material of the group consisting of CoPt, FePt, CoFePt with hcp or L10 structures, (Co/Pt)
mulitiayers, (Co/Pd) multilayers, (CoFe/Pt) multilayers, (CoFe/Pd) multilayers and (Co/Ni) multilayers, and an alloy or multilayer comprising Fe,Co,Ni, Pt, Pd, B.
15. The MRAM device according to claim 14, wherein the material of the first magnetic hard layer and the second magnetic hard layer comprises at least one material of the group consisting of CoPt, FePt, CoFePt with hcp or L10 structures, (Co/Pt) mulitlayers, (Co/Pd) multilayers, (CoFe/Pt) multilayers, (CoFe/Pd) multilayers and (Co/Ni) multilayers, and an alloy or multilayer comprising Fe,Co,Ni, Pt, Pd, B.
16. The MRAM device according to any one of the claims 1 to 12, wherein the magnetic memory layer has an in-plane anisotropy.
17. The MRAM device according to claim 16, wherein the material of the magnetic memory layer comprises at least one material of the group consisting of CoFe, NiFe, CoFeNi, CoFeX, CoFeNiX, where X is B or Zr.
18. The MRAM device according to claim 17, wherein the material of the first magnetic hard layer and the second magnetic hard layer comprises at least one material of the group consisting of CoPt and FePt, CoFe, NiFe, CoFeNi, CoFeX, CoFeNiX, X being B or Zr.
19. The MRAM device according to any one of the claims 3 to 18, wherein the material of the isolation layer comprises at least one material of the group consisting of SiO2, Al203 and Si3N4.
20. The MRAM device according to any one of the claims 4 to 19, wherein the material of the non-magnetic conductive spacer layer between the magnetic memory layer and the second magnetic hard layer comprises at least one material of the group consisting of Cu, Ag or Au.
21. The MRAM device according to any one of the claims 5 to 20,
wherein the material of the non-magnetic conductive layer provided between the first sublayer and the second sublayer layer of the second magnetic hard layer is Cr, Ru, Rh or an alloy thereof.
22. The MRAM device according to any one of the claims 6 to 21, wherein the material of the antiferromagnetic layer comprises at least one of the group consisting of FeMn, IrMn, PtMn or any material based thereon.
23. A method of operating an MRAM device according to any one of the claims 1 to 22, comprising routing at least one writing current pulse through a stack of layers of the MRAM device comprising the second magnetic hard layer, the magnetic memory layer, the tunnel barrier layer and the first magnetic hard layer, wherein the number, amplitudes, and durations of the least one writing current pulse are chosen such that a domain wall is created within the magnetic memory layer at a predetermined lateral position, wherein the predetermined lateral position of the domain wall corresponds to a particular memory state.
24. The method according to claim 23, wherein an initial current pulse and at least one further current pulse are applied, wherein the initial current pulse serves to generate a domain wall within the magnetic memory layer, and wherein the at least one further current pulse serves to shift the domain wall to a predetermined lateral position reflecting the predetermined memory state.
25. The method according to claim 24, wherein the amplitude of the initial current pulse is larger than the amplitude of the further current pulses following the initial current pulse.
26. The method according to claim 24 or 25, wherein a delay between the initial current pulse and the at least one further current pulse or between two of the at least one further current pulses ranges between 0 ns and 2 ns.
27. The method according to any one of the claims 24 to 26, wherein the amplitude of the initial current pulse ranges between 10 pA and 10 mA.
28. The method according to any one of the claims 24 to 27, wherein the amplitude of each of the further current pulses ranges between 10 pA and 5 mA.
29. The method according to any one of the claims 23 to 28, wherein the routing direction of the writing current is reversed in order to shift the domain wall from a first lateral position to a second lateral position.
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| SG2009084724A SG172495A1 (en) | 2009-12-18 | 2009-12-18 | Spin torque and multi-level domain wall memory |
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| SG2009084724A SG172495A1 (en) | 2009-12-18 | 2009-12-18 | Spin torque and multi-level domain wall memory |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10741749B2 (en) | 2017-08-21 | 2020-08-11 | National University Of Singapore | Spin orbit torque-based spintronic devices using L10-ordered alloys |
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2009
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10741749B2 (en) | 2017-08-21 | 2020-08-11 | National University Of Singapore | Spin orbit torque-based spintronic devices using L10-ordered alloys |
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