SG10202003750QA - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- SG10202003750QA SG10202003750QA SG10202003750QA SG10202003750QA SG10202003750QA SG 10202003750Q A SG10202003750Q A SG 10202003750QA SG 10202003750Q A SG10202003750Q A SG 10202003750QA SG 10202003750Q A SG10202003750Q A SG 10202003750QA SG 10202003750Q A SG10202003750Q A SG 10202003750QA
- Authority
- SG
- Singapore
- Prior art keywords
- semiconductor device
- semiconductor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7843—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7846—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the lateral device isolation region, e.g. STI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020190092534A KR20210014444A (en) | 2019-07-30 | 2019-07-30 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10202003750QA true SG10202003750QA (en) | 2021-02-25 |
Family
ID=74174823
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10202003750QA SG10202003750QA (en) | 2019-07-30 | 2020-04-24 | Semiconductor device |
Country Status (5)
Country | Link |
---|---|
US (2) | US11450681B2 (en) |
KR (1) | KR20210014444A (en) |
CN (1) | CN112310094A (en) |
DE (1) | DE102020107651A1 (en) |
SG (1) | SG10202003750QA (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210014444A (en) | 2019-07-30 | 2021-02-09 | 삼성전자주식회사 | Semiconductor device |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5300419B2 (en) | 2008-11-05 | 2013-09-25 | 株式会社東芝 | Nonvolatile semiconductor memory device and manufacturing method thereof |
KR101495806B1 (en) * | 2008-12-24 | 2015-02-26 | 삼성전자주식회사 | Non-volatile memory device |
JP5341529B2 (en) | 2009-01-09 | 2013-11-13 | 株式会社東芝 | Method for manufacturing nonvolatile semiconductor memory device |
KR101562969B1 (en) * | 2009-03-03 | 2015-10-26 | 삼성전자주식회사 | Semiconductor Device |
KR20120003351A (en) * | 2010-07-02 | 2012-01-10 | 삼성전자주식회사 | Three dimensional non-volatile memory device and operating method thereof |
KR101825539B1 (en) * | 2010-10-05 | 2018-03-22 | 삼성전자주식회사 | Three Dimensional Semiconductor Memory Device And Method Of Fabricating The Same |
US8847302B2 (en) | 2012-04-10 | 2014-09-30 | Sandisk Technologies Inc. | Vertical NAND device with low capacitance and silicided word lines |
KR20140018541A (en) * | 2012-08-02 | 2014-02-13 | 에스케이하이닉스 주식회사 | Nonvolatile memory device and method for fabricating the same |
KR102044823B1 (en) * | 2013-02-25 | 2019-11-15 | 삼성전자주식회사 | Vertical memory devices and methods of manufacturing the same |
US9230987B2 (en) | 2014-02-20 | 2016-01-05 | Sandisk Technologies Inc. | Multilevel memory stack structure and methods of manufacturing the same |
US9698153B2 (en) * | 2013-03-12 | 2017-07-04 | Sandisk Technologies Llc | Vertical NAND and method of making thereof using sequential stack etching and self-aligned landing pad |
KR102081195B1 (en) * | 2013-08-28 | 2020-02-25 | 삼성전자주식회사 | Semiconductor Memory Device And Method Of Fabricating The Same |
KR102139944B1 (en) * | 2013-11-26 | 2020-08-03 | 삼성전자주식회사 | Three dimensional semiconductor device |
KR20150064520A (en) * | 2013-12-03 | 2015-06-11 | 에스케이하이닉스 주식회사 | Semiconductor device and method of manufacturing the same |
US9159426B1 (en) | 2014-05-07 | 2015-10-13 | Sandisk Technologies Inc. | Three dimensional memory device having stacked conductive channels |
KR20160004069A (en) * | 2014-07-02 | 2016-01-12 | 에스케이하이닉스 주식회사 | Semiconductor device and manufacturing method thereof |
KR20160018921A (en) * | 2014-08-07 | 2016-02-18 | 삼성전자주식회사 | Semiconductor Memory Device And Method of Fabricating The Same |
US10181476B2 (en) * | 2015-03-31 | 2019-01-15 | Samsung Electronics Co., Ltd. | Semiconductor memory devices and methods for manufacturing the same |
US9853043B2 (en) | 2015-08-25 | 2017-12-26 | Sandisk Technologies Llc | Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material |
US9570463B1 (en) * | 2015-10-15 | 2017-02-14 | Sandisk Technologies Llc | Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same |
US9818759B2 (en) | 2015-12-22 | 2017-11-14 | Sandisk Technologies Llc | Through-memory-level via structures for a three-dimensional memory device |
US9991280B2 (en) | 2016-02-17 | 2018-06-05 | Sandisk Technologies Llc | Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same |
KR20170134039A (en) | 2016-05-27 | 2017-12-06 | 삼성전자주식회사 | Vertical memory devices |
US10319739B2 (en) | 2017-02-08 | 2019-06-11 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
KR20190008676A (en) | 2017-07-17 | 2019-01-25 | 에스케이하이닉스 주식회사 | Semiconductor device and manufacturing method thereof |
KR102432379B1 (en) | 2017-10-16 | 2022-08-12 | 삼성전자주식회사 | Semiconductor device |
US10269435B1 (en) | 2017-11-16 | 2019-04-23 | Sandisk Technologies Llc | Reducing program disturb by modifying word line voltages at interface in two-tier stack after program-verify |
CN107863351B (en) | 2017-11-21 | 2019-03-19 | 长江存储科技有限责任公司 | A kind of production method and 3D nand flash memory of high stacking number 3D nand flash memory |
CN108417577B (en) | 2018-03-28 | 2019-03-29 | 长江存储科技有限责任公司 | The forming method of 3D NAND flash memory structure |
CN108511358B (en) | 2018-03-29 | 2019-03-29 | 长江存储科技有限责任公司 | 3D NAND detection structure and forming method thereof |
JP2020038909A (en) * | 2018-09-04 | 2020-03-12 | キオクシア株式会社 | Semiconductor storage device |
KR20210014444A (en) | 2019-07-30 | 2021-02-09 | 삼성전자주식회사 | Semiconductor device |
-
2019
- 2019-07-30 KR KR1020190092534A patent/KR20210014444A/en active IP Right Grant
-
2020
- 2020-03-19 DE DE102020107651.7A patent/DE102020107651A1/en active Granted
- 2020-04-09 US US16/844,234 patent/US11450681B2/en active Active
- 2020-04-24 SG SG10202003750QA patent/SG10202003750QA/en unknown
- 2020-07-07 CN CN202010648988.8A patent/CN112310094A/en active Pending
-
2022
- 2022-09-06 US US17/903,315 patent/US11974438B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11974438B2 (en) | 2024-04-30 |
US20220415909A1 (en) | 2022-12-29 |
US20210035987A1 (en) | 2021-02-04 |
DE102020107651A1 (en) | 2021-02-04 |
KR20210014444A (en) | 2021-02-09 |
US11450681B2 (en) | 2022-09-20 |
CN112310094A (en) | 2021-02-02 |
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