SG10201503189QA - Semiconductor wafer and manufacturing method thereof - Google Patents

Semiconductor wafer and manufacturing method thereof

Info

Publication number
SG10201503189QA
SG10201503189QA SG10201503189QA SG10201503189QA SG10201503189QA SG 10201503189Q A SG10201503189Q A SG 10201503189QA SG 10201503189Q A SG10201503189Q A SG 10201503189QA SG 10201503189Q A SG10201503189Q A SG 10201503189QA SG 10201503189Q A SG10201503189Q A SG 10201503189QA
Authority
SG
Singapore
Prior art keywords
manufacturing
semiconductor wafer
wafer
semiconductor
Prior art date
Application number
SG10201503189QA
Inventor
Michito Sato
Original Assignee
Shinetsu Handotai Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinetsu Handotai Kk filed Critical Shinetsu Handotai Kk
Publication of SG10201503189QA publication Critical patent/SG10201503189QA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02024Mirror polishing
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/34Accessories
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/34Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being on the surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
SG10201503189QA 2011-04-26 2012-04-03 Semiconductor wafer and manufacturing method thereof SG10201503189QA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011098241A JP5621702B2 (en) 2011-04-26 2011-04-26 Semiconductor wafer and manufacturing method thereof

Publications (1)

Publication Number Publication Date
SG10201503189QA true SG10201503189QA (en) 2015-06-29

Family

ID=47071813

Family Applications (2)

Application Number Title Priority Date Filing Date
SG10201503189QA SG10201503189QA (en) 2011-04-26 2012-04-03 Semiconductor wafer and manufacturing method thereof
SG2013079629A SG194646A1 (en) 2011-04-26 2012-04-03 Semiconductor wafer and manufacturing method thereof

Family Applications After (1)

Application Number Title Priority Date Filing Date
SG2013079629A SG194646A1 (en) 2011-04-26 2012-04-03 Semiconductor wafer and manufacturing method thereof

Country Status (8)

Country Link
US (1) US9076750B2 (en)
JP (1) JP5621702B2 (en)
KR (1) KR101774850B1 (en)
CN (1) CN103493184B (en)
DE (1) DE112012001458B4 (en)
SG (2) SG10201503189QA (en)
TW (1) TWI501304B (en)
WO (1) WO2012147279A1 (en)

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JP6180873B2 (en) * 2013-08-30 2017-08-16 株式会社クラレ Fiber composite sheet, polishing pad and manufacturing method thereof
MX363099B (en) * 2014-04-30 2019-03-08 1366 Tech Inc Methods and apparati for making thin semi-conductor wafers with locally controlled regions that are relatively thicker than other regions and such wafers.
DE102015220924B4 (en) * 2015-10-27 2018-09-27 Siltronic Ag Susceptor for holding a semiconductor wafer with orientation notch, method for depositing a layer on a semiconductor wafer and semiconductor wafer
JP6406238B2 (en) * 2015-12-18 2018-10-17 株式会社Sumco Wafer polishing method and polishing apparatus
KR101810643B1 (en) * 2016-02-02 2017-12-19 에스케이실트론 주식회사 Method of controling a flatness of a epitaxial wafer
KR102086281B1 (en) * 2017-04-28 2020-03-06 제이엑스금속주식회사 Polishing method of semiconductor wafer and semiconductor wafer
DE102017210450A1 (en) * 2017-06-21 2018-12-27 Siltronic Ag Method, control system and plant for processing a semiconductor wafer and semiconductor wafer
DE102017210423A1 (en) * 2017-06-21 2018-12-27 Siltronic Ag Method, control system and plant for processing a semiconductor wafer and semiconductor wafer
JP6799509B2 (en) * 2017-07-21 2020-12-16 クラリオン株式会社 Association system, association method
WO2019035336A1 (en) * 2017-08-15 2019-02-21 信越半導体株式会社 Evaluation method and evaluation device of edge shape of silicon wafer, silicon wafer, and selection method and manufacturing method thereof
JP6750592B2 (en) * 2017-08-15 2020-09-02 信越半導体株式会社 Method and apparatus for evaluating edge shape of silicon wafer, silicon wafer, and method for selecting and manufacturing the same
JP6451825B1 (en) * 2017-12-25 2019-01-16 株式会社Sumco Wafer double-side polishing method
DE102018200415A1 (en) * 2018-01-11 2019-07-11 Siltronic Ag Semiconductor wafer with epitaxial layer
KR102518971B1 (en) * 2018-04-13 2023-04-05 가부시키가이샤 사무코 Semiconductor wafer evaluation method and semiconductor wafer manufacturing method
JP7067524B2 (en) * 2019-04-15 2022-05-16 信越半導体株式会社 Wafer flatness measuring machine selection method and measuring method
KR102413432B1 (en) * 2020-08-28 2022-06-27 에스케이실트론 주식회사 Wafer and method for analyzing shape of the same

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JP3341258B2 (en) 1992-11-27 2002-11-05 株式会社東芝 Polishing equipment
JPH08257893A (en) 1995-03-29 1996-10-08 Mitsubishi Materials Corp Device and method for polishing wafer
JP2001326197A (en) 2000-03-10 2001-11-22 Mitsubishi Materials Silicon Corp Polishing method of semiconductor wafer and polishing apparatus thereof
JP2002064071A (en) * 2000-06-09 2002-02-28 Sumitomo Osaka Cement Co Ltd Polishing plate for mirror polishing silicon wafer and method thereof
WO2001096065A1 (en) 2000-06-13 2001-12-20 Shin-Etsu Handotai Co., Ltd. Method for polishing work
WO2002035593A1 (en) * 2000-10-26 2002-05-02 Shin-Etsu Handotai Co.,Ltd. Wafer manufacturing method, polishing apparatus, and wafer
JP3612708B2 (en) 2001-11-29 2005-01-19 信越半導体株式会社 Grooved polishing cloth, workpiece polishing method and polishing apparatus
JP3935757B2 (en) 2002-03-28 2007-06-27 信越半導体株式会社 Wafer double-side polishing apparatus and double-side polishing method
KR20060038612A (en) * 2004-10-30 2006-05-04 주식회사 하이닉스반도체 Method for detection edge roll-off of wafer
JP4881590B2 (en) * 2005-07-27 2012-02-22 ニッタ・ハース株式会社 Polishing cloth
JP2007067179A (en) * 2005-08-31 2007-03-15 Shin Etsu Handotai Co Ltd Mirror-finished surface polishing method and system for semiconductor wafer
KR100841094B1 (en) 2005-12-20 2008-06-25 주식회사 실트론 Silicon wafer grinding apparatus, retaining assembly, and silicon wafer flatness correcting method
JP2007173815A (en) * 2005-12-20 2007-07-05 Siltron Inc Silicon wafer polishing machine, retaining assembly used for same, and method of correcting flatness of silicon wafer
DE602006000423T2 (en) * 2006-03-31 2008-05-21 S.O.I.Tec. Silicon On Insulator Technologies S.A. Method for producing a composite material and method for selecting a wafer
JP4904960B2 (en) * 2006-07-18 2012-03-28 信越半導体株式会社 Carrier for double-side polishing apparatus, double-side polishing apparatus and double-side polishing method using the same
JP2008254124A (en) * 2007-04-05 2008-10-23 Toray Ind Inc Grinding pad
JP2009090397A (en) * 2007-10-05 2009-04-30 Nitta Haas Inc Polishing pad
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JP2011079076A (en) * 2009-10-05 2011-04-21 Toshiba Corp Polishing device and polishing method

Also Published As

Publication number Publication date
JP2012231005A (en) 2012-11-22
CN103493184A (en) 2014-01-01
TW201306109A (en) 2013-02-01
DE112012001458T5 (en) 2013-12-19
WO2012147279A1 (en) 2012-11-01
JP5621702B2 (en) 2014-11-12
US20140008768A1 (en) 2014-01-09
KR101774850B1 (en) 2017-09-05
KR20140048869A (en) 2014-04-24
TWI501304B (en) 2015-09-21
DE112012001458B4 (en) 2024-05-08
CN103493184B (en) 2016-03-30
US9076750B2 (en) 2015-07-07
SG194646A1 (en) 2013-12-30

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