SG10201408775SA - Etch bias control - Google Patents

Etch bias control

Info

Publication number
SG10201408775SA
SG10201408775SA SG10201408775SA SG10201408775SA SG10201408775SA SG 10201408775S A SG10201408775S A SG 10201408775SA SG 10201408775S A SG10201408775S A SG 10201408775SA SG 10201408775S A SG10201408775S A SG 10201408775SA SG 10201408775S A SG10201408775S A SG 10201408775SA
Authority
SG
Singapore
Prior art keywords
bias control
etch bias
etch
control
bias
Prior art date
Application number
SG10201408775SA
Inventor
Yi Wanbing
Chuan Neo Chin
Cong Hai
Wai Tang Kin
Li Weining
Boon Tan Juan
Original Assignee
Globalfoundries Sg Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Globalfoundries Sg Pte Ltd filed Critical Globalfoundries Sg Pte Ltd
Priority to SG10201408775SA priority Critical patent/SG10201408775SA/en
Priority to US14/981,881 priority patent/US9520299B2/en
Publication of SG10201408775SA publication Critical patent/SG10201408775SA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3088—Process specially adapted to improve the resolution of the mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/80—Etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
SG10201408775SA 2014-12-29 2014-12-29 Etch bias control SG10201408775SA (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
SG10201408775SA SG10201408775SA (en) 2014-12-29 2014-12-29 Etch bias control
US14/981,881 US9520299B2 (en) 2014-12-29 2015-12-28 Etch bias control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG10201408775SA SG10201408775SA (en) 2014-12-29 2014-12-29 Etch bias control

Publications (1)

Publication Number Publication Date
SG10201408775SA true SG10201408775SA (en) 2016-07-28

Family

ID=56165051

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201408775SA SG10201408775SA (en) 2014-12-29 2014-12-29 Etch bias control

Country Status (2)

Country Link
US (1) US9520299B2 (en)
SG (1) SG10201408775SA (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018013397A (en) * 2016-07-20 2018-01-25 株式会社デンソー Method for manufacturing diaphragm structure
US10442727B2 (en) * 2017-01-05 2019-10-15 Magic Leap, Inc. Patterning of high refractive index glasses by plasma etching
US10534257B2 (en) * 2017-05-01 2020-01-14 Lam Research Corporation Layout pattern proximity correction through edge placement error prediction
US10572697B2 (en) 2018-04-06 2020-02-25 Lam Research Corporation Method of etch model calibration using optical scatterometry
WO2019200015A1 (en) 2018-04-10 2019-10-17 Lam Research Corporation Optical metrology in machine learning to characterize features
WO2019199697A1 (en) 2018-04-10 2019-10-17 Lam Research Corporation Resist and etch modeling

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2701765B2 (en) 1994-12-28 1998-01-21 日本電気株式会社 Method for manufacturing semiconductor device
JPH1064788A (en) 1996-08-22 1998-03-06 Toshiba Corp Method of fabricating semiconductor device and mask for exposure
US6262435B1 (en) 1998-12-01 2001-07-17 Marina V. Plat Etch bias distribution across semiconductor wafer
US6566017B1 (en) 2000-08-14 2003-05-20 Taiwan Semiconductor Manufacturing Co., Ltd Semiconductor wafer imaging mask having uniform pattern features and method of making same
KR100378195B1 (en) 2001-02-21 2003-03-29 삼성전자주식회사 Generation method of data for used in mask including dummy pattern groups having density continuously adjusted in according to density of local design pattern and recording media in which the same recorded
US8158527B2 (en) 2001-04-20 2012-04-17 Kabushiki Kaisha Toshiba Semiconductor device fabrication method using multiple resist patterns
US7667332B2 (en) 2004-11-05 2010-02-23 Kabushiki Kaisha Toshiba Method for generating pattern, method for manufacturing semiconductor device, semiconductor device, and computer program product
KR100732753B1 (en) 2004-12-23 2007-06-27 주식회사 하이닉스반도체 Manufacturing method for semiconductor device
US7305651B2 (en) 2005-06-17 2007-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Mask CD correction based on global pattern density
TWI334163B (en) 2007-03-30 2010-12-01 Nanya Technology Corp Method of pattern transfer
KR101195267B1 (en) 2010-12-29 2012-11-14 에스케이하이닉스 주식회사 Method for fabricating fine pattern
US9417534B2 (en) 2012-04-02 2016-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Lithography method and structure for resolution enhancement with a two-state mask

Also Published As

Publication number Publication date
US9520299B2 (en) 2016-12-13
US20160189971A1 (en) 2016-06-30

Similar Documents

Publication Publication Date Title
IL247843A0 (en) Etching composition
EP3238101A4 (en) Graph operations
EP3129108A4 (en) Hoverboard
AU359667S (en) Remote control
EP3104235A4 (en) Control device
EP3167349A4 (en) Device control
EP3184498A4 (en) Spacing-maintaining member
EP3168504A4 (en) Lock-up-clutch control device
AU359664S (en) Remote Control.
EP3163304A4 (en) Control device
SG10201408775SA (en) Etch bias control
EP3110000A4 (en) Control device
EP3214279A4 (en) Valve-opening-closing-timing control device
EP3214112A4 (en) Member
GB201512606D0 (en) Weed control
GB201420547D0 (en) Control arrangement
GB2531849B (en) Controlling gas-phase ion interactions
IL232244A0 (en) Improved cruies control
EP3110412A4 (en) 4-benzylsulfonyl-2-butenenitrile
AU2014905171A0 (en) GroundControl
AU2014904776A0 (en) Weldoze
AU2014904667A0 (en) Barrowmate
AU2014904529A0 (en) Gulicurl
AU2014904208A0 (en) Glindawand
AU2014904184A0 (en) NiPPLEAiD