SG10201408390TA - Nonvolatile semiconductor memory device and manufacturing method of nonvolatile semiconductor memory device - Google Patents

Nonvolatile semiconductor memory device and manufacturing method of nonvolatile semiconductor memory device

Info

Publication number
SG10201408390TA
SG10201408390TA SG10201408390TA SG10201408390TA SG10201408390TA SG 10201408390T A SG10201408390T A SG 10201408390TA SG 10201408390T A SG10201408390T A SG 10201408390TA SG 10201408390T A SG10201408390T A SG 10201408390TA SG 10201408390T A SG10201408390T A SG 10201408390TA
Authority
SG
Singapore
Prior art keywords
memory device
semiconductor memory
nonvolatile semiconductor
manufacturing
charge storage
Prior art date
Application number
SG10201408390TA
Inventor
Kawaguchi Genki
Arai Fumitaka
Nagashima Satoshi
Kai Naoki
Sakamoto Wataru
Nitta Hiroyuki
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2010258275A external-priority patent/JP5388993B2/en
Priority claimed from JP2010266981A external-priority patent/JP5591667B2/en
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of SG10201408390TA publication Critical patent/SG10201408390TA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF NONVOLATILE SEMICONDUCTOR MEMORY DEVICE According to one embodiment, a memory cell includes a charge storage layer. A first air gap is provided between charge storage layers adjacent in a word line direction. A second air gap is provided between charge storage layers adjacent in a bit line direction. FIG. 1 38
SG10201408390TA 2010-11-18 2011-09-20 Nonvolatile semiconductor memory device and manufacturing method of nonvolatile semiconductor memory device SG10201408390TA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010258275A JP5388993B2 (en) 2010-11-18 2010-11-18 Nonvolatile semiconductor memory device and method of manufacturing nonvolatile semiconductor memory device
JP2010266981A JP5591667B2 (en) 2010-11-30 2010-11-30 Nonvolatile semiconductor memory device and method of manufacturing nonvolatile semiconductor memory device

Publications (1)

Publication Number Publication Date
SG10201408390TA true SG10201408390TA (en) 2015-01-29

Family

ID=46063533

Family Applications (2)

Application Number Title Priority Date Filing Date
SG10201408390TA SG10201408390TA (en) 2010-11-18 2011-09-20 Nonvolatile semiconductor memory device and manufacturing method of nonvolatile semiconductor memory device
SG2011068053A SG181212A1 (en) 2010-11-18 2011-09-20 Nonvolatile semiconductor memory and method of manufacturing with multiple air gaps

Family Applications After (1)

Application Number Title Priority Date Filing Date
SG2011068053A SG181212A1 (en) 2010-11-18 2011-09-20 Nonvolatile semiconductor memory and method of manufacturing with multiple air gaps

Country Status (2)

Country Link
US (1) US20120126306A1 (en)
SG (2) SG10201408390TA (en)

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Also Published As

Publication number Publication date
SG181212A1 (en) 2012-06-28
US20120126306A1 (en) 2012-05-24

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