SE9901029L - Integrated circuit with component isolation - Google Patents

Integrated circuit with component isolation

Info

Publication number
SE9901029L
SE9901029L SE9901029A SE9901029A SE9901029L SE 9901029 L SE9901029 L SE 9901029L SE 9901029 A SE9901029 A SE 9901029A SE 9901029 A SE9901029 A SE 9901029A SE 9901029 L SE9901029 L SE 9901029L
Authority
SE
Sweden
Prior art keywords
region
integrated circuit
active
substrate
manufacturing
Prior art date
Application number
SE9901029A
Other languages
Swedish (sv)
Other versions
SE9901029D0 (en
SE522530C2 (en
Inventor
Hans Norstroem
Stefan Nygren
Ola Tylstedt
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9901029A priority Critical patent/SE522530C2/en
Publication of SE9901029D0 publication Critical patent/SE9901029D0/en
Publication of SE9901029L publication Critical patent/SE9901029L/en
Publication of SE522530C2 publication Critical patent/SE522530C2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)

Abstract

A semiconductor component, in particular an NPN bipolar transistor, comprises an active surface region surrounded by thick field oxide and which is partly covered by an electrically isolating surface layer different from the field oxide. A base region within the active region is defined by a lithographically defined opening in the isolating layer. Also claimed are: (i) a process for manufacturing a transistor as above; (ii) a capacitor at the surface of a substrate comprising a dielectric layer over a highly doped buried region; (iii) a process of manufacturing the capacitor above; (iv) a process for producing a free area at a surface of a substrate which is limited by a nitride layer; (v) a side-string structure having conductive silicon contact a border of an active area; and (vi) an integrated circuit, bipolar device and process.
SE9901029A 1999-03-22 1999-03-22 NPN bipolar transistors for radio frequency use SE522530C2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SE9901029A SE522530C2 (en) 1999-03-22 1999-03-22 NPN bipolar transistors for radio frequency use

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9901029A SE522530C2 (en) 1999-03-22 1999-03-22 NPN bipolar transistors for radio frequency use

Publications (3)

Publication Number Publication Date
SE9901029D0 SE9901029D0 (en) 1999-03-22
SE9901029L true SE9901029L (en) 1999-03-22
SE522530C2 SE522530C2 (en) 2004-02-17

Family

ID=20414946

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9901029A SE522530C2 (en) 1999-03-22 1999-03-22 NPN bipolar transistors for radio frequency use

Country Status (1)

Country Link
SE (1) SE522530C2 (en)

Also Published As

Publication number Publication date
SE9901029D0 (en) 1999-03-22
SE522530C2 (en) 2004-02-17

Similar Documents

Publication Publication Date Title
US5952704A (en) Inductor devices using substrate biasing technique
US6114768A (en) Surface mount die by handle replacement
SE0103036D0 (en) Semiconductor process and integrated circuit
MY134208A (en) Bipolar transistor with raised extrinsic base fabricated in an integrated bicmos circuit
US6506638B1 (en) Vertical double gate transistor structure
JP2002313799A (en) Bipolar transistor and its manufacturing method
US5641691A (en) Method for fabricating complementary vertical bipolar junction transistors in silicon-on-sapphire
KR20020034870A (en) Integrated circuits with reduced substrate capacitance
KR980006136A (en) Integrated circuits and their manufacturing processes
JPH09148587A (en) Semiconductor device
JPH0799259A (en) Bi-cmos soi structure containing longitudinal bipolar transistor and preparation thereof
JP2003529937A (en) Semiconductor device and method of manufacturing semiconductor device
WO2002103785A3 (en) Cmos process
US9257525B2 (en) Systems and methods for forming isolated devices in a handle wafer
US20070184608A1 (en) Method of fabricating bipolar junction transistor
KR20030091523A (en) Method of forming a SOI substrate using wafer bonding techniques and method of manufacturing a high voltage complementary bipolar transistor using the SOI substrate
JP2000277621A (en) Semiconductor device
US6525392B1 (en) Semiconductor power device with insulated circuit
SE9901029L (en) Integrated circuit with component isolation
JP2003045988A (en) Semiconductor device
SE9901028L (en) Preparation of transistor
US6175135B1 (en) Trench contact structure of silicon on insulator
SE9901030L (en) Substrate connection for semiconductor component
EP1261025A3 (en) Semiconductor device and method of fabricating same
SE9901026D0 (en) Capacitor for integrated circuits

Legal Events

Date Code Title Description
NUG Patent has lapsed