SE9801674D0 - Application specific integrated circuit and transceiver circuit - Google Patents

Application specific integrated circuit and transceiver circuit

Info

Publication number
SE9801674D0
SE9801674D0 SE9801674A SE9801674A SE9801674D0 SE 9801674 D0 SE9801674 D0 SE 9801674D0 SE 9801674 A SE9801674 A SE 9801674A SE 9801674 A SE9801674 A SE 9801674A SE 9801674 D0 SE9801674 D0 SE 9801674D0
Authority
SE
Sweden
Prior art keywords
circuit
asic
outputs
transceiver
scsi
Prior art date
Application number
SE9801674A
Other languages
English (en)
Other versions
SE520102C2 (sv
SE9801674L (sv
Inventor
Jan Bengtsson
Kenny Ranerup
Original Assignee
Axis Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Axis Ab filed Critical Axis Ab
Priority to SE9801674A priority Critical patent/SE520102C2/sv
Publication of SE9801674D0 publication Critical patent/SE9801674D0/sv
Priority to US09/287,360 priority patent/US6480924B1/en
Priority to JP11133327A priority patent/JP2000082037A/ja
Publication of SE9801674L publication Critical patent/SE9801674L/sv
Publication of SE520102C2 publication Critical patent/SE520102C2/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Logic Circuits (AREA)
  • Information Transfer Systems (AREA)
SE9801674A 1998-05-13 1998-05-13 Applikationsspecifik integrerad krets och sändtagarkrets SE520102C2 (sv)

Priority Applications (3)

Application Number Priority Date Filing Date Title
SE9801674A SE520102C2 (sv) 1998-05-13 1998-05-13 Applikationsspecifik integrerad krets och sändtagarkrets
US09/287,360 US6480924B1 (en) 1998-05-13 1999-04-07 Application specific integrated circuit and transceiver with multi-mode connection
JP11133327A JP2000082037A (ja) 1998-05-13 1999-05-13 アプリケ―ション特定集積回路とトランシ―バ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9801674A SE520102C2 (sv) 1998-05-13 1998-05-13 Applikationsspecifik integrerad krets och sändtagarkrets

Publications (3)

Publication Number Publication Date
SE9801674D0 true SE9801674D0 (sv) 1998-05-13
SE9801674L SE9801674L (sv) 1999-11-14
SE520102C2 SE520102C2 (sv) 2003-05-27

Family

ID=20411293

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9801674A SE520102C2 (sv) 1998-05-13 1998-05-13 Applikationsspecifik integrerad krets och sändtagarkrets

Country Status (3)

Country Link
US (1) US6480924B1 (sv)
JP (1) JP2000082037A (sv)
SE (1) SE520102C2 (sv)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030162556A1 (en) * 2002-02-28 2003-08-28 Libes Michael A. Method and system for communication between two wireless-enabled devices
US7349466B2 (en) * 2002-03-28 2008-03-25 Seagate Technology Llc Parallel interface transmission using a single multi-frequency composite signal
US6965956B1 (en) 2003-02-28 2005-11-15 3Ware, Inc. Disk array controller and system with automated detection and control of both ATA and SCSI disk drives
CN100428129C (zh) * 2004-06-23 2008-10-22 马维尔国际贸易有限公司 具有高速外部接口以远程缓冲的存储控制器
US8032665B2 (en) * 2009-01-27 2011-10-04 Lsi Corporation Controller, program and methods for communicating with devices coupled to the controller

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5611053A (en) 1994-01-21 1997-03-11 Advanced Micro Devices, Inc. Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers
US5727184A (en) * 1994-06-27 1998-03-10 Cirrus Logic, Inc. Method and apparatus for interfacing between peripherals of multiple formats and a single system bus
WO1996026489A1 (en) 1995-02-20 1996-08-29 Cirrus Logic, Inc. Method and apparatus for interfacing between peripherals of multiple formats and a single system bus
US5915207A (en) * 1996-01-22 1999-06-22 Hughes Electronics Corporation Mobile and wireless information dissemination architecture and protocols
US6064649A (en) * 1997-01-31 2000-05-16 Nec Usa, Inc. Network interface card for wireless asynchronous transfer mode networks

Also Published As

Publication number Publication date
JP2000082037A (ja) 2000-03-21
US6480924B1 (en) 2002-11-12
SE520102C2 (sv) 2003-05-27
SE9801674L (sv) 1999-11-14

Similar Documents

Publication Publication Date Title
KR880010365A (ko) 디지탈 데이타 프로세서용 버스 인터페이스 회로
AU2003222411A1 (en) Access to a wide memory
WO1999066416A3 (en) Resource control in a computer system
SE9801674D0 (sv) Application specific integrated circuit and transceiver circuit
ES2118792T3 (es) Ordenador personal con arbitraje de una linea de transmision local.
TW200712898A (en) Multi-processor module
ATE204660T1 (de) Datenfliessbandordnungssystem
DE60028992D1 (de) Leistungssteuerungsverfahren für ein rechnersystem mit einer knotenpunktarchitektur
DE60044145D1 (de) Brückeschnittstellenschaltung
KR970066798A (ko) 고속 모드 변환 기능을 갖는 모뎀용 리셋장치
SE9901290L (sv) Avdelad buffert
WO2002073420A3 (en) Bus interface for i/o device with memory
ATE332531T1 (de) Geteilter rechner
KR100308148B1 (ko) 메모리공유장치
KR970016920A (ko) 프린터의 데이타 통신 인터페이스회로
KR0134119Y1 (ko) 원칩 마이크로 컴퓨터와 메인 컴퓨터 시스템의 데이터 인터페이스 회로
SE9900887L (sv) Krypteringsanordning
KR950020167A (ko) 피씨아이(pci)카드의 아이사(isa) 카드로의 전환장치
KR960042301A (ko) 직접 입출력 억세스 장치
ATE248473T1 (de) Datenübertragungseinheit für asynchrone serielle datenübertragung
KR920014037A (ko) 이중화 프로세서 시스팀의 입출력 장비 정합장치
KR20020010393A (ko) 양방향 멀티드롭 통신장치
SE9902292L (sv) Dator
KR980007204A (ko) 통합시그널 데이타 모드를 사용한 프로세스간 통신 프로토콜 구현방법
KR950001502A (ko) 프로세서의 외부 기기 제어용 인터페이스 회로

Legal Events

Date Code Title Description
NUG Patent has lapsed