SE9002030L - Metod foer att skriva data vid provning av minnesanordning och krets foer provning av minnesanordning - Google Patents

Metod foer att skriva data vid provning av minnesanordning och krets foer provning av minnesanordning

Info

Publication number
SE9002030L
SE9002030L SE9002030A SE9002030A SE9002030L SE 9002030 L SE9002030 L SE 9002030L SE 9002030 A SE9002030 A SE 9002030A SE 9002030 A SE9002030 A SE 9002030A SE 9002030 L SE9002030 L SE 9002030L
Authority
SE
Sweden
Prior art keywords
memory device
testing memory
circuit
data
testing
Prior art date
Application number
SE9002030A
Other languages
English (en)
Swedish (sv)
Other versions
SE9002030D0 (sv
SE512452C2 (sv
Inventor
Hoon Choi
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SE9002030D0 publication Critical patent/SE9002030D0/xx
Publication of SE9002030L publication Critical patent/SE9002030L/
Publication of SE512452C2 publication Critical patent/SE512452C2/sv

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4094Bit-line management or control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/30Accessing single arrays
    • G11C29/34Accessing multiple bits simultaneously
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/36Data generation devices, e.g. data inverters

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
SE9002030A 1989-06-10 1990-06-06 Metod för att skriva data vid provning av minnesanordning och krets för provning av minnesanordning SE512452C2 (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890008002A KR920001080B1 (ko) 1989-06-10 1989-06-10 메모리소자의 데이타 기록 방법 및 테스트 회로

Publications (3)

Publication Number Publication Date
SE9002030D0 SE9002030D0 (sv) 1990-06-06
SE9002030L true SE9002030L (sv) 1990-12-11
SE512452C2 SE512452C2 (sv) 2000-03-20

Family

ID=19286971

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9002030A SE512452C2 (sv) 1989-06-10 1990-06-06 Metod för att skriva data vid provning av minnesanordning och krets för provning av minnesanordning

Country Status (10)

Country Link
JP (1) JP3101953B2 ( )
KR (1) KR920001080B1 ( )
CN (1) CN1019243B ( )
DE (1) DE4003132A1 ( )
FR (1) FR2648266B1 ( )
GB (1) GB2232496B ( )
IT (1) IT1248750B ( )
NL (1) NL194812C ( )
RU (1) RU2084972C1 ( )
SE (1) SE512452C2 ( )

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05128899A (ja) * 1991-10-29 1993-05-25 Mitsubishi Electric Corp 半導体記憶装置
JP2005518630A (ja) * 2002-02-26 2005-06-23 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 不揮発性メモリテスト構造および方法
RU2681344C1 (ru) * 2015-03-09 2019-03-06 Тосиба Мемори Корпорейшн Полупроводниковое запоминающее устройство

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59185097A (ja) * 1983-04-04 1984-10-20 Oki Electric Ind Co Ltd 自己診断機能付メモリ装置
JPS62229599A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 不揮発性半導体記憶装置
EP0253161B1 (en) * 1986-06-25 1991-10-16 Nec Corporation Testing circuit for random access memory device
EP0263312A3 (en) * 1986-09-08 1989-04-26 Kabushiki Kaisha Toshiba Semiconductor memory device with a self-testing function
JPS6446300A (en) * 1987-08-17 1989-02-20 Nippon Telegraph & Telephone Semiconductor memory
JPH01113999A (ja) * 1987-10-28 1989-05-02 Toshiba Corp 不揮発性メモリのストレステスト回路

Also Published As

Publication number Publication date
CN1019243B (zh) 1992-11-25
GB2232496A (en) 1990-12-12
FR2648266B1 (fr) 1993-12-24
JP3101953B2 (ja) 2000-10-23
KR910001779A (ko) 1991-01-31
CN1048463A (zh) 1991-01-09
IT9020566A0 ( ) 1990-06-07
GB9002396D0 (en) 1990-04-04
NL9000261A (nl) 1991-01-02
RU2084972C1 (ru) 1997-07-20
FR2648266A1 (fr) 1990-12-14
DE4003132C2 ( ) 1992-06-04
SE9002030D0 (sv) 1990-06-06
DE4003132A1 (de) 1990-12-20
KR920001080B1 (ko) 1992-02-01
GB2232496B (en) 1993-06-02
NL194812B (nl) 2002-11-01
NL194812C (nl) 2003-03-04
JPH0312100A (ja) 1991-01-21
IT1248750B (it) 1995-01-27
IT9020566A1 (it) 1991-12-07
SE512452C2 (sv) 2000-03-20

Similar Documents

Publication Publication Date Title
KR950027821A (ko) 기준전위발생장치 및 그것을 구비한 반도체메모리장치
US5532955A (en) Method of multilevel dram sense and restore
KR920010639A (ko) 강유전성 메모리용 감지증폭기 및 그 감지방법
US6862233B2 (en) Method and circuit for determining sense amplifier sensitivity
EP0523973A3 (en) A configurable self-test for embedded rams
US20050174848A1 (en) Self-timed sneak current cancellation
EP0600655A3 (en) Method and device for testing integrated circuits.
DE3688136D1 (de) Verfahren zum testen und setzen von daten in einen datensatz auf einer platte in eine atomaren ein/ausgabeoperation.
SE9002030L (sv) Metod foer att skriva data vid provning av minnesanordning och krets foer provning av minnesanordning
EP0377840A3 (en) Nonvolatile semiconductor memory device having reference potential generating circuit
ATE51316T1 (de) Integrierter halbleiterspeicher.
ATE67892T1 (de) Integrierter halbleiterspeicher.
ATE55528T1 (de) Videosignalverarbeitungskreise.
DE69426845D1 (de) Verfahren und Einrichtung zur Parallelprüfung von Speichern
Franchi et al. Random access analog memory for early vision
US4134151A (en) Single sense line memory cell
US5978280A (en) Method, architecture and circuit for reducing and/or eliminating small signal voltage swing sensitivity
US6570440B1 (en) Direct-timed sneak current cancellation
JPH02299034A (ja) 半導体集積回路装置
KR100303874B1 (ko) 메모리셀의데이터내용을평가하기위한회로
NO900503L (no) Fremgangsmaate og krets for kobling av et elektronisk telleverk til et lese-/skriveapparat.
EP0228266A3 (en) Semiconductor memory device
JPS55163697A (en) Memory device
JPS6446300A (en) Semiconductor memory
JP2568507B2 (ja) 半導体メモリ装置の検査方法