SE7513783L - SYNCHRONIC HEART STIMULATOR AND SET TO DRIVE THE SAME - Google Patents

Abstract

1520671 Heart pacemakers MEDTRONIC INC 8 Dec 1975 [9 Dec 1974] 50268/75 Heading A5R [Also in Division H3] A synchronous heart pacemaker incorporates an upper limit for the rate of stimulation, applicable where the detected natural beat rate exceeds the limit. Pulse generator 10 (Fig. 2) includes an oscillator 12 and a rate limit circuit 50 which sets a minimum 500 ms pulse spacing (120 per minute). if the oscilllator is triggered too rapidly (as if a circuit element is defective). Normally-conductive transistor Q12 (Fig. 3b) is biased off after each output pulse by charge on capacitor C15 until the capacitor has discharged over 500 ms, preventing transistors Q9, Q11, Q13 and Q14 being turned on to discharge output capacitor C13. In the absence or detected natural beats the oscillator is free-running (asynchronous) with a period (1000 ms) determined by its RC-circuit C11 and R14, but output pulses are also triggered on demand (synchronously). A suitable interval (100 ms) after detection of a P- wave. Detection of a P-wave or an R-wave at 18, 14 Fig. 2 causes inhibit circuits 58, 34 to render the respective detectors 54, 25 refractory for a period (150 ms, 300 ms). Each detected P-wave sets a bistable memory 66 and if the setting is not cleared within the 100ms interval by detection of an R- wave, delay circuit 70 triggers the oscillator 12. Each oscillator output pulse resets the oscillator activates inhibiting circuits 50, 58, 34 and clears the memory 66. In the rate-limited mode of the invention, a natural P-wave will on occasion be received while the P-wave detector is refractory for 150 ms following an R-wave, and will not therefore give rise to an output pulse. The R-wave spacing will be about 650 ms, rather than 500 ms, at this point.