SE0101513D0 - A digital-to analog converter - Google Patents

A digital-to analog converter

Info

Publication number
SE0101513D0
SE0101513D0 SE0101513A SE0101513A SE0101513D0 SE 0101513 D0 SE0101513 D0 SE 0101513D0 SE 0101513 A SE0101513 A SE 0101513A SE 0101513 A SE0101513 A SE 0101513A SE 0101513 D0 SE0101513 D0 SE 0101513D0
Authority
SE
Sweden
Prior art keywords
digital
terminal
analogue signal
response
generate
Prior art date
Application number
SE0101513A
Other languages
Swedish (sv)
Inventor
Ola Andersson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE0101513A priority Critical patent/SE0101513D0/en
Publication of SE0101513D0 publication Critical patent/SE0101513D0/en
Priority to PCT/SE2002/000846 priority patent/WO2002089332A1/en

Links

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  • Analogue/Digital Conversion (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)

Abstract

A digital-to-analogue converter, comprising an input (20) for receiving a digital input signal (Yin); a first terminal (80) for delivering a first analogue signal (Iout+, V1+); a second terminal (110) for delivering a second analogue signal (Jout+, V2+); an input controller (30) adapted to generate a first digital word (X1) in response to the digital input signal (Yin); a first analogue signal generator (70) adapted to generate said first analogue signal (Iout+, V1+); the first analogue signal generator (70) comprising a first dump terminal (85) and a first plurality of current sources (I1, ..., IM) individually controllable to deliver currents to either the first terminal (80) or to the first dump terminal (85) in response to said first digital word (X1); wherein the input controller (30) includes means for inverting said digital input signal (Yin); the input controller (30) being adapted to generate a second digital word (X2) in response to said inverted signal (Y*in); and a second analogue signal generator (100) adapted to generate said second analogue signal (Jout+,V2+), the second analogue signal generator (100) comprising a second dump terminal (115) and a second plurality of current sources (J1, ..., JM) individually controllable to deliver currents to either the second terminal (110) or to the second dump terminal (115) in response to said second digital word (X2).
SE0101513A 2001-04-30 2001-04-30 A digital-to analog converter SE0101513D0 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
SE0101513A SE0101513D0 (en) 2001-04-30 2001-04-30 A digital-to analog converter
PCT/SE2002/000846 WO2002089332A1 (en) 2001-04-30 2002-04-30 A digital-to analog converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE0101513A SE0101513D0 (en) 2001-04-30 2001-04-30 A digital-to analog converter

Publications (1)

Publication Number Publication Date
SE0101513D0 true SE0101513D0 (en) 2001-04-30

Family

ID=20283940

Family Applications (1)

Application Number Title Priority Date Filing Date
SE0101513A SE0101513D0 (en) 2001-04-30 2001-04-30 A digital-to analog converter

Country Status (2)

Country Link
SE (1) SE0101513D0 (en)
WO (1) WO2002089332A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10735019B1 (en) 2019-07-01 2020-08-04 Infineon Technologies Austria Ag Dynamic common mode control

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950008957B1 (en) * 1992-12-31 1995-08-09 현대전자산업주식회사 Digital/analog converter
JP2861843B2 (en) * 1994-12-28 1999-02-24 日本電気株式会社 D / A converter
DE19958049B4 (en) * 1998-12-04 2005-12-29 Asahi Kasei Kabushiki Kaisha Transconductor and current mode D / A converter

Also Published As

Publication number Publication date
WO2002089332A1 (en) 2002-11-07

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