NO173304C - Dobbelt buss-system - Google Patents

Dobbelt buss-system

Info

Publication number
NO173304C
NO173304C NO854708A NO854708A NO173304C NO 173304 C NO173304 C NO 173304C NO 854708 A NO854708 A NO 854708A NO 854708 A NO854708 A NO 854708A NO 173304 C NO173304 C NO 173304C
Authority
NO
Norway
Prior art keywords
bus system
double bus
double
bus
Prior art date
Application number
NO854708A
Other languages
English (en)
Other versions
NO173304B (no
NO854708L (no
Inventor
William Jack Pantry
Burke Brian Baumann
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Publication of NO854708L publication Critical patent/NO854708L/no
Publication of NO173304B publication Critical patent/NO173304B/no
Publication of NO173304C publication Critical patent/NO173304C/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/287—Multiplexed DMA

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Steering-Linkage Mechanisms And Four-Wheel Steering (AREA)
  • Memory System (AREA)
NO854708A 1984-12-20 1985-11-25 Dobbelt buss-system NO173304C (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US68432584A 1984-12-20 1984-12-20

Publications (3)

Publication Number Publication Date
NO854708L NO854708L (no) 1986-06-23
NO173304B NO173304B (no) 1993-08-16
NO173304C true NO173304C (no) 1993-11-24

Family

ID=24747606

Family Applications (1)

Application Number Title Priority Date Filing Date
NO854708A NO173304C (no) 1984-12-20 1985-11-25 Dobbelt buss-system

Country Status (6)

Country Link
EP (1) EP0191939A1 (no)
JP (1) JPS61150054A (no)
AU (1) AU583564B2 (no)
CA (1) CA1252573A (no)
NO (1) NO173304C (no)
ZA (1) ZA859206B (no)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0421696A3 (en) * 1989-10-02 1992-01-29 Motorola Inc. Staggered access memory
US6006302A (en) 1990-06-04 1999-12-21 Hitachi, Ltd. Multiple bus system using a data transfer unit
JP2910303B2 (ja) * 1990-06-04 1999-06-23 株式会社日立製作所 情報処理装置
EP0501621A3 (en) * 1991-02-26 1994-07-06 Hewlett Packard Co Address prediction and verification for burst cycle data reads
GB2283596B (en) * 1993-11-01 1998-07-01 Ericsson Ge Mobile Communicat Multiprocessor data memory sharing
US7240144B2 (en) * 2004-04-02 2007-07-03 Arm Limited Arbitration of data transfer requests

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50113144A (no) * 1974-02-14 1975-09-05
JPS5427741A (en) * 1977-08-03 1979-03-02 Toshiba Corp Information processing organization
JPS54142020A (en) * 1978-04-27 1979-11-05 Panafacom Ltd Data processing system
US4240138A (en) * 1978-10-03 1980-12-16 Texas Instruments Incorporated System for direct access to a memory associated with a microprocessor
JPS567161A (en) * 1979-06-28 1981-01-24 Hitachi Ltd Memory interface device
JPS567160A (en) * 1979-06-29 1981-01-24 Toshiba Corp System controller
JPS58178454A (ja) * 1982-04-14 1983-10-19 Hitachi Ltd メモリ制御方式
IT1206331B (it) * 1983-10-25 1989-04-14 Honeywell Inf Systems Architettura di sistema di elaborazione dati.

Also Published As

Publication number Publication date
JPS61150054A (ja) 1986-07-08
EP0191939A1 (en) 1986-08-27
AU583564B2 (en) 1989-05-04
NO173304B (no) 1993-08-16
CA1252573A (en) 1989-04-11
AU5109885A (en) 1986-06-26
NO854708L (no) 1986-06-23
ZA859206B (en) 1986-08-27

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Legal Events

Date Code Title Description
MM1K Lapsed by not paying the annual fees

Free format text: LAPSED IN MAY 2002