NL7408770A - - Google Patents

Info

Publication number
NL7408770A
NL7408770A NL7408770A NL7408770A NL7408770A NL 7408770 A NL7408770 A NL 7408770A NL 7408770 A NL7408770 A NL 7408770A NL 7408770 A NL7408770 A NL 7408770A NL 7408770 A NL7408770 A NL 7408770A
Authority
NL
Netherlands
Prior art keywords
digital
analogue
capacitor
counter
clock pulses
Prior art date
Application number
NL7408770A
Other languages
Unknown language ( )
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL7408770A publication Critical patent/NL7408770A/

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/08Intermediate station arrangements, e.g. for branching, for tapping-off
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/12Arrangements providing for calling or supervisory signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Analogue/Digital Conversion (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

1469872 Pulse-code-modulation terminals NORTHERN TELECOM Ltd 28 June 1974 [29 June 1973] 28850/74 Heading H3H In a terminal for one channel in a pulse-codemodulation transmission system for transmitting a pulse train of recurrent frames divided into a plurality of channels, the clock pulses required for analogue-to-digital and/or digital-toanalogue conversion at the terminal are derived from the frame and digit synchronization pulses from the incoming digital signals. A counter 32 counts the recovered clock pulses and is reset to zero at the beginning of each frame. If there are more quantizing steps than total number of digits per frame a frequency multiplier could be driven by the recovered clock pulses or two or more coders could be provided operating in succession on a single channel. Analogue-to-digital conversion.-The analogue signal 70 is sampled by capacitor 73 the voltage on which then decays exponentially and is compared at 82 with an exponentially increasing voltage on capacitor 76 of polarity determined by detector 83 which also controls the polarity bit of the digital output signal. The count in counter 32 is transferred to register 86 when the comparator 82 switches over. The polarity bit is added at 87 and the digital output signal is gated out on the channel selected at 33 via AND gate 88 and OR gate 16. Digital-to-analogue conversion.-The incoming digital signal is converted to parallel form at 40 and a capacitor 51 charged to a positive or negative voltage in dependence on the polarity bit. The charge then decays exponentially during the time taken for the output of counter 32 to equal the amplitude bits, held at 43. Switch 57 is then opened and the output of amplifier 50 gated out through audio filter 58.
NL7408770A 1973-06-29 1974-06-28 NL7408770A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA175,373A CA979528A (en) 1973-06-29 1973-06-29 Digital/analog subterminal

Publications (1)

Publication Number Publication Date
NL7408770A true NL7408770A (en) 1974-12-31

Family

ID=4097161

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7408770A NL7408770A (en) 1973-06-29 1974-06-28

Country Status (13)

Country Link
JP (1) JPS5050809A (en)
BE (1) BE817088A (en)
BR (1) BR7405375A (en)
CA (1) CA979528A (en)
DE (1) DE2431243B2 (en)
DK (1) DK340874A (en)
FR (1) FR2235541A1 (en)
GB (1) GB1469872A (en)
IE (1) IE41198B1 (en)
IT (1) IT1015563B (en)
NL (1) NL7408770A (en)
SE (1) SE400686B (en)
ZA (1) ZA743822B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4430734A (en) * 1981-12-14 1984-02-07 Bell Telephone Laboratories, Incorporated Demultiplexer circuit
NO169748C (en) * 1986-03-10 1992-07-29 Siemens Ag DEVELOPMENT FOR AA FOEYE IN LOCAL ANALOGUE SERVICE SIGNALS DIGITAL SERVICE CHANNELS IN A DIRECTORY RADIO CONNECTION

Also Published As

Publication number Publication date
BR7405375A (en) 1976-03-03
JPS5050809A (en) 1975-05-07
CA979528A (en) 1975-12-09
SE400686B (en) 1978-04-03
ZA743822B (en) 1975-06-25
BE817088A (en) 1974-10-16
DE2431243B2 (en) 1979-09-20
AU7032174A (en) 1976-01-08
GB1469872A (en) 1977-04-06
DK340874A (en) 1975-02-10
SE7408436L (en) 1974-12-30
DE2431243A1 (en) 1975-01-16
FR2235541A1 (en) 1975-01-24
IT1015563B (en) 1977-05-20
IE41198L (en) 1974-12-29
IE41198B1 (en) 1979-11-07

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Legal Events

Date Code Title Description
BV The patent application has lapsed