NL2012894B1 - Method of manufacturing a photonic waveguide beam in a photonic integrated circuit. - Google Patents

Abstract

Method of manufacturing a photonic waveguide in a photonic integrated circuit comprising the steps of: - providing a silicon wafer substrate; - oxidizing a surface of the silicon wafer substrate to form a silicon dioxide bottom cladding layer; - depositing a silicon nitride layer on top of the silicon dioxide bottom cladding layer; - providing and etching a photoresist layer on the silicon nitride layer to form a waveguide core; - providing a top cladding layer of silicon dioxide to bury the waveguide core; and - etching the top and bottom cladding layer of silicon dioxide adjacent to the buried waveguide core and etching the silicon layer adjacent and beneath the buried waveguide core so as to provide a suspended cantilever waveguide beam with a silicon nitride core surrounded by silicon dioxide; - wherein in the step of etching the top and bottom cladding layer notches are etched along the beam at preselected positions corresponding to a predefined desired length of the suspended cantilever waveguide beam.

Description

Method of manufacturing a photonic waveguide beam in a photonic integrated circuit

The invention relates to a method of manufacturing a photonic waveguide beam in a photonic integrated circuit.

Such a method is known from US2005/0152660.

The article "Suspended photonic waveguide arrays for submicrometer alignment" by Tjitte-Jelte Peters, Marcel Tichem and Urs Staufer presented at the conference SPIE Photonics Europe held from 14 - 17 April 2014, discusses a method of manufacturing a photonic waveguide beam of a photonic integrated circuit comprising the steps of: providing a silicon wafer substrate; oxidizing a surface of the silicon wafer substrate to form a silicon dioxide bottom cladding layer; depositing a silicon nitride layer on top of the silicon dioxide cladding layer; providing and etching a photoresist layer on the silicon nitride layer to form a waveguide core; providing a top cladding layer of silicon dioxide to bury the waveguide core; and etching the top and bottom cladding layer of silicon dioxide adjacent to the buried waveguide core and etching the silicon layer adjacent and beneath the buried waveguide core so as to provide a suspended cantilever waveguide beam with a silicon nitride core surrounded by silicon dioxide.

The article presents a concept for the alignment of multichannel photonic integrated circuits (PICs) using flexible photonic waveguides on one of the PICs that are positiona-ble by integrated micro electro mechanical system (MEMS) actuators. The concept aims for high precision and high degree of assembly process automation. The proposed concept includes pre-alignment of both PICs on a common substrate followed by fine-alignment using on-chip flexible waveguides and MEMS functionality. The eventual accuracy of the alignment that is aimed at is 300 nm.

One of the problems with the manufacturing of photonic waveguides in the prior art is that the usual dicing/sawing or etching of photonic chips results in poor defined end facets of the waveguides. Particularly the location, verticality and surface roughness of the end facets require further process steps such as polishing to achieve the required level of accuracy. However such additional process steps are impossible with flexible waveguide beams.

According to the invention in the step of etching the top and bottom cladding layer notches are etched along the beam at preselected positions corresponding to a predefined desired length of the suspended cantilever waveguide beam. The invention thus facilitates the formation of well-defined end-facets (controlled location, high verticality and low surface roughness) of the flexible waveguides.

According to one particular embodiment of the method according to the invention the notches are etched at preselected staggered positions along the beam so as to arrange that said beam will eventually exhibit an oblique end facet.

The invention is believed to rely on the difference in material properties and different lattice constants of the waveguide material and the substrate material. The bottom cladding layer is applied to the substrate at a temperature between 1100 and 1500°C, whereas the top cladding layer is applied at a temperature of approximately 400°C. Because the waveguide material is deposited at an intermediate temperature and has a lower thermal expansion coefficient (TEC) than the substrate, it is compressed at room temperature by the (much thicker) substrate. As long as the waveguide material adheres to the substrate material, its stress is compensated for by the substrate. After the substrate material is (locally) removed, the waveguide material is free to expand in order to release its intrinsic stress. According to the invention the release of the waveguide is controlled in order to have defined stress concentrations leading to auto-cleaving of the waveguide at the desired length of the waveguide, which means that additional process steps to improve the quality of the waveguide's end facets is no longer necessary. As mentioned the location of the cleave can be controlled by including notches in the design of the waveguides.

The invention will hereinafter be further elucidated with reference to the drawing showing different process steps in the method of manufacturing the photonic waveguide according to the invention that is not limiting as to the appended claim.

In the drawing: figure 1 shows a wafer provided with a silicon nitride core buried within a bottom and top silicon oxide layer that are provided on the wafer; figure 2 shows the wafer of figure 1 after etching the bottom and top silicon oxide layer; figure 3 shows the wafer of figure 2 after underetching the silicon layer to release the waveguide beam from the wafer; figures 4 and 5 relate to an alternative method to release the waveguide beam from the wafer; figure 6 shows a top view of a first embodiment of the processed wafer; and figure 7 shows a top view of an alternative embodiment of the processed wafer.

Whenever in the figures the same reference numerals are applied, these numerals refer to the same parts.

In the method of manufacturing a photonic waveguide in a photonic integrated circuit according to the invention the steps are included of depositing different layers on a silicon wafer 1; i.e. a layer for the bottom cladding 2, a layer from which the waveguide core 3 is made, and a layer for the top cladding 4. A step of patterning is applied in the process of providing the waveguide core 3 as will be explained hereinafter.

The first step is thermal oxidation of a silicon (Si) wafer 1 to form an 8 pm thick Si02 bottom cladding layer 2 on top of said wafer 1 at a temperature between 1100 and 1500°C. Thereafter a 220 nm thin layer of Si3N4 is deposited on top of the thermal Si02 bottom cladding layer 2 by a low pressure, chemical vapour deposition (LPCVD) process. The waveguide core 3 is manufactured from said Si3N4 layer by first adding and patterning a photoresist layer on the Si3N4 layer, and transferring this pattern into the Si3N4 layer to from a waveguide core 3 using a reactive ion etch (RIE) process with CF4, SF6 and 02 gasses. The result is a 2 μπι wide waveguide core 3. For the top cladding layer 4 subsequently an 8 pm thick layer of Si02 is deposited by plasma enhanced chemical vapour deposition (PECVD) at a temperature of approximately 400°C, after which annealing is executed for three hours at a temperature of 1100°C. A limited change in temperature is obtained by a ramp-up and ramp-down of 10°C per minute to prevent cracking of the PECVD Si02 top cladding layer 4. The result of this process is shown in figure 1.

Figure 2 signifies the result of a first step to release the waveguide beam 6 by selectively etching through the Si02 top cladding layer 4 and bottom cladding layer 2, which is followed by under-etching of the silicon wafer layer 1, the result of which is shown in figure 3. For executing these process steps first a 6 pm thick photoresist layer is applied on top of the still integral PECVD Si02 top cladding layer 4 shown in figure 1, which is subsequently patterned. The design of the photolithography mask used in this step allows control over dimensional parameters like the width and the length of the suspended waveguide-beam 3 as shown in figure 2 and 3.

The photolithography mask that is used for selective etching of the frontside oxide layers 2, 4 also provides for notches 5 along the beam as shown in figure 6 which are provided at preselected positions corresponding to a predefined desired length of the cantilever waveguide beam 6. In figure 7 an alternative embodiment of providing the released waveguide beams 6 is shown, in which the notches 5 are placed at staggered positions with reference to the eventual beam so as to arrange that the end.facet of the beam is oblique rather than perpendicular to the direction of the beam as shown in figure 6. The oblique end facet is beneficial in certain applications to avoid unintended reflections of the light guided through the waveguide.

For the etching of the Si02 top cladding layer 4 and bottom cladding layer 2 an RIE process is used with CF4 and CHF3 gasses, stopping on the Si wafer 1. In order to release the waveguide beam 6 from the Si wafer 1, two sequential dry etch processes are used. The Si wafer 1 is first anisotropi- cally etched and then isotropically etched. For the anisotropic etching an inductively coupled plasma (ICP) etch is used with SF6 and 02 gasses at a flow rate of 20 seem, a process pressure of 50mTorr and a wafer temperature of 10°C. The isotropic etch is performed by means of an ICP etch with SF6 gass at a flow rate of 30 seem, a process pressure of 50 mTorr and a wafer temperature of 20°C.

After the substrate material of the wafer 1 is thus (locally) removed, the material of the waveguide beam 6 is free to expand in order to release its intrinsic stresses. According to the invention at the location of the notches 5 defined stress concentrations occur leading to auto-cleaving of the waveguide beam 6 at these notches 5, corresponding to the desired length of the waveguide beam 6. At the same time this avoids the necessity to apply any additional process steps to improve the quality of the waveguide beam's end facet, since the said auto-cleaving according to the invention produces a vertical end-facet with low surface roughness.

An alternative approach to under-etching for releasing the waveguide beam 6 is depicted in Figures 4 and 5. In this alternative method first the oxide layers 2, 4 on the backside of the wafer 1 are locally removed using a patterned photolithographic mask, the result of which is presented in Figure 4. Secondly, a wafer-through backside etch of the silicon by deep reactive ion etching (DRIE) is executed resulting in the suspended waveguide beam 6. This situation is shown in Figure 5.

Although the invention has been discussed in the foregoing with reference to an exemplary embodiment of the method of the invention, the invention is not restricted to this particular embodiment which can be varied in many ways without departing from the gist of the invention. The discussed exemplary embodiment shall therefore not be used to construe the appended claim strictly in accordance therewith. On the contrary the embodiment is merely intended to explain the wording of the appended claim without intent to limit the claim to this exemplary embodiment. The scope of protection of the invention shall therefore be construed in accordance with the appended claim only, wherein a possible ambiguity in the wording of the claim shall be resolved using this exemplary embodiment.

Claims (2)

1. Werkwijze voor het vervaardigen van een fotonische golfgeleiderbalk (6) van een fotonisch geïntegreerd circuit omvattende de stappen van.het: verschaffen van een silicium wafersubstraat (1); oxideren van een oppervlak van het silicium wafersub-straat (1) voor het vormen van een siliciumdioxide vloerbekledingslaag (2); neerslaan van een siliciumnitridelaag bovenop de silici umdioxide vloerbekledingslaag (2); .7 verschaffen en etsen van een fotoresistlaag op de sili-' ciumni’tridelaag voor het' vormen van een golf geLeiderke.n (3) ; verschaffen van een topbekledingslaag (4) van siliciumdioxide voor het begraven van de golfgeleiderkern (3); en etsen van de top- en vloerbekledingslagen (2, 4) van si liciumdioxide naast de begraven golfgeleiderkern (3) en etsen van de siliciumlaag naast en onder de begraven golfgeleiderkern (3) voor het verschaffen van een opgehangen cantilever golfgeleiderbalk (6) met een silicium· nitridekern (3) omgeven door een siliciumdioxide; met het kenmerk, dat in de stap van het etsen van de top- en vloerbekledingslagen (2, 4) uitsparingen (5) geëtst worden langs de golfgeleiderbalk (6) op vooraf bepaalde posities die overeenkomen met een vooraf bepaalde gewenste lengte van de opgehangen cantilever golfgeleiderbalk (6).A method for manufacturing a photonic waveguide beam (6) from a photonic integrated circuit comprising the steps of: providing a silicon wafer substrate (1); oxidizing a surface of the silicon wafer substrate (1) to form a silicon dioxide floor covering layer (2); depositing a silicon nitride layer on top of the silicon dioxide floor covering layer (2); .7 providing and etching a photoresist layer on the silicon nitride layer to form a wave conductor (3); providing a topcoat layer (4) of silica for burial of the waveguide core (3); and etching the top and floor coatings (2, 4) of silicon dioxide adjacent to the buried waveguide core (3) and etching the silicon layer adjacent and below the buried waveguide core (3) to provide a suspended cantilever waveguide beam (6) with a silicon nitride core (3) surrounded by a silicon dioxide; characterized in that in the step of etching the top and floor covering layers (2, 4), recesses (5) are etched along the waveguide beam (6) at predetermined positions corresponding to a predetermined desired length of the suspended cantilever waveguide beam (6). 2. Werkwijze voor het vervaardigen van een fotonische golfgeleiderbalk (6) volgens conclusie 1, met het kenmerk, dat de uitsparingen (5) langs de golfgeleiderbalk (6) zijn geëtst op vooraf bepaalde verschoven posities langs de balk (6) teneinde te bewerkstellingen dat genoemde balk (6) een schuin eindfacet vertoont.Method for manufacturing a photonic waveguide beam (6) according to claim 1, characterized in that the recesses (5) are etched along the waveguide beam (6) at predetermined offset positions along the beam (6) to effect that said beam (6) has an oblique end facet.