NL182354C - Dynamisch geheugen en werkwijze voor het functioneren ervan. - Google Patents

Dynamisch geheugen en werkwijze voor het functioneren ervan.

Info

Publication number
NL182354C
NL182354C NLAANVRAGE7217648,A NL7217648A NL182354C NL 182354 C NL182354 C NL 182354C NL 7217648 A NL7217648 A NL 7217648A NL 182354 C NL182354 C NL 182354C
Authority
NL
Netherlands
Prior art keywords
functioning
dynamic memory
dynamic
memory
Prior art date
Application number
NLAANVRAGE7217648,A
Other languages
English (en)
Other versions
NL182354B (nl
NL7217648A (nl
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Publication of NL7217648A publication Critical patent/NL7217648A/xx
Publication of NL182354B publication Critical patent/NL182354B/nl
Application granted granted Critical
Publication of NL182354C publication Critical patent/NL182354C/nl

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4078—Safety or protection circuits, e.g. for preventing inadvertent or unauthorised reading or writing; Status cells; Test cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
NLAANVRAGE7217648,A 1972-01-03 1972-12-27 Dynamisch geheugen en werkwijze voor het functioneren ervan. NL182354C (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US21597672A 1972-01-03 1972-01-03

Publications (3)

Publication Number Publication Date
NL7217648A NL7217648A (nl) 1973-07-05
NL182354B NL182354B (nl) 1987-09-16
NL182354C true NL182354C (nl) 1988-02-16

Family

ID=22805155

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7217648,A NL182354C (nl) 1972-01-03 1972-12-27 Dynamisch geheugen en werkwijze voor het functioneren ervan.

Country Status (9)

Country Link
US (1) US3786437A (nl)
JP (1) JPS5733631B2 (nl)
AU (1) AU464581B2 (nl)
CA (1) CA996260A (nl)
DE (1) DE2300165C2 (nl)
FR (1) FR2167600B1 (nl)
GB (1) GB1406117A (nl)
IT (1) IT971424B (nl)
NL (1) NL182354C (nl)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2247835C3 (de) * 1972-09-29 1978-10-05 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Regenerieren der Speicherinhalte von MOS-Speichern und MOS-Speicher zur Durchführung dieses Verfahrens
US3858185A (en) * 1973-07-18 1974-12-31 Intel Corp An mos dynamic memory array & refreshing system
US3934233A (en) * 1973-09-24 1976-01-20 Texas Instruments Incorporated Read-only-memory for electronic calculator
US3895360A (en) * 1974-01-29 1975-07-15 Westinghouse Electric Corp Block oriented random access memory
US4041330A (en) * 1974-04-01 1977-08-09 Rockwell International Corporation Selectable eight or twelve digit integrated circuit calculator and conditional gate output signal modification circuit therefor
US3942160A (en) * 1974-06-03 1976-03-02 Motorola, Inc. Bit sense line speed-up circuit for MOS RAM
US3942162A (en) * 1974-07-01 1976-03-02 Motorola, Inc. Pre-conditioning circuits for MOS integrated circuits
US3976892A (en) * 1974-07-01 1976-08-24 Motorola, Inc. Pre-conditioning circuits for MOS integrated circuits
JPS526044A (en) * 1975-07-04 1977-01-18 Toko Inc Dynamic decoder circuit
IT1041882B (it) * 1975-08-20 1980-01-10 Honeywell Inf Systems Memoria dinamica a semiconduttori e relativo sistema di recarica
JPS52106640A (en) * 1976-03-05 1977-09-07 Hitachi Ltd Memory peripheral circuit
US4044330A (en) * 1976-03-30 1977-08-23 Honeywell Information Systems, Inc. Power strobing to achieve a tri state
US4060794A (en) * 1976-03-31 1977-11-29 Honeywell Information Systems Inc. Apparatus and method for generating timing signals for latched type memories
JPS5645120Y2 (nl) * 1976-08-19 1981-10-21
JPS5725440Y2 (nl) * 1976-08-31 1982-06-02
JPS55150189A (en) * 1979-05-10 1980-11-21 Nec Corp Memory circuit
GB2346462B (en) 1999-02-05 2003-11-26 Gec Marconi Comm Ltd Memories
DE50000728D1 (de) * 1999-02-22 2002-12-12 Infineon Technologies Ag Verfahren zum betrieb einer speicherzellenanordnung mit selbstverstärkenden dynamischen speicherzellen
US6580650B2 (en) 2001-03-16 2003-06-17 International Business Machines Corporation DRAM word line voltage control to insure full cell writeback level
US7916544B2 (en) * 2008-01-25 2011-03-29 Micron Technology, Inc. Random telegraph signal noise reduction scheme for semiconductor memories

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1106689A (en) * 1964-11-16 1968-03-20 Standard Telephones Cables Ltd Data processing equipment
GB1296067A (nl) * 1969-03-21 1972-11-15
US3684897A (en) * 1970-08-19 1972-08-15 Cogar Corp Dynamic mos memory array timing system
US3681764A (en) * 1971-03-15 1972-08-01 Litton Systems Inc Low power memory system

Also Published As

Publication number Publication date
DE2300165A1 (de) 1973-07-19
AU4968972A (en) 1974-06-06
AU464581B2 (en) 1975-08-28
FR2167600A1 (nl) 1973-08-24
NL182354B (nl) 1987-09-16
NL7217648A (nl) 1973-07-05
IT971424B (it) 1974-04-30
GB1406117A (en) 1975-09-17
DE2300165C2 (de) 1983-02-24
US3786437A (en) 1974-01-15
FR2167600B1 (nl) 1977-07-29
CA996260A (en) 1976-08-31
JPS5733631B2 (nl) 1982-07-17
JPS4879941A (nl) 1973-10-26

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Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
A85 Still pending on 85-01-01
V1 Lapsed because of non-payment of the annual fee