MY188860A - Substrate for mounting semiconductor element, semiconductor device and optical semiconductor device, and method for manufacturing same - Google Patents

Substrate for mounting semiconductor element, semiconductor device and optical semiconductor device, and method for manufacturing same

Info

Publication number
MY188860A
MY188860A MYPI2018001471A MYPI2018001471A MY188860A MY 188860 A MY188860 A MY 188860A MY PI2018001471 A MYPI2018001471 A MY PI2018001471A MY PI2018001471 A MYPI2018001471 A MY PI2018001471A MY 188860 A MY188860 A MY 188860A
Authority
MY
Malaysia
Prior art keywords
semiconductor device
substrate
semiconductor chip
conductive substrate
mounting
Prior art date
Application number
MYPI2018001471A
Other languages
English (en)
Inventor
Arima Hiroyuki
Original Assignee
Ohkuchi Mat Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ohkuchi Mat Co Ltd filed Critical Ohkuchi Mat Co Ltd
Publication of MY188860A publication Critical patent/MY188860A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/85005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate being a temporary or sacrificial substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
MYPI2018001471A 2016-02-25 2017-02-17 Substrate for mounting semiconductor element, semiconductor device and optical semiconductor device, and method for manufacturing same MY188860A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016034913A JP6524533B2 (ja) 2016-02-25 2016-02-25 半導体素子搭載用基板、半導体装置及び光半導体装置、並びにそれらの製造方法
PCT/JP2017/005832 WO2017145923A1 (ja) 2016-02-25 2017-02-17 半導体素子搭載用基板、半導体装置及び光半導体装置、並びにそれらの製造方法

Publications (1)

Publication Number Publication Date
MY188860A true MY188860A (en) 2022-01-10

Family

ID=59686215

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2018001471A MY188860A (en) 2016-02-25 2017-02-17 Substrate for mounting semiconductor element, semiconductor device and optical semiconductor device, and method for manufacturing same

Country Status (5)

Country Link
JP (1) JP6524533B2 (ja)
CN (1) CN108701658B (ja)
MY (1) MY188860A (ja)
TW (1) TWI636541B (ja)
WO (1) WO2017145923A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6581641B2 (ja) * 2017-11-17 2019-09-25 株式会社東芝 半導体装置の製造方法
JP7144157B2 (ja) 2018-03-08 2022-09-29 エイブリック株式会社 半導体装置およびその製造方法
US10906304B2 (en) 2018-06-29 2021-02-02 Canon Kabushiki Kaisha Semiconductor element, recording element substrate, and liquid discharge head

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188130B1 (en) * 1999-06-14 2001-02-13 Advanced Technology Interconnect Incorporated Exposed heat spreader with seal ring
JP2001274290A (ja) * 2000-03-28 2001-10-05 Sanyo Electric Co Ltd 回路装置
JP3626075B2 (ja) * 2000-06-20 2005-03-02 九州日立マクセル株式会社 半導体装置の製造方法
JP4052915B2 (ja) * 2002-09-26 2008-02-27 三洋電機株式会社 回路装置の製造方法
JP4508064B2 (ja) * 2005-09-30 2010-07-21 住友金属鉱山株式会社 半導体装置用配線基板の製造方法
TWI387080B (zh) * 2007-04-13 2013-02-21 Chipmos Technologies Inc 四方扁平無引腳之半導體封裝結構及封裝方法
KR101088910B1 (ko) * 2008-05-29 2011-12-07 삼성엘이디 주식회사 Ｌｅｄ 패키지 및 그 제조방법
JP4811520B2 (ja) * 2009-02-20 2011-11-09 住友金属鉱山株式会社 半導体装置用基板の製造方法、半導体装置の製造方法、半導体装置用基板及び半導体装置
JP5544583B2 (ja) * 2009-10-16 2014-07-09 アピックヤマダ株式会社 リードフレーム、電子部品用基板及び電子部品
JP5500130B2 (ja) * 2011-07-20 2014-05-21 大日本印刷株式会社 樹脂封止型半導体装置および半導体装置用回路部材
WO2013022477A2 (en) * 2011-08-11 2013-02-14 Eoplex Limited Lead carrier with multi-material print formed package components
CN102324412B (zh) * 2011-09-13 2013-03-06 江苏长电科技股份有限公司 无基岛预填塑封料先镀后刻引线框结构及其生产方法
US9301391B2 (en) * 2011-11-29 2016-03-29 Advanpack Solutions Pte Ltd. Substrate structure, semiconductor package device, and manufacturing method of substrate structure
US9324584B2 (en) * 2012-12-14 2016-04-26 Stats Chippac Ltd. Integrated circuit packaging system with transferable trace lead frame

Also Published As

Publication number Publication date
TWI636541B (zh) 2018-09-21
JP2017152588A (ja) 2017-08-31
CN108701658B (zh) 2021-07-27
JP6524533B2 (ja) 2019-06-05
CN108701658A (zh) 2018-10-23
WO2017145923A1 (ja) 2017-08-31
TW201742218A (zh) 2017-12-01

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