MY170997A - Method and apparatus for validating experimental data provided for transistor modeling - Google Patents
Method and apparatus for validating experimental data provided for transistor modelingInfo
- Publication number
- MY170997A MY170997A MYPI2014002165A MYPI2014002165A MY170997A MY 170997 A MY170997 A MY 170997A MY PI2014002165 A MYPI2014002165 A MY PI2014002165A MY PI2014002165 A MYPI2014002165 A MY PI2014002165A MY 170997 A MY170997 A MY 170997A
- Authority
- MY
- Malaysia
- Prior art keywords
- experimental data
- consistency check
- data provided
- data
- consistency
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 238000000605 extraction Methods 0.000 abstract 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Geometry (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Evolutionary Computation (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Model parameter extraction for transistor modeling relies on experimental data provided and any discrepancy therein, if undetected at the outset, results in inaccurate models and delay in device/technology development. The method and apparatus of the present disclosure addresses this problem by introducing a consistency check prior to the model extraction stage. The method requires a set of experimental data, such as measured drain currents from the actual fabricated wafer for consistency check. The experimental data is formatted into readable ASCII or text file data for identification of unique points. A set of computer instructions which form the apparatus that evaluates the data consistency then provides the result of the consistency check to permit or restrain the model parameter extraction stage.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
MYPI2014002165A MY170997A (en) | 2014-07-23 | 2014-07-23 | Method and apparatus for validating experimental data provided for transistor modeling |
PCT/IB2015/055345 WO2016012904A1 (en) | 2014-07-23 | 2015-07-15 | Method and apparatus for validating experimental data provided for transistor modeling |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
MYPI2014002165A MY170997A (en) | 2014-07-23 | 2014-07-23 | Method and apparatus for validating experimental data provided for transistor modeling |
Publications (1)
Publication Number | Publication Date |
---|---|
MY170997A true MY170997A (en) | 2019-09-23 |
Family
ID=55162563
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI2014002165A MY170997A (en) | 2014-07-23 | 2014-07-23 | Method and apparatus for validating experimental data provided for transistor modeling |
Country Status (2)
Country | Link |
---|---|
MY (1) | MY170997A (en) |
WO (1) | WO2016012904A1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6756866B1 (en) * | 2019-03-19 | 2020-09-16 | ウィンボンド エレクトロニクス コーポレーション | Semiconductor storage device test equipment and test method |
CN116776801A (en) * | 2023-06-25 | 2023-09-19 | 北京华大九天科技股份有限公司 | MOS model parameter symmetry checking method |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1065159A (en) * | 1996-08-22 | 1998-03-06 | Sharp Corp | Model parameter optimizing apparatus for circuit simulation |
JP2002124666A (en) * | 2000-10-13 | 2002-04-26 | Matsushita Electric Ind Co Ltd | Spice transistor parameter extracting method |
-
2014
- 2014-07-23 MY MYPI2014002165A patent/MY170997A/en unknown
-
2015
- 2015-07-15 WO PCT/IB2015/055345 patent/WO2016012904A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2016012904A1 (en) | 2016-01-28 |
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