MY138686A - Adhesive sheet for producing semiconductor device, semiconductor device, and production method for semiconductor device - Google Patents

Adhesive sheet for producing semiconductor device, semiconductor device, and production method for semiconductor device

Info

Publication number
MY138686A
MY138686A MYPI20061357A MYPI20061357A MY138686A MY 138686 A MY138686 A MY 138686A MY PI20061357 A MYPI20061357 A MY PI20061357A MY PI20061357 A MYPI20061357 A MY PI20061357A MY 138686 A MY138686 A MY 138686A
Authority
MY
Malaysia
Prior art keywords
semiconductor device
adhesive sheet
producing
adhesive
production method
Prior art date
Application number
MYPI20061357A
Inventor
Takeshi Sato
Nobuhiro Hashimoto
Atsufumi Yamai
Original Assignee
Tomoegawa Paper Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2005099481A external-priority patent/JP4654062B2/en
Priority claimed from JP2005316560A external-priority patent/JP4863690B2/en
Priority claimed from JP2005316561A external-priority patent/JP4538398B2/en
Application filed by Tomoegawa Paper Co Ltd filed Critical Tomoegawa Paper Co Ltd
Publication of MY138686A publication Critical patent/MY138686A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Adhesive Tapes (AREA)
  • Die Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

AN OBJECT OF THE PRESENT INVENTION IS TO PROVIDE AN ADHESIVE SHEET FOR PRODUCING A SEMICONDUCTOR DEVICE, WHICH CAN PREVENT THE GENERATION OF OUT GAS COMPONENTS WHICH IS CAUSED BY USING A SILICONE ADHESIVE AND THE LIKE, AND THE OCCURRENCE OF ADHESIVE TRANSFER WHILE MAINTAINING EXCELLENT WIRE BONDING PROPERTIES AND MOLD FLASH PROPERTIES OF THERMOSETTING ADHESIVES WHEN THE ADHESIVE SHEET IS USED FOR PRODUCING A SEMICONDUCTOR DEVICE SUCH AS A QFN, AND CAN THEREBY PREVENT THE PRODUCTION OF DEFECTIVE SEMICONDUCTOR DEVICES, IN ORDER TO ACHIEVE THE OBJECT, THE PRESENT INVENTION PROVIDE AN ADHESIVE SHEET FOR PRODUCING A SEMICONDUCTOR DEVICE WHICH IS DETACHABLY ATTACHED TO A LEAD FRAME OR A WIRING SUBSTRATE, WHEREIN (LIE ADHESIVE SHEET COMPRISES A SUBSTRATE AND AN ADHESIVE LAYER, AND THE ADHESIVE LAYER COMPRISES A THERMOSETTING RESIN COMPONENT (A), A THERMOPLASTIC 15 RESIN COMPONENT (B), AND A FLUORINE BASED ADDITIVE (C).
MYPI20061357A 2005-03-30 2006-03-28 Adhesive sheet for producing semiconductor device, semiconductor device, and production method for semiconductor device MY138686A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005099481A JP4654062B2 (en) 2005-03-30 2005-03-30 Adhesive sheet for manufacturing semiconductor device and method for manufacturing semiconductor device
JP2005316560A JP4863690B2 (en) 2005-10-31 2005-10-31 Adhesive sheet for manufacturing semiconductor device, semiconductor device and manufacturing method thereof
JP2005316561A JP4538398B2 (en) 2005-10-31 2005-10-31 Adhesive sheet for manufacturing semiconductor device and method for manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
MY138686A true MY138686A (en) 2009-07-31

Family

ID=37627290

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI20061357A MY138686A (en) 2005-03-30 2006-03-28 Adhesive sheet for producing semiconductor device, semiconductor device, and production method for semiconductor device

Country Status (4)

Country Link
KR (1) KR100776313B1 (en)
MY (1) MY138686A (en)
SG (1) SG126111A1 (en)
TW (1) TWI328030B (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4863690B2 (en) * 2005-10-31 2012-01-25 株式会社巴川製紙所 Adhesive sheet for manufacturing semiconductor device, semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
TW200706627A (en) 2007-02-16
KR100776313B1 (en) 2007-11-13
SG126111A1 (en) 2006-10-30
KR20060106715A (en) 2006-10-12
TWI328030B (en) 2010-08-01

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