MXPA97001241A - System for processing a video signal through intelligent cards of processing high speed signals, connected to - Google Patents

Abstract

The present invention relates to a system that processes a video signal that includes a plurality of signal components that represent the respective ones of a plurality of video programs such as glass pay TV programs. Each signal component is processed, eg, demodulates a pay TV program, by one of a plurality of integrated circuit (IC) cards, or "smart" cards, which process high-speed signals connected in series. An output signal of the last smart card in the serial connection includes a plurality of processed signal components. The plurality of processed signal components are further processed to produce a suitable signal to produce an displayed image that includes multiple portions of images, such as in-picture image (IDI) or out-of-picture (IFI) image in a television system. Each image portion occurs in response to one of the processed signal components

Description

r- System for processing a video signal by means of intelligent cards for processing high-speed signals. Connects in Series The present invention involves access control systems 5 that include an integrated circuit card (C l), or "smart card" to limit access to information in signal processing applications. Pay TV, include access control subsystems that limit access to certain programs or channels. programs to users who are authorized (eg, who have paid a right). One approach to limit access is to modify the signal, for example, by modulating or encrypting the signal. Typically modulation involves modifying the signal shape using methods such as synchronization pulse removal. Encrypting implies modify a data component included in the signal of agreement "" - with a particular cryptographic algorithm. Only the individuals who are authorized to have access are given the necessary "key" to demodulate or decipher the signal. It is intended that the terms modulate and demodulate as used in the following, encompass access control techniques in general, including encryption and modulation. Access control systems may include a feature integrated circuit card (C l), or "smart" card. A smart card is a plastic card the size of a credit card that has a Cl signal processing embedded in the plastic. A smart card is inserted into a card reader that couples signals to and from the Cl on the card. The 7816 standard of the International Standards Organization (ONI), establishes specifications for a CI card interface. In particular, the ONI standard 786-2 specifies that the electrical interface to the card will be through eight contacts placed on the surface of the card as shown in Figure 2A. Six of the eight signals at the contact points are defined as VCC (supply voltage), RST (reset signal), CLK (clock signal), GND (ground connection), VPP (programming voltage for programming memory in the Cl of the card), and E / S (serial data input / output). For future use, two contacts are reserved. The assignment of the contacts signals of the smart card is shown in Figure 2B. The Cl in a smart card, processes data such as security control information as part of an access control protocol. The Cl includes a microcontroller control, such as the 6805 processor of Motorola Semiconductor Australia, which includes ROM, EEPROM, and RAM.The processor performs various security control functions including authorization management and generating the key to demodulate the modulated data component of the signal- Authorization management involves modifying information stored on the card that specifies the owner's authorizations (that is, programs and services to which a user is authorized to have access.) The processor adds and deletes authorizations in response to authorization information in the authorization management messages (MMA) that are included in the input signal Normally, the MMA data indicates authorization for a particular service, eg, all programming in a particular channel, or to a particular program offered by a service, eg, a movie in a particular channel offered by a service, eg, a movie in a particular channel. Because MMA refers to relatively long term authorization, MMA usually occurs rarely in a signal. Once a service or program is authorized, demodulation of the service or program can only occur after generating a key to demodulate. The key generation is presented in response to the authorization control messages (MCA) that are also included in the input signal. The MCAs provide initialization data for key generation routines that are executed by the processor. Each time a service provider changes the modulation key, the MCA data is included in the signal in such a way that a system to which it is authorized to have access, can generate the corresponding new key to demodulate. To help prevent unauthorized access to modulated signals, the key is frequently changed, eg, every two seconds. Therefore, the MCA data is frequently presented in the signal. The MMA and MCA data are transferred to the smart card for processing via the serial I / O terminal of the ONI 7816 interface: It is also used The serial I / O terminal for transferring the key generated from the card to a demodulator unit in the video signal processing channel. The demodulator demodulates the data component of the input signal, e.g., video and audio data, using the key to produce a signal to be demodulated or "clear text". Demodulation involves inverting the effects of the modulation process, eg, reinserting synchronous pulses and deciphering the data using the inverse of the algorithm for encryption. The demodulated signal is further processed by the signal processing channel to produce suitable video and audio signals for coupling output devices such as a kinescope and a loudspeaker, respectively. The inclusion of a demodulator function in the video signal processing channel implies adding a demodulator hardware to the system. The program can be included in an electronic consumer device (EC), such as a television receiver, or it can be in a single decoding unit, such as cable box. The inclusion of the demodulator hardware in a separate EC device or decoder unit dedicates the device to a particular access control system. For example, the program may be appropriate to demodulate only a particular type of modulator algorithm. If the provider "'' of the service decides to change to a different access control system, eg, due to security problems, the replacement of the Scrambler hardware involves the costly and difficult work of modifying the EC devices and / or replacing the decoder units. In addition, transferring a demodulator key generated by a smart card to a demodulator external to the smart card, provides an opportunity for a "cutter" to attack the security system. Since the Cl of the security control is embedded in the smart card, a cutter can not have 0 access directly to the Cl as part of an attempt to "cut" ie destroy the security algorithm. access to the Cl, will destroy the Cl. However, when transferring the key to a demodulator via the intelligent interface, the probability that a cutter can monitor the key transfer protocol, intercept the key and compromise the control system increases. Also, an existing smart card provides access control with respect to a particular signal source, but the implementation of certain aspects in television systems may require access control 0 for multiple signal sources simultaneously. In-picture image displays ("pix-in-pix" or IDi) and out-of-picture image (IFI) may need to incorporate signals from two or more different sources in an image signal that is supplied to a display device. To provide 5-way aspects such as IDi or IFi using signals from multiple pay TV sources, you need to provide access control by simultaneously processing for each of the pay TV sources. An example of pay-TV decoder using smart cards is described by Diehl et al. in European Patent Application 0 562 295 A1 entitled "METHOD AND APPARATUS FOR CONTROLLING SEVERAL SMART CARDS" published on September 29, 1993 in Bulletin 93/39 Hereby it is recognized that if a user has several cards smart, each one dedicated to a specific broadcaster, so each time the user changes from one channel to another, the user has to exchange the smart cards in order to demodulate the new channel To improve the ease of use of said access systems Conditional, several card readers are connected and controlled by a single processor. To facilitate this, a special power supply unit controlled by the processor supplies card readers with appropriate voltages. The present invention is directed to provide a solution to the problem of signal access control (v gr, deciphering signals) when one or more of a video signal (v gr, IDI, IFI, etc.) will be simultaneously received and displayed on an exhibition screen according to an aspect of the invention a video signal including first and second signal components representative of the first and second respective video programs, is processed via a data path including first and second smart cards The signal resulting from the processing by the smart cards is further processed to provide a suitable signal to produce an image displayed including first and second portions corresponding to the first and second programs of video, respectively. According to another aspect of the invention, the first and second signal components of the video signal include first and second respective modulated signal components that are demodulated by the first and second smart cards, respectively. According to another aspect of the invention, the video signal including first and second signal components representing first and second video programs, is produced by combining a first signal including the first signal component and a second signal including the second component of signals. The invention can be better understood by referring to the accompanying drawing in which: Figure 1 shows, in the form of a block diagram, a signal processing system that includes a smart card that provides processing rights and demodulated; Figure 2A shows the location of signal contacts on the surface of a smart card according to the norm 7816-2 of ONI; Figure 2B shows the assignment of smart card interface signals to signal contacts shown in Figure 2A according to the norm 7816-2 of ONI; Figure 3 shows a format that can display data included in a signal processed by the system shown in Figure 1; Figure 4 shows, in block diagram form, a mode of signal processing functions included in a smart card suitable for use with the system shown in Figure 1; Figures 5 to 8, illustrate the signal routine through the smart card shown in Figure 4 during various modes of operation of the system shown in Figure 1; Figure 9 shows a portion of a signal processing system including a serial connection of a plurality of smart cards: Figure 10 shows a television receiver including aspects shown in Figure 9; and Figures 11 and 12 show, in block diagram form, portions of signal processing systems constructed in accordance with the principles of the invention. One embodiment of a smart card access control system including the invention will be described with reference to an illustrative video signal processing system shown in block diagram form in Figure 1. The system shown in FIG. Figure 1 includes signal processing functions that can be found in various signal processing systems. A specific example is the direct broadcast satellite television system DSS® developed by Thomson Consumer Electronics, Inc. For a pay TV service involving an access control system based on smart card, a user who wishes to purchase the service he contacts the service provider, pays a service access fee and receives a smart card. A card is issued to a user with initial authorization information stored in the "EEPROM" of the card. The authorization information may include data identifying the user and data specifying the scope of initial access rights (eg, duration and / or specific programs paid by the user). In addition, the key generation software specific to the application is stored in the memory of the card. The authorization information stored on the card can be modified by the service provider from a remote location using authorization management suggestions (MMA) and authorization control suggestions (MCA) and inserted into portions of the signal. The MMA includes information indicating the subscription (long-term access) and payment-by-event services (a single access to the program) for which the user has paid. An MMA can be directed to a particular smart card including identification information in MMA data corresponding to the identification information stored in the particular smart card. MCA includes data such as the initialization data required for general demodulation keys. Therefore, a signal for a particular program includes both a modulated data component comprising video and audio data, and a control information component comprising EM and MCA. When the user wishes to have access to a pay TV service, the smart card 180 of Figure 1 is inserted into a card reader 190. The card reader 190 couples signals between the smart card 180 and a signal processing channel. which comprises units 100 to 170 in Figure 1. More specifically, the card reader 190 is connected to eight terminals that are located on the surface of the smart card 180 as specified in the ONI standard 7816-2 (see Figure 2). ). The connection established by the card reader 190 creates the interface 187 between the smart card 180 and the signal processing channel. In accordance with an aspect of the invention described belowThe eight signals on the interface 187 include the signals 184 that appear on a high-speed data input / output (I / O) port for the smart card 180 and the signals 182 that represent a subset of the wireless interface signals. Ci card of the ONI standard. The desired program or service is selected by tuning the receiver to the appropriate channel using the tuner 100. The tuner 100 is controlled by the microcontroller 160 in response to user inputs. For example, the microcontroller 160 may receive channel selection signals from a remote control (not shown in Figure 1) activated by a user. In response to the channel selection signals, the microcontroller 160 generates control signals that cause the tuner 100 to tune to the selected channel. The output of the tuner 100, is collected to the future error corrector (CEF) 110. The CEF 110, monitors error control information, such as parity characters in the tuned signal, to detect errors and, depending on the control protocol of error, to correct errors. The microcontroller 160 is coupled to CEF 110 to monitor the presence of errors in the signal and control the processing of errors. CEF 110 also performs an analog-to-digital conversion (CAD) function to convert the analog output to the tuner 100 to a digital signal at the output of CEF 110. The transport unit 120 processes the CEF 110 signal to detect and Separate several types of data in the tuned signal. The data in the signal can be arranged in several formats. Figure 3 shows an illustrative data format that serves as the basis for the following description. The signal described in Figure 3 comprises a stream of data organized into packets of octets of data characters, that is, 'packed' data. Each packet is associated with a particular type, or secondary stream, of information in the data stream of tuned channels. For example, the signal includes program guide information packages, control information (e.g., MCA or MMA), video information, audio information. The secondary stream with which a particular packet is associated is defined by the data included in a portion of the header of each packet. A payload portion of each packet includes the packet data. The illustrative data format shown in Figure 3 includes two octets of characters (16 characters) of data in the header and 186 octets of data characters in the payload. The first twelve characters of the header in each packet are program identification data (IDP) characters. The IDP data identifies the secondary data stream with which the payload data is associated. An example of the information provided by DP data is as follows: TABLE 1 IDP value Payload content 1 program guide information 4 MMA 10 video data for 101 channels 11 audio data for 101 channels Other values of IDP identify video and audio data for other channels. As part of the tuning process, the microcontroller 160 refers to an IDP "map" stored in the memory of the microcontroller to determine the DP values associated with the tuned channel. The appropriate IDP values are loaded into the IDP registers in the transport unit 120. For example, when the channel 101 is selected, the microcontroller 160 has access to the stored IDP map, determines with which video and audio data for 101 channels are associated with the DP values of 10 and 11 respectively, and load the values 10 and 11 into respective video and audio IDP registers in the transport unit 120. The IDP data in IDP packets to determine the content of the payload of each package. The microcontroller 160 may update the IDP map data in response to the IDP to channel correspondence information in the "program guide" packets (IDP value of 1). The last four characters of the header portion for each packet, further defines the contents of the payload as follows: TABLE 2 Designation Character Header function 13 MCA message indicates whether the payload is MCA 14 reserved 15 ENC message indicates if the payload is encrypted 16 ciave message indicates whether the payload key is A key or B key The MCA message being active, eg, in the logical 1, indicates that the payload includes MCA data such as initialization data for key generation. If the ENC message is activated, it indicates that the payload is encrypted and, therefore, must be demodulated. The key message determines which of the two keys, key A or key B, should be used to modulate the payload (eg, logical 0 indicates key A, logical 1 indicates key B). The use of the key message is described below with respect to Figure 7. The transport unit 120 in Figure 1, extracts and processes the header data in response to a clock signal from the package shown in Figure 3. The clock signal of the packet is generated and synchronized with the data stream by CEF 110. Each transition of the clock signal of the packet indicates the beginning of a packet. The transport unit 120 processes the 16 characters of the header data following each transition of the signal to determine the destination for the payload of the packet. For example, the transport unit 120 transfers payloads containing MMA (IDP value of 4) and MCA for the security controller 183 on the smart card 180 via the microcontroller 160. The video and audio data is directed to the demultiplexer / demodulator 130 for demodulation and demultiplexing in video and audio signals. The program guide data (IDP value of 1) is directed to the microcontroller 160 to update the DP map. The security controller 183 processes MMA and MCA data to provide access control functions including authorization management and key generation. The security controller 183 is included in the integrated circuit (Cl) 181 and comprises a microprocessor such as the Motorola 6805 processor. Authorization management involves processing MMA data to determine how and when the authorization information stored in Cl 181 should be updated, that is, add and delete authorizations. The MCA data provides initial values necessary for the security controller 183 to generate keys to be demodulated. After a key is generated by the security controller 183, it is transferred via the microcontroller 160 to the decrypter 130 where the modulated data component of the input signal e.g., demodulates the video and audio program data of the video signal. tuned channel. In accordance with the principles of the invention which are described below, the demodulator 185 included in Cl 181, may also provide the function of demodulation. The demodulated video and audio data are decompressed in the video decompressor 140 and audio decompressor 145, respectively. The program data is compressed into the program source using any of a variety of known data compression algorithms. The decompressors 140 and 145 reverse the effects of the compression algorithm. The outputs of video and audio decompressors 140 and 145 are coupled to the respective video and audio signal processors 150 and 155. The audio signal processor 155 can include functions such as generation of stereo signals and conversion from digital to analog to convert the digital output signal of the decompressor 145 to an analog audio output signal AOUT from the processor 155 that can be attach to a speaker (not shown in Figure 1). The video signal processor 150 also includes digital-to-analog conversion capability to convert the digital output of the decompressor 140 to an analog video output signal VOUT that is suitable to be displayed on a display device such as a kinescope. The video processor 150 also provides signal switching necessary to include an on-screen display (EEP) signal, produced by the EEP processor 170, at signal VOUT. The EEP signal represents, for example, graphic information such as a channel number display that must be included in the displayed image. The video switches in the video processor 150 multiplex the EEP signal into VOUT signal as required to produce the desired display. The operation of the EEP 170 processor is controlled by the microcontroller 160. Returning to the access control aspects of the system shown in Figure 1, the aspects and function of the smart card 180 can be better understood by referring to the Cl block diagram. of smart card 181 shown in Figure 4. The reference numbers in Figure 4 which are the same as in Figure 1, indicate the same or similar aspects. In Figure 4, the integrated circuit (Cl) 181 includes the security controller 183 which comprises a central processing unit (UPC) 421, RAM 426, ROM 425, EEPROM 423 and serial I / O unit 424. The UPC 421 is a processor such as the Motorola 6805. The key generation and authorization management software is stored in ROM 425 and EEPROM 423. Data specifying current rights is also stored in EEPROM 423 and modified in response to information in authorization management messages (MMA). in the received signal. When the transport processor 120 in Figure 1 (IDP value of the pack of 4) detects an MMA packet, the microcontroller 160 in Figure 1, transfers the payload in packet to the security controller 183 via the E / unit. S in series 424. The UPC 421 transfers the MMA data in the payload to RAM 426. The UPC 421 processes the MMA data and consequently modifies the rights data stored in EEPROM 423. The payloads of the packet include messages from Rights control (MCA), as indicated by the MCA message in the activated packet header, is transferred from the transport unit 120 to the security control 183 via the microcontroller 160 and the serial I / O unit 424. Any type of package. e.g., MMA, video, or audio, may include MCA. The MCA data is used to generate a demodulator for a particular data set. For example, the MCA data in an MMA packet is used to generate an MMA demodulatory key. When transferred to the security controller 183, the MCA data is stored in RAM 426 until the UPC 421 processes the key generation software stored in EEPROM 423 and ROM 425, is executed by the UPC 421 using the data from MCA in RAM 426 to generate a particular key. The MCA data provides information such as initial values required by the key generation algorithms. The resulting key is stored in RAM 426 up which is transferred by UPC 421 to the demodulator 130 via the serial I / O unit 324 and the microcontroller 160. The MMA and MCA data can be encrypted as indicated by the encrypt ENC message in the activated packet header. The encrypted data was transferred from the transport unit 12 to the demodulator 130 to be demodulated before being transferred to the security processor 183 for authorization management or key generation processing. The aspects and operation of Cl 181 that have been described, are the normal of known smart card systems. However, as stated above, the use of a demodulator unit external to a smart card, such as demodulator 130, substantially degrades the security system and undesirably changes the demodulator hardware. The arrangement shown in Figures 1 and 4 includes aspects that significantly improve security compared to known smart card systems. In particular, the Cl 181 of the smart card 180 includes the demodulator unit 185 and the synchronous interface 184 of high data rate comprising serial data in and serial data outside the lines separately. The combination of the demodulator 185 and the interface 184 makes it possible for all to have access to the control processing or to beresolved within the smart card 180. In Figure 1, the reader of the card 190 couples both interface signals 165 of the ONI standard of the microcontroller 160 and high-speed interface signals 125 of transport unit 120 to smart card 180 via smart card interface portions 187 which are marked 182 and 184, respectively. Figure 4 shows the signals included in interface 187. Signals 182 of the ONI standard include power, grounding, reset and serial I / O in Figure 4 (correspond to VCC, GND, RST, and E). / O in Figure 2B). The high-speed interface signals 184 comprise high-speed data input and data output signals, a clock packet signal, and a high-frequency clock signal (e.g., 50 MHz). The VPP signal of the ONI standard (programming voltage) is replaced by the clock packet signal that allows the 187 interface, including both high and low speed interfaces, to be implemented using the ONI standard configuration. eight contacts shown in Figure 2A. The elimination of the VPP signal does not prevent the system shown in Figure 1 from operating with smart cards of the existing ONI standard that do not include the demodulator 185 and the high-speed data interface 184. Existing smart cards usually include circuits of EEPROM that do not require a separate programming voltage An aspect of "charge pump" generates the required programming voltage of the card supply voltage when programming is needed.Therefore, the VPP signal as specified by the standard of ONI, it is an "unused" terminal for most smart cards of the existing ONI standard.The use of the system with the existing smart cards, does not require modifying the operation of the system so that the interface 184 of high speed and the demodulator 185 The modification needed can be achieved by only changing the control software by the controller 160. The demodulator 185, or A high data rate in response to the high frequency clock signal is required while the security controller 183 needs a lower frequency signal. The divider 422 in Cl 181 divides the 50 MHz clock signal to produce a lower frequency clock signal suitable for the security controller 183 Therefore, the high frequency clock signal alone serves as a time signal to control the operation of both the security controller 183 and the demodulator 185 Using the divider 422, it is avoided to devote two of the eight smart card interface signals to separate signals from low-frequency and low-frequency signals. The demodulator 185 includes decoding unit from transport 472, filter unit 474 IDP and MCA and filter unit 476 addressed to MMA to provide functions similar to the functions described before the transport unit 120 in Figure 1. The data input and data output signals of the interface 187, couples the high-speed data stream of the input signal between the transport unit 120 and the demodulator 185. The inclusion of functions of the transport unit 120 within the smart card 180 allows the smart card 180 to process data packets that enter the high data rate of the input signal. Both the data input signals and the packet reset signals are coupled to the unit 472. In response to each transition in the clocked packet signal, the unit 472 processes the 16 characters of the header data. The first 12 characters of the header are program identification data (DIP) which are directed to the DIP filtering unit 474 and MCA. The unit 474 compares the DIP data of the packet with the DIP values stored in the unit 474 for each type of packet included in the tuned channel. Similar to the operation described before the transport unit 120 (see Table 1 above and associated description), the comparison of DIP in unit 474, determines the type of data that contains the payload, eg, program guide , MMA, video or audio. The DIP values that identify the types of packets in the currently tuned signal are stored in registers in unit 474. The registers are loaded as part of the tuning process described above for the system in Figure 1. More specifically. the microcontroller 160 has access to the stored DIP "map", as described above and transfers DIP values associated with the channel currently tuned to the registers in the unit 474 via the signals 182 and the security controller 183 of the smart card 180 The data transfer between the security controller 183 and the functions of the demodulator 185, such as unit 474, occurs via an internal data bus to Cl 181 which is not shown in Figure 4. The manner in which the data of the payload are processed by the smart card 180, it is determined both by the results of the comparison of DiP in unit 474, and by the content of the characters 13 to 16 of the header of the packet extracted by unit 474. Using the previous sample that refers to channel 101 (see Table 1), the DIP data identifies: program guide data (DIP = 1) which is processed by microcontroller 160 to update the DIP map, dat MMA (DIP = 4) that is processed by security controller 183 to modify rights, video data (DIP = 19) and audio data (DIP = 11). The characters 13 to 16 of the security-related operations of the header control (see Table 2 above and the associated description) on the smart card 180. If the character 13 is activated (MCA message), the payload includes MCA data. which require key generation processing by the security controller 183-S, character 15 is activated (ENC message), the payload is encrypted and demodulated in the demodulation unit 478 within the decoder 185. Character 16, determines whether Ciave A or key B will be used in unit 478 to demodulate. The cryptographic state ENC character determines how the data will be processed by the demodulator unit 478. The payload data that is not encrypted passes without change from the high speed data entry terminal of the smart card 180 to the demodulator unit 478 to the high-speed data output terminal. The encrypted data is demodulated to the data rate by the unit 478. The demodulated video and audio data is passed to the high-speed data output terminal of the smart card 180. In each demodulated audio video packet, the character ENC in the packet header it is set to logical 0 indicating that the packet is "clean", that is. demodulated. To ensure that unauthorized users do not have access to data related to authorizations or keys, the demodulated MMA or MCA data does not leave the smart card 180 via our high-speed data terminal. Instead, the original modulated MMA or MCA data with the character of ENC set to logic 1, is passed through the smart card 180 from the high-speed data input terminal to the data terminal of the data set. aita speed. The MMA and MCA data that is demodulated in the demodulator unit 478 are temporarily stored in RAM 426 in the security controller 183 until they are processed by the security controller 183 for rights handling and ciaves generation. transport 120 of Figure 1, receives the data (either unchanged or demodulated) from the high-speed data output terminal of smart card 180. The IDP value of each packet is reviewed and the payload is transferred to the appropriate function in Figure 1 to further process (e.g., microcontroller 160 or decompressors 140 and 145). The operation of the smart card 180 is controlled by the commands of the microcontroller 160 in Figure 1 which communicate with the smart card 180 via the serial interface of the ONI standard. In effect, the microcontroller 160 is the master processor and the security controller 183 is the slave processor. For example, the microcontroller 160 transfers DIP information to the smart card 180 and directs the card to demodulate the data in the corresponding data streams. Security controller 183 responds by reviewing authorizations and configuring smart card 180 for the appropriate type of data processing such as rights processing, generation or demodulation of keys. In addition, the microcontroller 160 needs status information such as if demodulation is in progress. The commands communicate with the security controller 83 on the smart card 180 via the I / O terminal in sene. Any response required by the command is returned to the microcontroller 160 via the serial I / O terminal. Therefore, the I / O signal in senes serves as a control signal between the system and the smart card 180 while the high-speed data interface provides high-speed data input and output signals between the card and the system. . The serial communications between the microcontroller 160 and the smart card 180 are presented in accordance with a protocol provided in the norm 7816-3 of ONI. A smart card notifies the system of the particular protocol that will be used by sending a number of type of protocols T to the system. More specifically, when a card is inserted into the card reader, the card reader applies power to the card and resets the card by activating the reset signal. The card responds to the reset signal with a sequence of "response to reset" data specified in the standard of ONI 7816-3 §6. The reset response includes an octet of TDi interface characters. The four octets of least significant characters TDi, define the protocol type number T (see standard 7816-3 of ONl §6.1.4.3). The type of protocol for the system shown in Figure 1 is the type T = 5. A type 5 protocol is classified as "reserved", that is, currently undefined, in the ONI standard. For the system in Figure 1, protocol type 5 is identical to protocol type 0 (an asynchronous semiduplex protocol defined in ONl 7816-3 §8) except for the way in which the baud rate is determined for the sene E / S. The signal I / O in the card interface is presented to a termination scheme in accordance with Tabia 6 in rule 7816-3 of ONI. The baud rate calculation is based on the rate at which security 183 is timed. For existing smart cards, the clock frequency for security controller 183 is equal to the clock frequency Fs on the security pin. card clock. As shown in Figure 4, the smart card 180 includes the divider 422 for dividing the high-speed input rate of the clock F i "by a factor N, ie, End / N, to set the clock rate for the security controller 183. Therefore, for a protocol type 5, Table 6 of the norm 7816-3 of ONI is modified by defining Fs = F? n / N As in the case of a protocol type 0, all the commands for a type 5 protocol they are initiated by the microcontroller 160. A command starts with a header of five octets of characters including an instruction class designation of a character octet (CLA), an instruction of a character octet (iNS), a parameter of two octets of characters (P1, P2) such as an address and a number of a character octet (P3) defining the number of octets of data characters that are part of the command and follow the heading For the system in the Figure 1, the parameter P1, P2 is not necessary and, therefore, these octets of characters are not "important". Therefore the commands take the form. CLA! INS! - I - I P3 I data (character octets of P3). The commands recognized by the smart card 160 include a status command and a DIP transfer command. The smart card 160 responds to a status command of the microcontroller 160 by providing the processing state of the card, e.g., whether the card has complete key generation or if the card is demodulating data. Using a CIP transfer command, the microcontroller 160 transfers DIP numbers associated with the tuned channel. Other commands such as commands to transfer MMA and MCA data are possible, commands related to keys, and "purchase offer" commands, and will be explained later. The operation of the smart card 180, and in particular the demodulator 185, will now be described in greater detail with reference to Figures 5 to 8. When a new channel is tuned, the microcontroller 160 transfers DIP values for the new channel of the map from DIP to smart card 180 as shown in Figure 5. DIP data transfer is presented using a DIP transfer command including DIP N values, where N is specified in P3 bytes of command header characters . The DIP command and values are communicated to the card via the serial data terminal of the smart card 180 and the input / output unit 424 in senes. The UPC 421 receives the DIP data and directs the data to the appropriate DiP register in the registers 474 in the demodulator 185. Before a signal can be demodulated, a user must be authorized to access and the correct key must be loaded in the demodulator 185. After transferring the data from DiP to the smart card 180, the security controller 183 compares the DiP values with the right data stored in EEPROM 423 to see if the user is authorized to have access to the channel Tuned. Assuming that the user is authorized, the next step is the generation of the key. Generating the key involves processing MCA data. Therefore, the MCA must be received and processed to produce the key before the audio and video data can be demodulated. MCA data is encrypted to reduce the likelihood of unauthorized key generation A card with a key to demodulate MCA stored on the card is sent in EEPROM 423. As illustrated in Figure 6, the MCA key is transferred through UPC 421 of EEPROM 423 to MCA key records in the demodulator unit 478. If the user is not authorized to access the tuned channel, the authorizations must be received before the key generation and the demodulated can be presented. Authorizations can be received via MMA. An "address" that identifies a particular smart card is stored in the MMA address unit 476 of the card when the card is issued. Including address information in MMA, a service provider can direct the MMA to a particular card. The smart card compares the address information in MMA with the address of the card stored in unit 476 to detect MMA information addressed to the card. If a user is not authorized, the security controller 183 configures the card to process the MMA as shown in Figure 6, in the event that MMA data is received. As in the case of the MCA key, a card is issued with an MMA key stored on the card in EEPROM 423. In Figure 6, the MMA key is transferred from EEPROM 423 to the MMA key records in the demodulator unit 478 by UPC 421. The modulated MMA data of transport unit 120 in Figure 1 is input to the card via the high-speed data input port. After reviewing the MMA address in unit 476, the MMA data destined for the card is decrypted in unit 478. The MMA decrypted data is temporarily stored in RAM 426 and processed by UPC 421 to update the data of updated authorization stored in EEPROM 423. After the DiP settings are loaded, the authorizations exist and the MCA key is placed in the demodulator 185, the card is ready to demodulate MCA data and generate the audio and video keys . In Figure 7, the ECN data in the signal is received by the smart card 180 via the high speed data input terminal and is detected by the transport decoding unit 472. The MCA data is directed to the decipher 478 where the previously loaded MCA key is used to decrypt the MCA data. The decrypted MCA data is transferred from demodulator 478 to RAM 420. When decrypted MCA data is available, UPC 421 executes key generation algorithms stored in EEPROM 423 and ROM 425 using the MCA data decrypted in RAM 424 to generate the video and audio keys The generated keys are transferred to the appropriate video and audio key registers in demodulator 478. As shown in Figure 7, demodulator 478 includes two key registers for video, video keys A and B and two audio key registers, keys A and B of aud. The key A or B that will be used to demodulate a particular packet is determined by the character of key signage in the packet header (see Table 2 above). The "multiple key" aspect is used to allow a new key to be generated while using an existing key to demodulate data The MCA data processing in security controller 183 to generate a new key and transfer the new key to a key record in the demodulator 478 requires a significant number of instruction cycles in the UPC 421. If interrupting the demod during the generation and transfer of a new key, the processing delay may require a person to see a program to monitor a modulated image until the new ciave was in place in the demodulator 478 Having key records A and B, it allows deciphered data to use a key in a key record, v gr, key record A, while it is being generated a new key and it is loaded in the second register of ciaves, v gr, registry B of ciaves After starting the generation of keys transmitting data of MCA , a service provider waits a sufficient time to ensure that the new key B and the demodulator 478 were generated before encrypting the packets using the key B. The signal of the key, notifies the demodulator 185 when to start using the new key . After the operations shown in Figures 5, 6, and 7 have been started, the demodulator 478 has been started with all the key information required to process the encrypted data in the tuned channel, including MMA, MCA, video data and Audio. Figure 8 shows the signal flow for data processing. The encrypted data is input to the smart card 180 via the high-speed serial data input terminal. The data is decrypted in the scrambler 478 using the keys previously loaded. For example, if the transport unit 472 determines from the header of an incoming packet that the payload data is video data associated with the video key A, the payload of the packet is decrypted in the demodulator 478 using video key A . The decrypted data is output directly from the smart card 180 via the high-speed serial data output terminal. Note that the data processing in Figure 8 does not require interaction between the demodulator unit 185 and the security control unit 183 allowing the demodulator 478 to process data at the data entry rate of the input signal.

The generation of keys in the security controller 183 combined with the demodulation aspects of the demodulator unit 478, provides full capacity in the smart card 180 for processing encrypted signals using a variety of algorithms including the normal algorithm for data encryption (NCD) and Rivest-Shamir-Adlemann (RSA) algorithms. Providing all access control related to the processing within the smart card 180, the security-related data such as key data does not have to be transferred out of the smart card 180. As a result, the security compared is significantly improved. with systems that use an external demodulator to the smart card. Although the use of the internal demodulator 285 for the smart card 180 is advantageous, an external demodulator tai such as the demodulator 130 in Figure 1 can also be used. An external demodulator can be convenient for smart card compatibility written with the TV systems payers that generate the key in the smart card 180 and transfer the key to the demodulator 130. Alternatively, it may be convenient to use both the demodulator 185 and the demodulator 130. For example, it can be improved by encrypting twice a signal using two different keys. An encrypted signal twice can be deciphered using the system shown in Figure 1: decrypting the signal once in the demodulator 185 using the first key, transferring the partially decoded data to the demodulator 130, and deciphering the signal a second time in the demodulator 130 using the second key. The second key could be generated in the smart card 180 and transferred to the demodulator 130. For applications involving the demodulator 130 (i.e., applications in which the key data is transferred out of the smart card 180), commands to transfer are provided the key data via the serial I / O interface between the controller 160 and the smart card 180. For example, the microcontroller 160 sends MCA data to the card in a command and requests the key generation status with a command of State. When the status data indicates that the key generation is complete, another command requests the key data and the card responds by sending the key data to the controller 160. Subsequently, the key is transferred to the demodulator 130. The modification of the system in the Figure 1, according to the principles of the invention, allows processing data via an array of a plurality of smart cards in which the high-speed data paths of the cards are connected in series. More specifically, the high-speed data output terminal of the card is connected to the high-speed data input terminal of the next card. As will be described with respect to Figures 9 to 12, a system that processes video data via smart cards connected in-house, may use controlled access signals, such as pay TV signals, to provide features such as image within image (pix-in-pix or IDI) of out-of-picture image (IFi) in a video system such as a television receiver. For example, an IDI feature generates a signal that represents both a main video image and one or more small images that are inserted into a portion of the main image. In a television receiver, the main picture may be produced in response to the signal of a television channel while the inserted picture is produced in response to the signal of a second television channel. Using a serial connection of two or more smart cards, a smart card processes a first signal, e.g., demods a pay TV signal, to provide the main image while one or more additional smart cards process one or more signals different, such as otpay TV signals, to provide the image or the inserted images (s). Figure 9 shows a switching arrangement for use in a smart card reader to provide the described high-speed high-speed data path. In Figure 9, switches 1 and 2 respond to the insertion of cards 1 and 2, respectively, in the card reader. Switches 1 and 2 determine the path of the high-speed DATAIN and DATAOUT signals to the demodulator in the respective smart card. Each switch is shown as a single single-poio switch (SPST) that will be in one of two possible states, A or B. depending on whetor not the corresponding card is inserted: state A if the respective card is not inserted and state B if the card is inserted. In state A, a switch causes input data, ie DATAIN signal, to derive the corresponding card. In state B, the input data is connected to the inserted card. In Figure 9, both cards 1 and 2 are inserted causing both switches 1 and 2 to be in position B. As a result, the high-speed data is routed from DATAIN through cards 1 and 2 in series. If only one card is being used, card 2 is not inserted, switch S2 is in position A, and speed data is derived from card 2. The switching configurations for the array in Figure 9 are listed. in Table 3. Table 3 Card status Switch position Card 1 Card 2 S1 S2 Connection inserted inserted BB DATAIN to DIN1; DOUT1 to DIN2; DOUT2 to DATAOUT inserted removed B A DATAIN to DIN1: DOUT to DATAOUT (card 2 drift) removed removed A A DATAIN to DATAOUT (drift cards 1 and 2) The operation of signaling speed data that commute the arrangement shown in Figure 9 involves signals S1 CTRL, S2 CTRL, CARD1 ¡NSERTED and CARD1 ¡NSERTED Switches S1 and S2 are electronic switches controlled by S1 CTRL signals and S2 CTRL, respectively. The switch control signals are generated by a control processor either in the card reader or in the system (e.g., microcontroller 160 in Figure 1) in response to the CARD1 INSERTED and CARD2 INSERTED signals. The signals CARD1 INSERTED and CARD2 INSERTED are generated by the switches S3 and S4, respectively, in response to the insertion of the corresponding card and are coupled to the respective switching inputs of the microcontroller 160. Before the card 1 is inserted, the signal S1 CTRL is a logical 0 that causes the electronic switch S1 to be in position A and the signal DATAIN to bypass card 1. Inserting card 1 in the card reader causes the switch S3 to change position A (card removed) to position B (card inserted). As a result, the CARD1 INSERTED signal changes from logical 1 (+ supply voltage) to logical 0 (connected to ground). The interrupt handling routine of the microcontroller 160 detects the change in the CARD1 INSERTED signal and changes the level of the S1 CTRL signal. The switch S1 responds by switching to the position B by coupling the signal DATAIN to the card 1. The switches S2 and S4 operate in a similar manner in response to the insertion of the card 2. The operation of the described card reader directs the signal of High speed data through the demodulator for each card inserted in the card reader. To demodulate a signal that was encrypted more than once, each demodulator in the connection in sene demodulates the signal using a particular key and algorithm. For a serial connection of cards in which each card corresponds to a particular service, each card demodulates data for the service associated with the card and passes other data not changed. The selective demodulation on each card is achieved by processing DIP on each card. The DIP records on each card are loaded with the DIP values for the service corresponding to the card. Each card reviews the DIP data in the header of each package on the card. signal. If the DIP data does not correspond to the DIP data stored on the card, the data passes through the unchanged card A packet payload is demodulated only on a card on which the card's DIP data is equalized to the DIP data of the package. The control of a serially connected "stack" of multiple cards such as that shown in Figure 9 is achieved via the normal ON / I signal of the I / O. In addition to the high data I / O signals shown in Figure 9, the smart card interface signals of "clock", "packet clock", "power" and "ground connection" (see Figure 4 and associated description) are attached to each card inserted into the card. card reader 190. The "I / O in sene" and "reset" interface signals are coupled to only one smart card at any particular time. The controller 160 detects that a card is inserted via the CARD1 INSERTED or CARD2 INSERTED signals and controls the S5 switch to couple the serial I / O and resets signals to an inserted card, as needed, to transfer data to the card.If more than one card is inserted, the controller 160 communicates with a particular card controlling the card. S5 switch for connect the serial and reset l / P signals to a particular card only. The high-speed data flow through each card in the serially connected stack of the cards is not affected by the operation of the S5 switch. One aspect of the control of a stack of cards involves a delay between the high-speed data and the packet-dependent signal depending on the location in the stack of a particular card. The high-speed data path of a smart card, exhibits a character of data entry delay to data output equal to the number of high-speed clock cycles required by the data processing operation that is presented on the card. A card that only passes data from the data entry to the data output will create a character delay different from a card that demodulates data. The serial connection of cards in the stack causes the high-speed data that arrives on a particular card in the stack to exhibit a character delay with respect to the packet rate that depends on the number of cards in the stack before the stack. that a particular card and the type of processing are presented on each card before a particular card.

If the character delay is not corrected, cards in the stack other than the first card will inappropriately process the packet data stream. For example, packet header data is extracted based on the display of transitions in the packet clock signal. A character delay with respect to the packet clock will result in the inappropriate extraction of the header data and, subsequently, the incorrect processing of the payload data. The correction of the character delays is achieved by communicating the character delay information between the controller 160 and the security controller 183 of each card in the stack. Each card returns its particular character delay value to the controller 160 in response to a command from the controller 160. A card determines its current character delay, for example, by reference to a look-up table in the memory of the card that specifies a character delay value for each data processing mode, i.e., demodulated, step, etc. The controller 160 acquires the character delay data for each card in the battery and sends it to each information card including, the number of cards in the battery the position of the card in the battery (e.g., card 2) and the character delay for all the cards in the stack before the particular card. The card corrects the character delay for example, using the character delay information of the controller stack 160 to control a variable delay circuit included in the clock signal path of the packet within the transport unit 478. The arrangement shown in Figure 9 to read a plurality of smart cards, can be included in a television receiver. For example, Figure 10 shows a television receiver 1000 including the ability to simultaneously read two smart cards. Two cards are inserted into the slots 1010 and 1020. The card reader library similar to the Computer shown in Figure 9 is included in a receiver 1000 to produce the series connection described before two smart cards. As will be further described with respect to Figures 11 and 12, the first and second smart cards inserted in the slots 1010 and 1020 in Figure 10 process the respective pay TV signals to provide an IDI characteristic that produces the main image. 1030 and the inserted image 1040. Figure 11 shows a portion of a system for processing a video signal through the smart cards 180 and 1805 connected in series in the manner described with respect to Figure 9. Each smart card includes characteristics described with respect to Figures 1 and 4-8. The reference numbers used in Figure 11, which also appear in Figure 1, identify the same or similar characteristics. The common characteristics for Figures 1 and 11 are explained in detail in the description of Figure 1. Figures 11 and 12 will be described in the context of television signal processing, but other video signals can be processed. in a similar way. As described above with respect to Figure 1, the tuner 100, the future error corrector (CEF) 110 and the transport unit (TRNSP) 120 in Figure 11, process the SIN input signal under controller control (μC 160 to produce an output signal TRO of the transport unit 120 that includes data representing desired television programs. In order to provide a display feature of multiple images such as IDI or IFI in which the main and small images correspond to different television programs, the TRO signal of the transport unit 120 includes a signal component corresponding to each Program. The use of the packaged signal format described above as an example, a first signal TRO component, includes a first group of data packets that exhibit a first DIP value corresponding to the first television program. A second signal TRO component includes a second group of packets exhibiting a second DIP value corresponding to the second television program. You can modulate each of the two TRO components of signals. The signal TRO is coupled to the high-speed data input DI1 of the first smart card 180 via the card reader 190. The smart card 180 processes the first of the two signal TRO components, e.g., the component that represents the program that will appear in the main image. The processing in the smart card 180 includes demodulating the data in the component if the data is modulated. The high-speed data output signal DO1 of the first smart card includes the first processed component, eg, demodulated and the second component not processed. As explained above with respect to Figure 9, the card reader 190 connects the high-speed data path of the smart card 180 in series with the high-speed data path of the second smart card 1805 by coupling the data output. DO1 of the first smart card 180 to the data input DI2 of the second smart card 1805. The smart card 1805 processes the second component of the signal, including demodulated as required, to produce the high-speed data output signal D02 The signal D02 includes the first processed component and the second processed component. If both components of the TRO signal were demodulated, the signal D02 includes first and second demodulated components corresponding to the original modulated components. The signal D02 is returned to the transport unit 120 via the card reader 190 to direct other functions in the system. As an example, to produce an IDI display, the signal D02 is directed to the multiplexer (DEMUX) 130 which separates the first and second signal components processed under the control of the controller 160 The first and second components of processed signals are decompressed in decompresunits 140 and 1405. respectively. The decompressed data is further processed in the signal processors 150 and 1505. In the case of creating a small image as for an IDI or IFI display, one of the processors 150 and 1505 that processes the small image signal may Include video memory to store and access data that corresponds to the small image. The output of signals by processors 150 and 1505 are combined by the multiplexer (MUX), or switch 1506, to provide a signal that will produce the desired image including a small image in the desired portion of the image. The controller 160 controls the MUX time 1506 to insert the signal component corresponding to the small image at the appropriate time. The output processor 1507 couples the image signal to a display device such as a kinescope 1508. Functions such as contrast control, brightness control and kinescope impeller amplification are provided by the output processor 1507. Ei The system shown in Figure 11 provides the desired multi-image feature when the signal DI1 in the data input of the first smart card 180 includes first and second signal components representing first and second television programs as described. if the signal tuned by the tuner 100 includes both components or, for example, if the signal D1 is provided by a source other than a tuner, CEF and transport units shown in Figure 11 which provides a signal including both components. An example of an alternative signal source is a cable television signal that includes signal components that correspond to several channels. In the case of a signal received directly from a satellite such as the DSS® signal described above, the signal SIN in Figure 11 includes signals at various frequencies produced by the different responders at the same time. Although each signal of the tuned responder includes signal components corresponding to a plurality of television programs, the signal components required to produce a display of multiple images, eg, the primary and small image channels selected by a user, they can be received via different responders. If so, the signal tuned by the tuner 100 (and the signals TRO and Di1) includes only one of the signal components required to produce the desired multiple image display. This situation is addressed by the system shown in Figure 12. In Figure 12, the tuner 101, CEF 111, transport unit 1212, and multiplexer (MUX) 127 are added to the system shown in Figure 11. The tuner 100, CEF 110 and transport unit 120 tune the signal of a responder and produce the signal TR01 which includes one of the signal components necessary to produce the display of multiple images. The tuner 101. CEF 111 and transport unit 121 tune the signal of a second responder and produce the signal TR02 which includes the second of the required signal components. MUX 127 combines the signals TR01 and TRO2 under control of the controller 160 to produce a signal at the MUX output 127 that includes both required signal components. The MUX output signal is coupled to the first smart card via the card reader 190 and processed as described above with respect to Figure 11 to produce the display of multiple desired images. Various modifications of the described modalities are possible. It will be readily apparent to one of ordinary skill in the art that the invention can be applied to video system and video signal protocols different from those described in Figures 3, 11 and 12. Examples of other systems are the satellite system of DSS "mentioned before and HDTV (HDTV)., the arrangements shown in Figures 9 through 12, can be expanded to accommodate more than two smart cards. For example, in Figure 9, a switch and card detecting capability (i.e., generating a CARD INSERTED signal) is added for each additional card. The addition of smart cards will allow the demodulation of more than two signal components and produce displays that include a portion of the image that corresponds to each component of demodulated signals. Furthermore, the switching arrangement in Figure 9 could be modified to control the switches S1 and S2 directly in response to the cards being inserted in place of the control of the microcontroller 160. For example, the S3 switch could be coupled mechanically or electrically directly with the switch S1 so that the insertion of the card 1 causes the switch S1 to direct data through the card 1. Also, although the described modalities refer to the digital I / O signals coupled to the smart card 180, smart card 180 can also process analog signals. For example, the smart card 180 may include an analog-to-digital converter (CAD) in the high-speed data input and a digital-to-analog converter (CDA) in the high-speed data output. The CAD u and CDA can be located in Cl 181 in Figure 1. Alternatively, Cl 181 can be replaced with a "hybrid" device, that is, instead of sun Cl 181, smart card 180 could include CAD circuits and CDA and Cl 181 assembled and interconnected completely on a single substrate. For a smart card for processing analog signals, the card reader 190 could couple analog signals to the smart card. It is intended that these and other modifications be within the scope of the following claims.

Claims (16)

1. CLAIMS 1. A video signal processing system comprising: a source (100) of a video signal including first and second signal components representative of the first and second respective video programs; said first and second signal components including control information (MCA, MMA) to identify said respective respective video programs therein and to allow access to said programs, coupling means (190) for coupling said video signal to a input (DM) of a first smart card (180), for coupling an output signal (D01) produced by said first smart card to an input of a second smart card (1805) and to receive an output signal (D02) produced for said second smart card; said output signal (D01) of said first smart card being produced in response to said video signal and said output signal (D02) of said second smart card being produced in response to said output signal (D01) of said first Smart card; and means (130, 140, 150, 1405, 1406, 1506, 1507) that respond to said output signal (D02) of said second smart card (1805) to provide a suitable signal for coupling an image display device (1508). ) to produce an image that includes a first image portion (1030) representing the first "video program" and includes a second image portion (1040) presenting said second video program 2. The signal processing system video of claim 1, including said first and second cards 5 and wherein: said first and second signal components of said video signal comprises first and second components of respective modulated signals; said output signal (D01) of said first smart card 0 (180) includes a first demodulated signal component representative of said first video program (1030) and includes said second modulated signal component; said output signal of said second smart card (1805) includes said first demodulated signal component 5 and includes a second demodulated signal component having said second video program (1040). 3. A video signal processing system according to claim 2, wherein each of said first (180) and second (1805) smart cards comprises: 0 a signal processor (185) included in a Cl (181) ) mounted on the smart card to process a plurality of signals; and a plurality of terminals (C1-C8) placed on a surface of said smart card for coupling said plurality of signals to said Cl. said plurality of signals comprising an input data signal (DATA IN) an output data signal (DATA OUT) separated from said input data signal and a control signal (SERIAL IN / OUT); each of said plurality of signals being coupled to a respective one of said plurality of terminals; and said signal processor (185) included in said Cl processes said input data signal responding to the control information included in said control signal (SERIAL IN / OUT) to produce said output data signal (DATA OUT) . The video signal processing system of claim 3, wherein: said plurality of signals further comprises a time signal (50 MHz CLOCK); said signal processor included in said Cl responds to said time signal to process said input data signal to a first data rate to produce said output data signal in said first data rate. 5. The video signal processing system of claim 4, wherein the first data rate exceeds 10 mega-Hertz. 6. The video signal processing system of claim 5, wherein the control signal (SERIAL IN / OUT) comprises a bidirectional signal and said input data signal (DATA IN) in said data signals of saiida ( DATA OUT) are unidirectional signals. 7. The video signal processing system of claim 6, wherein said plurality of terminals (C1-C8) is disposed on said surface of said smart card in accordance with norm 7816-2 of ONI. The video signal processing system of claim 7, wherein said smart card exhibits a mechanical characteristic in accordance with norm 7816-1 of ONI. The video signal processing system of claim 8, wherein said signal processor (183) included in said Cl responds to said time signal to process said control signal (SERIAL IN / OUT) in a second regime. of data to control the processing of said data entry signal. The video signal processing of claim 9, wherein said first data rate (50 MHz) is greater than said second data rate. 11. The video signal processing system of claim 10, wherein said Cl includes a frequency divider (422) arrayed to receive said time signal to produce a first signal at a first frequency related to said first data rate. to control the processing of said input data signal by said signal processor (185, 183) and to produce a second signal to a second frequency related to dieno second data rate to to control the processing of such control signal (SERIAL IN / OUT) by said signal processor. 12. The video signal processing system of claim 1, wherein said source of the video signal comprises a tuner (100) for tuning said video signal of a plurality of video signals. The video signal processing system of claim 1, wherein said source of said video signal comprises: means (100) for producing a first signal (TR01) representing said first video program and include said first signal component; means (101) for producing a second signal (TR02) representing the second mentioned video program and including said second signal component; and means (127) for combining said first and second signals representing the first and said second video programs, respectively, to produce said video signal including such first and second signal components. A method for producing a suitable signal for coupling an image to an image display device (1508) comprising the steps of: processing a video signal on a first smart card (180) to produce a first processed signal (D01) ); said video signal comprising a first and a second signal component including control information (MCA, MMA) to identify said respective different programs therein and to allow access to said programs; processing said first processed signal (D01) on a smart card (1805) to produce a second processed signal (D02); and processing (120, 130) said second processed signal to provide a suitable image signal for coupling it to an image display device (1508) to produce an image including a first image portion (130) representing said first image program. video and includes a second portion of image (140) representing said second video program. The method of claim 14 wherein the step to process said video signal on said first smart card (180) comprises the step of demodulating a first modulated signal component included in said first signal component of said video signal. 16. The method of claim 15, wherein the step of processing said first signal processed in said second smart card (1805) comprises the step of demodulating a second modulated signal component included in said second signal component of said video signal. .