MXPA97000071A - Bidirection tension translator - Google Patents

Abstract

The present invention relates to a bidirectional voltage transducer comprising: a first gate for transmitting a signal at a first voltage level, a second gate for transmitting a signal at a second voltage level, the second voltage level being different from the second gate. first voltage level, and a bidirectional translator circuit connected to the first door and the second door, the bidirectional translator circuit comprises: translation circuit to translate a first door signal input to a first voltage level from the first door to the second voltage level in the second door and translate a second door signal input to a second voltage level of a second door to the first voltage level in the first door, and disabling circuit, the disable circuit, when the signal of first door enters the first door the translator circuit is disabled from translating the first door signal, and the circuit to disabling, when the second door signal enters the second door, disabling the circuit of the translation circuit from translating a signal into the first door for the second door and disabling the disable circuit from disabling the translation circuit to translate the Second door sign

Description

BIDIRECTIONAL TENSION TRANSLATOR Field of the Invention The invention relates generally to voltage translators and, more specifically to a voltage translator which is bidirectional.

Background of the Invention Electronic systems employ voltage translators to interconnect electronic devices that operate at different voltage levels. These voltage translators are sometimes bidirectional to facilitate data transfer. Existing bidirectional voltage translators use a read / write control line to control the direction of data communication. The read / write control line is controlled by one of the electronic devices coupled to the bidirectional voltage translator. Due to hardware limitations, some electronic devices have no place for the read / write control line. A bidirectional voltage translator that does not use a read / write control line is needed, then.

It would also be beneficial to implement a bidirectional voltage translator that uses low-cost discribed components.

Brief Description of the Figures Fig. 1 illustrates an electronic system employing a bidirectional voltage translator. Fig.2 ilsutra a block diagram of an embodiment of the bidirectional voltage translator of Fig.l. Fig.3 illustrates a circuit diagram of the embodiment of Fig.2. Fig. 4 illustrates a block diagram of an alternative embodiment of the bidirectional voltage translator of Fig. 1. Fig.5 illustrates a state diagram of a process for controlling the direction of the data used by the embodiment of Fig.4. Fig.6 illustrates a circuit diagram of an alternative embodiment of Fig.5.

Detailed Description of the Preferred Embodiments A bidirectional voltage translator includes a first door, a second door and a translator circuit coupled between the first and second doors. The first and second gates transmit signals at a first voltage level and a second voltage level, respectively. The second voltage level is different from the first voltage level. When a signal input in the first gate to a first voltage level is detected in the first gate, the bidirectional translator circuit translates the first gate signal to the second voltage level of the second gate and disables translation of a gate signal. second door to the first door. When a second door signal to the second voltage level is detected in the second door, the bidirectional translator circuit translates the second door signal to the first voltage level in the first door and disables the translation of a signal from the first door to the second door. second door. Unlike prior art, the bidirectional voltage translator allows two electronic devices with compatible voltage levels to transmit over a single bidirectional cable without using a separate control line.

Fig. 1 illustrates the electronic system 100 employing the bidirectional voltage translator 102. The electronic system 100 includes the electronic device 104, the cable 106, the electronic device 108 and the cable 110. The electronic device 104 operates at a first level of voltage, for example 3 V. The cable 106 transfers signals to a first voltage level. The electronic device 108 operates at a second voltage level, e.g. V. V. Cable 110 transfers signals to the second voltage level. The electronic device 104 is detachably coupled to the bidirectional voltage translator 102 via the cable 106. The electronic device 108 is detachably coupled to the bidirectional voltage translator 102 through the cable 110. The bidirectional voltage translator 102 allows the electronic devices 104, 108 transmit on the cables 110, 106, which form a single bidirectional cable, without using a separate address control line for translation, for example a translation read / write control line.

The electronic devices 104,108 transmit using compatible protocols. These protocols allow the recovery of the communication any collision of data. The electronic device 104 outputs communication signals having the first voltage level on the cable 106. The bidirectional voltage translator 102 translates the voltage level of these signals to the second voltage level and couples the translated signals to the electronic device 108 through of the cable 110. The electronic device 108 emits communication signals having the second voltage level in the cable 110. The bidirectional voltage translator 102 translates the voltage level of these signals to the first voltage level and couples the translated signals to the device electronic 104 through cable 106.

Each of the electronic devices 104, 108 can be one of a multiplicity of electronic devices including, among others, a cellular radiotelephone, a cellular base station, a two-way radio, a pager, a personal digital address book, a computer, a modem, a card of the International Association of Personal Computer Memory Cards (PCMCIA), a subscriber identity module (SIM) card, a SIM card reader, a smart card, a smart card reader, a landline telephone, a battery charger and other similar devices and the term "device" used herein shall refer to each of these and their equivalents.

The field service of one of the electronic devices 104,108 can be achieved by means of the electronic system 100. For example, the electronic system 100 can be used to transfer the identification of the cellular radiotelephone system and operation data (Electronic Serial Number data ( ESN) and / or Assignment Module Number (NAM)) from the electronic device 104, which is a cellular radiotelephone to be repaired, to the electronic device 108, which is a cellular radiotelephone, through the bidirectional voltage translator 102. The electronic system 100 can be used to program the cellular radio telephone identification and the operation data from the electronic device 104, which is a dedicated computer or programmer, to the electronic device 108, which is a cellular radiotelephone, through the bidirectional voltage translator 102 The electronic system 100 can also be used to test the operation of the device. electronic device 104 by coupling the electronic device 108, which can be a single piece or a complete support of test equipment, through the bidirectional voltage translator 102.

The bidirectional voltage translator 102, the cable 110, and the electronic device 108 can be packaged commercially to provide an accessory, e.g. the accessory 112, which is compatible with the electronic device 104. In Fig. 1, the electronic circuit comprises an electronic accessory 112 is illustrated as an electronic device 108 and operates at a voltage level that is different from that of the electronic device 104. The accessory 112 is detachably coupled to the electronic device 104 through the cable 106. The accessory 112 can be a vehicle accessory, for example a hands-free accessory for a cellular radiotelephone, a data accessory, for example a modem or a PCMCIA card, or other equivalent accessory.

The bidirectional voltage translator 102, implemented without a separate directional control line and with only discrete components, is illustrated in Fig.2. The bi-directional voltage translator 102 of FIG. 2 comprises a bidirectional translator circuit including ports 200, 202, stopping circuits 208-211, and regulators 212-215.

The doors 200,202 are characterized by the voltage level of the cables 106,110, respectively. The doors 200,202 receive signals to be translated from the cables 106,110, respectively. The door 200 is coupled to the cable 110, to the stop circuit 210 and to the controllers 212,213,215.

Regulators 212, 213 translate the voltage levels of the signals on the doors 200, 202. Regulators 212,213 are unidirectional and include respective inputs 216,218, outputs 220,222, and pulse control ports 224,226. The inlet 216 of the regulator 212 and the outlet 222 of the regulator 213 are coupled to the door 200. The outlet 220 of the regulator 212 and the inlet 218 of the regulator 213 are coupled to the door 202. The impulse control doors 224,226 of the regulators 212,213, respectively, are coupled to the regulators 214,215.

Regulators 214,215 control the translation direction of regulators 212,213. Regulators 214,215 are unidirectional and include respective inputs 232,234, outputs 236,238 and pulse control ports 240,242. The input 232 of the regulator 214 is coupled to the door 200. The input 234 of the regulator 215 is coupled to the door 202. The output 236 of the regulator 214 is coupled to the pulse control gate 242 of the regulator 215, stop circuit 209 and pulse control gate 226 of the controller 213. The output 238 of the controller 215 is coupled to the pulse control gate 240 of the regulator 214, the stop circuit 211 and the drive pulse gate 224 of the regulator 212.

The regulators 212,213,214,215 are regulators of open intake or open collector. Regulators 212,213,214,215 are enabled to translate signal voltage levels when the pulse control gates 221,226,240,242, respectively, are brought to a high voltage level. Regulators 212,213,214,215 are disabled when the impulse control gates 224,226,240,242, respectively, are brought to a low voltage level.

The bidirectional voltage translator 102 is in an idle state when there are no signals present to translate to any of the doors 220 or 202. In the idle state, the stop circuits 208,210 stop the cables 106,110 and the doors 200,202, respectively, at your required voltage levels. If the bidirectional voltage translator 102 is a 3V to 5V translator, the stop circuit 208 for the cable 106 and the gate 200 in 3V and the stop circuit 210 for the cable 110 and the gate 202 in 5V. The stop circuits 209,211 enable the regulators 212,213,214,215 by stopping the impulse control doors 224,226,240,242, respectively, at the high voltage level.

When a signal to be transmitted originates from the door 200, the regulator 214 is actuated. Once started, the regulator 214 drives the impulse control door 226 of the regulator 213 and the impulse control gate 242 of the regulator. 215 towards the low voltage level. This disables the controllers 213,215 to disable the transmission of the signals that entered through the door 202 to the gate 200. Once disabled, the voltage level of the signal is translated by the controller 212 to the voltage level that characterizes the gate 202 and to cable 110. The translated signal is emitted by gate 202. By disabling controllers 213,215 during the translation of gate 200 to gate 202, the translated signal or other signal on gate 202 is prevented from disabling controller 213 and / or disconnect and close the door 200 and the cable 106 through the regulator 213.

When a signal to be translated originates from the gate 202, the regulator 215 is actuated. Once activated, the regulator 215 drives the pulse control gate 224 of the controller 212 and the throttle control gate of the controller 214 to the level of low voltage. This disables the regulators 212,214 to disable the transmission of the signals that entered the door 200 to the door 202. The voltage level of the signal is then translated by the regulator 213 at the voltage level that characterizes the door 200 and the 106 cable. Disabling the regulators 212,214 during the translation of the door 202 to the door 200, the translated signal and another signal in the door 200 is prevented from disabling the regulator 212 and / or disconnecting and closing the door 202 and the cable 110 through the regulator 212 .

If the signals to be translated originate in the gates 200,202 simultaneously, all the regulators 212,213,214,215 will be disabled. The regulators 212,213,214,215 will remain disabled until the signals on the doors 200,202 are emitted by their respective electronic devices 104, 108 of FIG.

In addition to disabling the regulators, the closing or blocking of the bidirectional voltage translator 102 is further prevented by the manufacture of regulators 212,213 to have a propagation delay greater than the propagation delay of the regulators 214,215. In addition to manufacturing, the propagation delay can be increased by coupling additional delay controllers connected in series with the regulators 212,213.

A representation of the bidirectional voltage translator circuit 102 of FIG. 2 is illustrated in FIG. 3. Regulators 212,213 include transistors 300,320 and transistors 304,306, respectively. Regulators 214,215 include transistors 308,310, respectively.

Each of the transistors 300,302,304,306,308,310 is preferably a MOSFET (metal-oxide-semiconductor field effect transistor) so as to expand channel n, and includes a gate, an interconnected socket and source and which are coupled together to the electric earth.

The transistors 300,302,304,306,308,310 are connected as follows. The gate of the transistor 300 of the regulator 212 is coupled to the gate 200. The socket of the transistor 300 is coupled to the gate of the transistor 302 of the regulator 212, the gate of the transistor 308 of the regulator 214 and the socket of the transistor 310 of the regulator 215. The transistor 304 of the regulator 213 is coupled to the gate 202. The transistor 304 is coupled to the gate of the transistor 306 of the regulator 213, the gate of the transistor 310 of the regulator 215 and the socket of the transistor 308 of the regulator 214. The transistor 306 of the regulator 213 is coupled to the gate 200. The transistor 308 of the regulator 214 is coupled to the gate of the transistor 310 of the regulator 215. The socket of the transistor 310 is coupled to the gate of the transistor 308.

The stop circuits 208-211 include respective power supplies + V1, + V2, + V3, + V4 respective resistors R1, R2, R3, R4. The stop circuit 208 is coupled to the gate 200 and the transistor 306 socket of the controller 213. The stop circuit 209 is coupled to the gates of the transistors 306.310 of the controllers 213.215, respectively, and to the sockets of the transistors 304.308 of Regulators 213,214, respectively. The stop circuit 210 is coupled to the gate 202 and the transistor 302 socket of the controller 212. The stop circuit 211 is coupled to the gates of the transistors 302,308 of the regulators 212,214, respectively, and to the sockets of the 300,310 transistors of Regulators 212,215, respectively. If the bidirectional voltage transistor 102 is a 3V to 5V transistor, the appropriate values for the power supplies + V1, + V2, + V3, + V4 are 3V, 5V, 5V and 5V, respectively, and a suitable value for the resistors R1, R2, R3, R4 is 10 kO.

In the idle state, the gate 200 is stopped at the voltage + V1 by the stop circuit 208 and the open tap of the transistor 306. Similarly, the gate 202 is stopped at the voltage + V3 by the stop circuit 210 and the open socket of transistor 302. Regulators 212,213,214,215 are effectively enabled by stop circuits 209,211 and open sockets of transistors 300,304,308,310.

When translation is initiated by the signal at gate 200, the voltage in the gate of transistor 300 of regulator 212 reaches the low level. This causes the transistor 300 to be driven and the transistor 300 to reach a high voltage level. The high voltage level at the socket of the transistor 300 causes the voltage in the gates of the transistors 302, 308 also go to a high level. In response, the transistor 302.308 sockets are also brought to a low voltage level. The impulse of the transistor 302 tap to a low level translates the signal and transmits the translated signal to the gate 202. The impulse of the transistor 308 jack to the low level disables the transistors 304,306,310 by adjusting the transistor 304 socket and the gates of the transistors 306,310 at a low voltage level. The transistor 306,310 sockets open.

When the translation is initiated by a signal at the door 202, the voltage in the gate of the transistor 304 of the regulator 213 reaches a low level. This causes the transistor 304 to be driven and the transistor 304 to go to a high voltage level. The high voltage level at the socket of the transistor 304 causes the voltage in the gates of the transistors 306,310 to also go to a high level. In response, the sockets of the transistors 306, 310 are driven to a low voltage level. The impulse of the transistor 306 to a low level translates the signal and transmits the translated signal to the gate 200. The impulse of the transistor 310 to a low level disables the transistors 300,302,308 by adjusting the transistor 300 socket and the gates of the transistors. transistors 302,308 at a low voltage level. The transistors 302, 308 openings are opened.

When the translation is simultaneously initiated by signals on both doors 200,202, transistors 300,304 drive the transistors 308,310, respectively, so that the sockets of the transistors 308,310 are driven simultaneously to the low voltage level. This causes the transistors 302,306 to open. The transistors 302,306 will remain in that state until the signals on the doors 200,202 are emitted by their respective electronic devices 104, 108 of FIG.

An alternative embodiment of the bidirectional voltage translator 102, which is also implemented without a separate directional control line is illustrated in FIG. The bi-directional voltage translator 102 of FIG. 4 comprises a bidirectional translator circuit including the ports 400,402, the regulators 404,407, the programmable logic device (PLD) 408 and the stop circuits 412-415. The doors 400,402 are characterized by the voltage level of the cables 106,110, respectively. The doors 400,402 receive data signals to be translated from the cables 106,110, respectively.

The controller 404 operates as a comparator that determines the presence of an incoming data signal to be translated into the gate 400. The controller 404 includes the input 416 and the output 418. The input 416 of the controller 404 is coupled to the gate 400 and to the stop circuit 412. The output 418 of the controller 404 is coupled to the stop circuit 413 and the INI gate of the PLD 408. When the data signal to be translated is detected by the controller 404, a high voltage level is emitted to the the INI door; otherwise, a low voltage level is emitted to the INI gate.

The regulator 405 translates the voltage level of the data signals originating from the gate 402. The regulator 405 includes the input 420 and the output 422. The input 420 of the regulator 405 is coupled to the gate OUT1 of the PLD 408. The output 422 of the controller 405 is coupled to the gate 400 and the stop circuit 412. The controller 405 is driven and translates the data signals originating in the gate 402 to outgoing translated data signals when the gate OUT1 is set to a high voltage level by the PLD 408. When the OUT1 gate is set to a low voltage level by the PLD 408, the regulator remains disconnected.

The regulator 406 operates as a comparator that senses the presence of an incoming data signal to be translated at the gate 402. The regulator 406 includes the input 424 and the output 426. The input 424 of the regulator 406 is coupled to the gate 402 and the stop circuit 415. The output 426 of the regulator 406 is coupled to the stop circuit 414 and the gate IN2 of the PLD 408. When the data signal to be translated is detected by the controller 406, a high voltage level is emitted to the IN2 gate; otherwise, a low voltage level is emitted to gate IN2.

The regulator 407 translates the voltage level of the data signals originating from the gate 400. The regulator 407 includes the input 428 and the output 430. The input 428 of the controller 407 is coupled to the gate OUT2 of the PLD 408.

The output 430 of the controller 407 is coupled to the gate 402 and the stop circuit 415. The controller 407 turns on and translates the data signals originating in the gate 400 to outgoing translated data signals when the gate OUT2 is set to a level of low voltage by the PLD 408, the regulator 407 remains disconnected.

The PLD controls the direction of the data signal translation of the bidirectional voltage translator 102 according to a state machine 500 illustrated in Fig.5. The state machine 500 is implemented according to the software stored in the PLD 408 of Fig.4. Each state of the state machine 500 represents the direction of the translation of data signals. Block 502 indicates a state of rest where translation of data signals does not occur. Block 504 indicates a state where data signals received at gate 400 of FIG. 4 are translated and output to gate 402 of FIG. 4. Block 506 indicates a stat where the data signals received at gate 402 of Fig. 4 are translated and output to gate 402. Block 508 indicates an illegal status. In the case of arriving at block 508, state machine 500 returns to block 502.

The state machine 500 operates synchronously in accordance with a continuous stream of clock pulses provided by the timer 410 of the PLD 408. The evaluation and status passage occurs with the detection of each clock pulse. The states are crossed based on the voltage levels of the doors INI, IN2, OUT1, OUT2 of the PLD 408 of Fig.4. The state machine 500 permenece in block 502 when the doors INI, IN2, OUT1, OUT2 are at the low voltage level, indicated in Fig.5 as 00/00. The state machine 500 is maintained in block 502 when the doors IN1, IN2 are at a high voltage level and the doors OUTl, OUT2 are at a low voltage level, indicated as 11/00. The state machine 500 moves from block 502 to block 504 when the INI gate is at a high voltage level and the gates IN2, OUT1, OUT2 are at a low voltage level, designated as 10/00. State machine 500 moves from block 502 to block 506 when gate IN2 is at a high voltage level and doors INI, OUT1, OUT2 are at a low voltage level, designated as 01/00.

The state machine 500 is maintained in the block 504 when the doors IN1,0UT2 of the Fig. Are at a high voltage level and the doors IN2,0UT1 of Fig. 4 are at a low voltage level, indicated in FIG. Fig.5 as 10/01.

The state machine 500 also remains in block 504 when the doors IN1, IN2.0UT2 are at a high voltage level and the door OUT1 is at a low voltage level, designated as 11/01. State machine 500 moves from block 504 to block 502 when doors IN2, OUT2 are at a high voltage level and doors IN1,0UT1 are at a low voltage level, designated as 01/01. Status machine 500 also moves from block 504 to block 502 when doors OUT2 are at a high voltage level and doors IN1, IN2.0UT1 are at a low voltage level, designated 00/01.

The state machine 500 is maintained in the block 506 when the doors IN2,0UT1 of Fig.4 are at a high voltage level and the doors IN1,0UT2 of Fig.4 are at a low voltage level, indicated in Fig.5 as 01/10. The state machine 500 is maintained in block 506 when the doors INl, In2, OUTl are at a high voltage level and the door OUT2 is at a low voltage level, indicated as 11/10. State machine 500 moves from block 506 to block 502 when doors IN1,0UT1 are at a high voltage level and doors IN2, OUT2 are at a low voltage level, designated 10/10. The state machine is also maintained in block 502 when door OUT1 is at a high voltage level and doors IN1, IN2.0UT2 are at a low voltage level, marked as 00/10.

Although the state machine 500 is implemented through the PLD 408, it will be recognized that the state machine 500 can also be implemented using a microprocessor or discrete components, for example joggers.

A partial circuit representation of the bidirectional voltage translator 102 of FIG. 4 is illustrated in FIG.

Fig.6 Regulators 404,406 include comparators 500,502, respectively. Regulators 405,407 include transistors 504,506, respectively. The stop circuits 412-415 include respective power supplies + V1, + V2, + V #, + V4 and respective resistors R1, R2, R3, R4. If the bidirectional voltage transistor 102 is a transistor of 3V to 5V, suitable values for power supplies + V1, + V2, + V3, + V4 include 3V, 5V, 5V, 5V, respectively, and suitable values for resistors R1, R2, R3, R4 include 100 kO, 10 kO, 10 kO, 15 kO, respectively. It will be recognized that other values can be used for the resistors R1-R4.

The comparators 500,502 are coupled between the ports 400,402, respectively, and the PLD 408, for comparing the voltage level of the incoming signals from the doors 400,402, respectively, with the voltage level derived from the voltage references + V5, + V6 , respectively. When the voltage level of the incoming signal at the gate 400 together with the resistor R6 is greater or approximately equal to a voltage level derived from + V5, the resistors R5, R7, R8 and the output voltage level of the comparator 500 , the comparator 500 emits a low voltage level to the INI gate of the PLD 408. When the voltage level of the incoming data signal in the gate 402 together with the RIO resistor is greater or approximately equal to a voltage level derived from + V6, the resistors R9, R11, R12 and the output voltage level of the comparator 502, the comparator 502 emits a voltage level to the gate IN2 of the PLD 408. If the bidirectional voltage translator 102 is a 3V transistor to 5V, the appropriate values for voltage references + V5, + V6 are 3V and 5V, respectively, and the appropriate values for resistors R5, R6, R7, R8, R9, R10, R11, R12 are 10 kO, 10 kO , 10 kO, 100 kO, 10 kO, 10 kO, 10 kO, 100 kO, respectively. It will be recognized that other values can be used for the resistors R5-R12.

The transistors 504,506, which respond to the PLD 408, translate the incoming data signals from the ports 400,402, respectively. Transistors 504.506 are bipolar open collector gas transistors that include a base, a collector and an emitter. The bases of the transistors 504.506 are coupled to the ports OUT1, OUT2 of the PLD 408, respectively. If an incoming signal from the gate 402 is to be translated, the PLD 408 outputs a high voltage signal through the gate OUT2 to drive the transistor 506. The transistor 506, together with the resistors R15, R16, generates the translated voltage level of the incoming signal at the gate 402. If an incoming signal from the gate 400 is to be translated, the PLD 408 outputs a high voltage signal through the gate OUT1 to drive the transistor 504. The transistor 504, together with the resistors R13 , R14, generates the translated voltage level of the incoming signal at gate 402. If the bidirectional voltage translator 102 is a 3V to 5V transistor, suitable values for resistors R13, R14, R15, R16 include 2.2 kO, 10 kO, 2.2 kO and 10 kO, respectively. It will be recognized that other values can be used for resistors R13-R16.

The bidirectional voltage translator 102 has been illustrated in Figs. 1-6 as directed to a single wire. That is, cables 106,110 illustrate unique bidirectional cables. It will be recognized that the above implementations may be compatible with collective lines employing multiple cables, for example the Three Cables Collective Line used in the radiotelephone products manufactured and sold by Motorola Inc. For example, the full embodiment of Figs. 3 can be repeated for each line of a multiple collective line. Alternatively, the regulators can be repeated and a single regulator, for example the regulator 214 of Fig.2, can be used to control the regulators in one direction and another single regulator, for example the regulator 215 of Fig.2, can be used to control the regulators in the other direction. With respect to the embodiment of Figs. 4-6, all components except the PLD and the stopwatch would be repeated for each additional line of a multiple collective line. That is, each additional line requires four regulators, four stop circuits and a state machine.

Accordingly, a bidirectional voltage translator can be implemented which allows two electronic devices with compatible voltage levels to transmit over a single bidirectional cable without using a separate directional control line. This allows the bidirectional voltage translator to be used without adding additional cables to existing wiring or additional hardware to electronic devices. The bidirectional voltage translator can use a synchronous state machine or discrete components to determine the direction of data translation based only on the detection of signals on the doors. Once the direction of the data is determined, the bidirectional voltage translator is protected against closure by disabling the portion of the translator that is not being used to translate the data.

Claims (10)

1. A bidirectional voltage translator (102) characterized by: a first gate (200) for transmitting a signal at a first voltage level; a second gate (202) for transmitting a signal to i a second voltage level, the second voltage level is different from the first voltage level; and a bidirectional translator circuit (208-215) coupled to the first door and the second door, the bidirectional translator circuit, after detecting a first door signal input to a first voltage level in the first door, translates the signal from first door to a second voltage level in the second door and disables the translation of a signal in the second door to the first door, and the bidirectional translator circuit, after detecting a second door signal input to the second voltage level of the second door. the second door, translates the second door signal to the first voltage level of the first door and disables the translation of a signal in the first door to the second door.

2. A bidirectional voltage translator according to claim 1 characterized in that the bidirectional translator circuit comprises: circuits (214,215) for detecting a first of the first and second gate signal, and disabling the transmission of the other of the first and second signal door while the first one is present.

3. A bidirectional voltage translator according to claim 2, characterized in that the circuit for detecting comprises discrete components.

4. A bidirectional voltage translator according to claim 2, characterized in that the circuit for detecting comprises a state machine (500).

5. A bidirectional voltage translator according to claim 1, characterized in that the bidirectional translator circuit comprises: a first unidirectional regulator (212) including a first input (216), a first output (220) and a first impulse command gate ( 224), the first input coupled to the first door, the first output coupled to the second door, the first unidirectional regulator, absent a first disabling signal in the first control pulse door, translates the first door signal to the second level of control. tension in the second door; and a second unidirectional regulator (213) including a second input, a second output (222) and a second control pulse gate (226), the second input coupled to the second door, the second output coupled to the first output, the second unidirectional regulator, absent a second disabling signal in the second command pulse gate, translates the second gate signal to the first voltage level in the first gate.

6. A bidirectional voltage translator according to claim 5, characterized in that the bidirectional translator circuit comprises: a third unidirectional regulator (214) including a third input (232), a third output (236) and a third command pulse gate (240), the third input coupled to the first door, the third output coupled to the second control pulse gate of the second unidirectional regulator, the third control pulse gate coupled to the first control pulse gate of the first regulator unidirectional, the third unidirectional regulator, after detecting the first gate signal at the first voltage level and absent the first disabling signal at the third command pulse gate, generates the second disabling signal at the third output.

7. A bi-directional voltage translator according to claim 5, characterized in that the bidirectional translator circuit comprises: a fourth unidirectional regulator (215) including a fourth input (234), a fourth output (238) and a fourth command pulse gate ( 242), the fourth input coupled to the second drive gate, the fourth output coupled to the first drive command gate of the first unidirectional drive, the fourth drive command gate coupled to the second drive command gate of the second unidirectional drive, the fourth unidirectional regulator, after detecting the second door signal at the second voltage level in the second door and absent the second disable signal in the second impulse control door, generates the first disabling signal in the fourth output.

8. A bidirectional voltage translator according to claim 1, characterized in that the bidirectional translator circuit has a first propagation delay when it translates the first door signal to the second voltage level in the second door and translates the second door signal to the first level of voltage in the first door, and a second propagation delay when it detects the first door signal input to the first voltage level in the first door and detects the second door signal input to the second voltage level in the second door, the first propagation delay is greater than the second propagation delay.

9. An accessory (112) characterized by: accessory circuit (108) operating at a first voltage level; a first gate for transmitting signals at a first voltage level; a second door for connecting with an electronic device (104), the second door for transmitting signals at a second voltage level, the second voltage level different from the first voltage level; and bidirectional translator circuit (102) coupled to the first door and the second door, the bidirectional translator circuit, after detecting a first door signal input to the first voltage level in the first door of the electronic device, translates the first signal door to the second voltage level in the second door and disables the translation of a signal in the second door to the first door and the bidirectional translator circuit, after detecting a second door signal input, to a second voltage level in the second door. second accessory circuit door, translates the second door signal to the first voltage level in the first door and disables the translation of a signal in the first door to the second door.

10. An accessory according to claim 9 characterized in that the bidirectional translator circuit comprises: circuits (214,215) for detecting a first of the first door signal and second door signal and disabling the transmission of the other of the first door signal and signal of second door while the first is present.