LU92299A1 - Capacitive sensing system - Google Patents

Capacitive sensing system Download PDF

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Publication number
LU92299A1
LU92299A1 LU92299A LU92299A LU92299A1 LU 92299 A1 LU92299 A1 LU 92299A1 LU 92299 A LU92299 A LU 92299A LU 92299 A LU92299 A LU 92299A LU 92299 A1 LU92299 A1 LU 92299A1
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LU
Luxembourg
Prior art keywords
input
error amplifier
output
multiplexer
voltage
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LU92299A
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French (fr)
Inventor
Laurent Lamesch
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Iee Sarl
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Priority to LU92299A priority Critical patent/LU92299A1/en
Publication of LU92299A1 publication Critical patent/LU92299A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/945—Proximity switches
    • H03K17/955—Proximity switches using a capacitive detector
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/9401—Calibration techniques
    • H03K2217/94031—Calibration involving digital processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/96—Touch switches
    • H03K2217/9607—Capacitive touch switches
    • H03K2217/960755—Constructional details of capacitive touch and proximity switches
    • H03K2217/960765—Details of shielding arrangements

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Description

REVENDICATION DE LA PRIORITE de la demande de brevet Ën~ ~~~ ~~CLAIMING THE PRIORITY OF THE PATENT APPLICATION IN ~~~~~~

Du _Of _

No._ Mémoire Descriptif déposé à l’appui d’une demande deNo._Summary Description filed in support of an application for

BREVET D’INVENTION auPATENT OF INVENTION at

Luxembourg au nom de : IEE International Electronics & Engineering S.A.Luxembourg on behalf of: IEE International Electronics & Engineering S.A.

Zone Industrielle L-6468 ECHTERNACH pour : «Capacitive sensing system».Industrial Zone L-6468 ECHTERNACH for: "Capacitive sensing system".

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CAPACITIVE SENSING SYSTEMCAPACITIVE SENSING SYSTEM

Technical field [0001] The present invention generally relates to the technical field of capacitive measurement circuits and more specifically to a capacitive sensing system having one or more electrodes, in which the characteristics of a conductive body such as shape and location are determined by means of capacitive coupling via the electrically conductive body. The present invention particularly relates to a capacitive sensing circuit with low input impedance and high dynamic input current range.TECHNICAL FIELD [0001] The present invention relates to the field of capacitive measurement and capacitive sensing. capacitive coupling via the electrically conductive body. The present invention particularly relates to a capacitive sensing circuit with low input impedance and high dynamic input current range.

Background Art [0002] Capacitive measurement and/or detection systems have a wide range of applications, and are among others widely used for the detection of the presence and/or the position of conductive body in the vicinity of an electrode of the system. A capacitive sensor, called by some electric field sensor or proximity sensor, designates a sensor, which generates a signal responsive to the influence of what is being sensed (a person, a part of a person’s body, a pet, an object, etc.) upon an electric field. A capacitive sensor generally comprises at least one antenna electrode, to which is applied an oscillating electric signal and which thereupon emits an electric field into a region of space proximate to the antenna electrode, while the sensor is operating. The sensor comprises at least one sensing electrode - which could comprise the one or more antenna electrodes themselves - at which the influence of an object or living being on the electric field is detected.Background Art [0002] Capacitive measurement and / or detection systems have a wide range of applications, and are among others widely used for the detection of the presence and / or the position of conductive body in the vicinity of an electrode of the system. A capacitive sensor, called by some electric field sensor or proximity sensor, designates a sensor, which generates a signal responsive to the influence of what is being sensed (a person, a part of a person's body, a pet, an object, etc.). ) upon an electric field. A capacitive sensor understood at least one of an antenna electrode, to which is applied an oscillating electric signal and which thereupon emits an electric field into a region of space proximate to the antenna electrode, while the sensor is operating. The sensor included at least one sensing electrode - which could be understood to be one or more of the electrodes themselves - and to which the influence of an object or living being on the electric field is detected.

[0003] The technical paper entitled “Electric Field Sensing for Graphical Interfaces" by J. R. Smith, published in Computer Graphics I/O Devices, Issue May/June 1998, pp 54-60 describes the concept of electric field sensing as used for making non-contact three-dimensional position measurements, and more particularly for sensing the position of a human hand for purposes of providing three dimensional positional inputs to a computer. Within the general concept of capacitive sensing, the author distinguishes between distinct mechanisms he refers to as "loading mode", "shunt mode", and "transmit mode" which correspond to various possible electric current pathways. In the "loading mode", an oscillating voltage signal is applied to a transmit electrode, which builds up an oscillating electric field to ground. The object to be sensed modifies the capacitance between the transmit electrode and ground. In the “shunt mode”, which is alternatively referred to as “coupling mode”, an oscillating voltage signal is applied to the transmit electrode, building up an electric field to a receive electrode, and the displacement current induced at the receive electrode is measured, whereby the displacement current may be modified by the body being sensed. In the “transmit mode”, the transmit electrode is put in contact with the user's body, which then becomes a transmitter relative to a receiver, either by direct electrical connection or via capacitive coupling.The technical paper entitled "Electric Field Sensing for Graphical Interfaces" by JR Smith, published in Computer Graphics I / O Devices, Issue May / June 1998, pp 54-60 describes the concept of electric field sensing as used for making non -contact three-dimensional position measurements, and more particularly for sensing the position of a human hand for the purpose of providing three dimensional positions in the context of the concept of capacitive sensing. loading mode "," shunt mode ", and" transmit mode "which corresponds to various possible electric current pathways in the" loading mode ", an oscillating voltage signal is applied to a transmit electrode, which builds up an oscillating electric field to ground The object shifted in the shunt mode, which is alternatively referred to as "coupling mode", an osci The voltage signal is applied to the transmit electrode, the electrode is being measured, and the displacement current is measured by the body being sensed. In the "transmit mode", the transmit electrode is put into contact with the user's body, which becomes a transmitter relative to a receiver, either by direct electrical connection or via capacitive coupling.

[0004] The capacitive coupling is generally determined by applying an alternative voltage signal to a capacitive antenna electrode and by measuring the current flowing from said antenna electrode either towards ground (in the loading mode) or into the second electrode (receiving electrode) in case of the coupling mode. This current is usually measured by means of a transimpedance amplifier, which is connected to the sensing electrode and which converts a current flowing into said sensing electrode into a voltage, which is proportional to the current flowing into the antenna electrode.[0004] The capacitive coupling is alternatively determined by applying an alternating voltage signal to a capacitive antenna electrode and by measuring the current flow of an anode electrode in the loading mode. of the coupling mode. This current is usually measured by means of a transimpedance amplifier, which is connected to the sensing electrode and which converts current flowing into the said sensing electrode into a voltage, which is proportional to the current flowing on the antenna electrode.

[0005] Some capacitive sensing systems use a so-called guard electrode (also referred to as driven shield electrode), which is arranged adjacent the antenna electrode. The guard electrode is kept substantially at the same AC potential as the antenna electrode in order to render the antenna electrode insensitive into a particular spatial direction. Ideally, there is no AC potential difference between the guard electrode and the antenna electrode and, accordingly, no current flows there between. To achieve this in practice, the input impedance of the measurement circuitry connected to the antenna electrode has to be kept as low as possible, i.e. significantly lower than the impedance between the antenna electrode and the guard electrode. If this condition is not satisfied, a non-negligible portion of the alternating current flowing into the antenna electrode will flow into the guard electrode instead of :: the measurement circuit.[0005] Some capacitive sensing systems use a so-called guard electrode, which is arranged adjacent to the antenna electrode. The guard electrode is kept substantially at the same potential as the anode electrode in order to render the electrode electrode insensitive into a particular spatial direction. Ideally, there is no potential difference between the guard electrode and the electrode electrode, and no current flows there between. To achieve this, the input impedance of the measurement circuitry connected to the electrode electrode has been kept as low as possible, ie significantly lower than the impedance between the antenna electrode and the guard electrode. If this condition is not satisfied, a non-negligible portion of the alternating current flow of the electrode electrode will be used in the guiding electrode of the measurement circuit.

Technical problem [0006] It is an object of the present invention to provide a capacitive sensing system that can be implemented with low input impedance. This object is achieved by the invention as claimed in claim 1.It is an object of the present invention to provide a capacitive sensing system that can be implemented with low input impedance. This object is achieved by the invention as claimed in claim 1.

General Description of the Invention [0007] According to an aspect of the invention, a capacitive sensing system comprises an antenna electrode for emitting an alternating electric field in response to an alternating voltage being applied to the antenna electrode and a control and evaluation circuit. The control and evaluation circuit includes a differential transimpedance amplifier comprising a first signal input, a second signal input, a control signal input and an output. The differential transimpedance amplifier is configured to drive into the first signal input a first current such that a first voltage generated at the first signal input follows the voltage applied to the control signal input, to drive into the second signal input a second current such that a second voltage generated at the second signal input follows the voltage applied to the control signal input and to generate on the output an output signal indicative of a difference between the first and second currents. The control and evaluation circuit further includes a multiplexer (hereinafter referred to as first multiplexer), configured and arranged to switch the antenna electrode alternately to the first current input and to the second current input. The control and evaluation circuit is configured to generate an alternating reference voltage at a reference voltage node that is operatively connected to the control signal input of the transimpedance amplifier. The control and evaluation circuit includes an error amplifier having a first and a second input operatively connected to the antenna electrode and to the reference voltage node, respectively, and an output operatively connected to the control signal input of the transimpedance amplifier. The error amplifier is configured to generate on its output an error signal, which corresponds to an amplification of a voltage difference between the reference voltage node and the antenna electrode.According to an aspect of the invention, a capacitive sensing system comprising an antenna electrode for an alternating electrical field in response to an alternating voltage is applied to the anode electrode and a control circuit. The control and evaluation circuit includes a differential transimpedance amplifier comprising a first signal input, a second signal input, a control signal input and an output. The differential transimpedance ampli fi er is a con fi gured input to the first signal input to the input signal to the second signal input to the second signal input The second voltage input is a second signal input to the voltage applied to the input signal and to the output signal indicative of a difference between the first and second currents. The control and evaluation circuit further comprises a multiplexer, which is configured and arranged to switch the antenna alternately to the first current input and to the second current input. The control and evaluation is a general reference to the operation of the input signal of the transimpedance amplifier. The control and evaluation of the input and output of the input and output signals is of particular relevance to the control and input of the transimpedance amplifier. The error amplifier is an error signal, which corresponds to an amplification of a voltage difference between the reference voltage node and the antenna electrode.

[0008] In the context of the present document, a second voltage is said to follow a first voltage if an increase or a decrease of the first voltage induces an increase or a decrease, respectively, of the second voltage. As will be appreciated, the error signal delivered by the error amplifier is applied to the control input of the transimpedance amplifier. The error signal Verr being proportional to VrerVSense, where Vref designates the alternating reference voltage and Vsense designates the voltage on the antenna electrode, the transimpedance amplifier will behave in such a way as to inject a current into its first and second inputs that draws the voltage Vsense on the antenna electrode toward the voltage Vref on the reference voltage node. In other words, a negative feedback loop is achieved, which operates so as to minimize the voltage difference Vref-Vsense. A major benefit of the error amplifier and the feedback loop is that the input impedance of the control and evaluation circuit is substantially reduced in comparison with a system in which the reference voltage is applied directly to the control input of the transimpedance amplifier.[0008] In the context of the present document, a second voltage is said to follow a first voltage increase or decrease of the first voltage to increase or decrease, respectively, of the second voltage. As will be appreciated, the error signal is delivered to the control of the transimpedance amplifier. The error signal being proportional to VenerVSense, where Vref designates the alternating reference voltage and Vsense designates the voltage on the antenna electrode, the transimpedance amplifier will behave in such a way as to inject a current in its first and second inputs that draws the voltage Vense on the electrode electrode towards the voltage. In other words, a negative feedback loop is achieved, which operates to reduce the voltage difference Vref-Vsense. A major benefit of the error amplifier and the feedback loop is that the input impedance of the control and evaluation is substantially reduced in comparison with a reference voltage of the input voltage of the transimpedance amplifier.

[0009] it is worthwhile noting that a capacitive sensing system according to the invention may comprise a guard electrode operatively connected to the reference voltage node for actively shielding the antenna electrode toward a certain spatial region. It should be noted, however, that a macroscopic guard electrode is not a prerequisite for the present invention.[0009] It is worthwhile noting that a capacitive sensing system according to the invention may be understood to be an operable electrode electrode for the reference voltage node for actively shielding the antenna electrode towards a certain spatial region. It should be noted, however, that a macroscopic guard electrode is not a prerequisite for the present invention.

[0010] Preferably, the control and evaluation circuit comprises a microcontroller including an ADC input operatively connected to the output of the differential transimpedance amplifier, the microcontroller being configured and arranged for controlling switching operations of the multiplexer.[0010] Preferably, the microcontroller includes an ADC input operatively connected to the output of the differential transimpedance amplifier, the microcontroller being configured and configured for controlling switching operations of the multiplexer.

[0011] The microcontroller preferably comprises a first square wave output operatively connected to the multiplexer for controlling the switching operations thereof and a second square wave output operatively connected to the reference voltage node via a low-pass filter. The low-pass filter is preferably dimensioned such that substantially only the fundamental frequency of the square wave subsists behind the filter. The microcontroller may be configured to output, at the first and second : square wave outputs, square waves having the same frequency and to change, from time to time, the phase difference between the first and second square wave outputs. Alternatively, the microcontroller may be configured to output, at the first and second square wave outputs, square waves with frequencies differing by a frequency difference comprised in the range from 2 Hz to 1 MHz, preferably in the range from 10 Hz to 20 kHz and more preferably in the range from 100 Hz to 10 kHz.[0011] The microcontroller is a first-generation, first-generation, remote-controlled, multiplexer. The low-pass filter is preferably so much as substantially below the filter. The microcontroller may be configured to produce, at first and second: square wave outputs, square waves having the same frequency and to change, from time to time, the phase difference between the first and second square wave outputs. Alternatively, the microcontroller may be configured to produce, at first and second square wave outputs, with a frequency difference of 2 Hz to 1 MHz, preferably in the range of 10 Hz to 20 kHz and more preferably in the range from 100 Hz to 10 kHz.

[0012] According to a preferred embodiment, the control and evaluation circuit includes a second multiplexer and a third multiplexer, the second and third multiplexers having a first switching state and a second switching state. In the first switching state, the second multiplexer connects the first multiplexer with the antenna electrode while the third multiplexer connects the first input of the error amplifier with the antenna electrode. In the second switching state, the second multiplexer connects the first multiplexer with an intermediary node while the third multiplexer connects the first input of the error amplifier with the intermediary node. The microcontroller may be configured to switch the second and third multiplexers between the first and second switching states.[0012] According to a preferred embodiment, the control and evaluation circuit includes a second multiplexer and a third multiplexer, the second and third multiplexers having a first switching state and a second switching state. In the first switching state, the second multiplexer connects the first multiplexer with the antenna electrode while the third multiplexer connects the first input of the error amplifier to the antenna electrode. In the second switching state, the second multiplexer connects the first multiplexer with an intermediate node while the third multiplexer connects the first input of the error amplifier to the intermediate node. The microcontroller may be configured to switch the second and third multiplexers between the first and second switching states.

[0013] The control and evaluation circuit preferably comprises a reference branch, hereinafter referred to as first reference branch, including a series connection of an impedor (e.g. a resistor, a capacitor or an inductor of known complex impedance) and a switch, the first reference branch being connected between the intermediary node and a ground conductor. The switch is preferably controlled by the microcontroller. As will be appreciated, the first reference branch may be used for calibrating the control and evaluation circuit.[0013] The control and evaluation circuit including a reference branch, hereinafter referred to as a reference reference, a connection to an impedance (a resistor, a capacitor or an inductor of a known complex impedance) and a switch, the first reference branch being connected between the intermediary node and a ground conductor. The switch is most controlled by the microcontroller. As will be appreciated, the first reference can be used for calibrating the control and evaluation circuit.

[0014] The control and evaluation circuit preferably comprises a reference branch, hereinafter referred to as second reference branch, including a series connection of an impedor (e.g. a resistor, a capacitor or an inductor of known complex impedance) and a switch, the second reference branch being connected between the antenna electrode and a ground conductor. It should be noted that the second reference branch is independent from the first reference branch. Generally, in the context of the present description, the terms “first”, “second”, “third” etc. are solely intended for distinguishing different entities of the same type and should not be understood to ; ; imply any hierarchical order.[0014] The control and evaluation circuit including a reference branch, hereinafter referred to as a second reference branch, including a series connection of an impedance (eg a resistor, a capacitor or an inductor of known complex impedance) and a switch, the second reference branch being connected between the anode electrode and a ground conductor. It should be noted that the second reference is independent of the first reference branch. Generally, in the context of the present description, the terms "first", "second", "third" etc. are only intended for distinguishing different entities of the same type and should not be understood to; ; imply any hierarchical order.

[0015] According to a preferred embodiment, the error amplifier comprises a bipolar : junction transistor with a base, an emitter and a collector, the base being the first input of the error amplifier, the emitter being the second input of the error amplifier and the collector being connected to the output of the error amplifier. According to a more preferred embodiment, the error amplifier comprises a bipolar junction transistor with a base, an emitter and a collector, a field-effect transistor with a gate, a source and a drain, and a resistor, the gate being the first input of the error amplifier, the emitter being the second input of the error amplifier, the collector being the output of the error amplifier, the source being connected to the base, the drain being connected to the output of the error amplifier, and the base being connected to the second input of the error amplifier via the resistor.[0015] According to a preferred embodiment, the error amplifier comprises a bipolar: junction transistor with a base, an emitter and a collector, the base being the first input of the error amplifier, the emitter being the second input of the error amplifier the collector being connected to the output of the error amplifier. According to a more preferred embodiment, the error amplifier comprises a bipolar junction transistor with a base, an emitter and a collector, a field-effect transistor with a gate, a source and a drain, and a resistor, the gate being the first input of the error amplifying, the emitter being the second input of the error amplifier, the collector being the output of the error, the source being connected to the base, the drain being connected to the output of the error amplifier, and the base being connected to the second input of the error amplifier via the resistor.

Brief Description of the Drawings [0016] A preferred embodiment of the invention will now be described, by way of example, with reference to the accompanying drawings, in which:Brief description of the Drawings [0016] A preferred embodiment of the invention will be described, by way of example, with reference to the following drawings, in which:

Fig. 1 is a block schematic diagram of a first preferred embodiment of a capacitive sensing system in accordance with the invention;Fig. 1 is a block schematic diagram of a first preferred embodiment of a capacitive sensing system in accordance with the invention;

Fig. 2 is a block schematic diagram of a second preferred embodiment of a capacitive sensing system in accordance with the invention;Fig. 2 is a block diagram of a second preferred embodiment of a capacitive sensing system in accordance with the invention;

Fig. 3 is a block schematic diagram of a third preferred embodiment of a capacitive sensing system in accordance with the invention; andFig. 3 is a block schematic diagram of a third preferred embodiment of a capacitive sensing system in accordance with the invention; and

Fig. 4 is a block schematic diagram of a fourth preferred embodiment of a capacitive sensing system in accordance with the invention.Fig. The following is a schematic diagram of a preferred embodiment of a capacitive sensing system according to the invention.

[0017] Whenever in the description it is referred to terms like “left", “right’’, “upper", “lower”, “top”, “bottom”, or the like, it shall be understood that these terms reflect the relative orientations of elements in the drawings and that they are not intended to be limiting regarding possible arrangements of the elements in any actual embodiment.[0017] Whenever in the description it is referred to as "left", "right", "upper", "lower", "top", "bottom", or the like, it is understood that these terms reflect The relative orientations of the elements in the drawings and the fact that they are not intended to be

Description of Preferred Embodiments [0018] Fig. 1 illustrates a first preferred embodiment of a capacitive sensing system. Reference number 1 designates the electrical equivalent circuit of the antenna electrode, which couples to ground via an a priori unknown (complex) impedance 4 (“impedance to be measured"). Node 2 represents the so-calied sense node, which is connected to the antenna electrode, and node 3 represents the so-called guard node (or reference voltage node). When a guard electrode (driven shield electrode) is used, it is connected to the guard node 3.Description of Preferred Embodiments [0018] FIG. A first embodiment of a capacitive sensing system. Reference number 1 designates the electrical equivalent of the antenna electrode, which couples to ground via a priori unknown (complex) impedance 4 ("impedance to be measured"). Node 2 represents the so-calied sense node, which is connected to The antenna electrode, and node 3 represents the so-called guard node (or reference voltage node).

[0019] The impedance to be measured 4 is typically a combination of one or more capacitance(s) and resistance(s). Reference number 5 designates the impedance . between the sense node 2 and the guard node 3. Impedance 5 may e.g. be the capacitance between the antenna electrode 1 and the guard electrode, if any. Impedance 5 may include other capacitances, for example discrete capacitors required for EMC (electromagnetic compatibility) filters, or additional impedances, e.g. if the antenna electrode 1 is an electrical seat heater and the separation between heating current path and sensing current path is achieved with a common mode choke, or power MOSFET transistors, which have a large intrinsic capacitance when switched off.The impedance to be measured is typically a combination of one or more capacitance (s) and resistance (s). Reference number 5 designates the impedance. 3. Impedance 5 may e.g. be the capacitance between the anode electrode 1 and the guard electrode, if any. Impedance 5 may include other capacitances, for example discrete capacitors required for EMC (electromagnetic compatibility) filters, or additional impedances, eg if the antenna electrode is an electrical seat heater and the separation between heating current path and sensing current path is achieved with a common mode choke, or power MOSFET transistors, which have a large intrinsic capacitance when switched off.

[0020] AC voltage source 18 generates the guard voltage (alternating reference voltage), which is typically a sine wave with a frequency comprised in the range from 10 kHz to 375 kHz and an amplitude in the range from 0.1 V to 2 V. AC voltage source 19 (also called local oscillator in mixing applications) generates the demodulation carrier for the multiplexer 6, AC voltage source 19 can for example be a square wave source. This square wave then drives the control input of multiplexer 6 in such a way that multiplexer 6 connects its left switch terminal to Its upper right switch terminal when the control input is low and connects its left switch terminal to its lower right switch terminal when the control input is high (or vice versa). According to a first option, the frequency of AC voltage source 19 is the same as the frequency of voltage source 18, while the phase between these two sources can be set externally, for example by a microcontroller 30 (not shown in Fig. 1, see Figs. 2-4), which also controls the measurement process and reads out the measurement result. When doing two separate measurements, the first one with a first phase shift between voltage sources 18 and 19, the second one with an additional phase shift of 90 degrees between voltage sources 18 and 19, the microcontroller 30 can determine the complex impedance 4 by taking into account the output voltage of the differential transimpedance amplifier 7 for the two phase shifts. According to another option, the frequency of the voltage source 18 is slightly different from the voltage source 19 (for example, the frequency difference is in the range from 100 Hz to 10 kHz), whereby a signal with a frequency equal to this frequency difference will be generated at the output of the transimpedance amplifier 7 and read by the connected microcontroller 30. The microcontroller 30 can determine the complex impedance 4 by measuring the amplitude and phase of the signal at the output of the transimpedance amplifier 7. For instance, the phase can be reconstructed by measuring the time difference between the simultaneous start of both voltage sources 18 and 19, and the zero crossings of the signal at the output of the transimpedance amplifier 7. Preferably, voltage sources 18 and 19 comprise square wave generators integrated into the microcontroller 30.[0020] AC voltage source 18 generators the voltage voltage (alternating reference voltage), which is typically a sine wave with a frequency included in the range from 10 kHz to 375 kHz and an amplitude in the range from 0.1 V to 2 V. AC voltage source 19 (also called local oscillator in mixing applications) generators of the demodulation carrier for the multiplexer 6, AC voltage source 19 can for example be a square wave source. This square wave is a multiplexer in the form of a multiplexer and a multiplexer. input is high (or vice versa). According to a first option, the frequency of AC voltage source 19 is the same as the frequency of voltage source 18, while the phase between these two sources can be set externally, for example by a microcontroller 30 (not shown in FIG. see Figs. 2-4), which also controls the measurement process and reads out the measurement result. When doing two separate measurements, the first one with an additional phase shift between voltage sources 18 and 19, the microcontroller can determine the complex impedance. In the output voltage of the differential transimpedance amplifier 7 for the two phase shifts. According to another option, the frequency of the voltage source is different from the voltage source 19 (for example, the frequency difference is in the range from 100 Hz to 10 kHz) The microcontroller 30 can determine the complex impedance 4 by measuring the amplitude and phase of the signal at the output of the transimpedance amplifier 7. For instance, the can be reconstructed by measuring the time between 18 and 19, and the zero crossings of the signal at the output of the transimpedance amplifier 7. Preferably, voltage sources 18 and 19 including square wave generators integrated into the microcontroller 30.

[0021] Multiplexer 6 switches the current flowing through the unknown impedance 4 between the two differential inputs 8 and 9 of the differential transimpedance amplifier 7. Differential transimpedance amplifier 7 has also a reference or control signal input 10. The differential transimpedance amplifier keeps the voltages at inputs 8 and 9 substantially equal to the voltage on reference signal input 10. In the illustrated embodiment, the differential transimpedance amplifier 7 comprises differential amplifiers 11, 12 and 13, typically embodied as operational amplifiers or discrete transistor amplifiers, and feedback impedances 14 and 15. The internal structure of differential transimpedance amplifier 7 shown in Fig. 1 is only an example for a possible implementation of a differential transimpedance amplifier. The internal circuit is shown to facilitate the comprehension of the overall circuit. Additional low pass filtering can also be implemented inside the differential transimpedance amplifier 7 by, for example, using a resistor in parallel to a capacitor for each one of impedances 14 and 15. The following characteristics of the differential transimpedance amplifier 7 are worthwhile noting: 1) the voltages at inputs 8, 9 and 10 are substantially identical, 2) the output voltage is equal to the difference between the input currents into inputs 8 and 9 multiplied by a constant, which can be frequency dependent for filtering purposes.Multiplexer 6 switches the current flow through the unknown impedance 4 between the two differential inputs 8 and 9 of the differential transimpedance amplifier 7. Differential transimpedance amplifier 7 also has a reference or control signal input 10. The differential transimpedance amplifier keeps the voltages at inputs 8 and 9 substantially equal to the voltage on reference signal input 10. In the illustrated embodiment, the differential transimpedance amplifiers 7 including differential amplifiers 11, 12 and 13, typically embodied as operational amplifiers or discrete transistor amplifiers, and feedback impedances 14 and 15. The internal structure of differential transimpedance amplifier 7 shown in FIG. 1 is only an example for a possible implementation of a differential transimpedance amplifier. The internal circuit is shown to facilitate understanding of the overall circuit. Additional low pass filtering can be used in the differential transimpedance ampli? Er 7 by, for example, using a resistor in parallel to a capacitor for each one of impedances 14 and 15. The following characteristics of the differential transimpedance amplifier 7 are worthwhile noting: 1 The voltages at inputs 8, 9 and 10 are substantially identical, 2) the output voltage is equal to the difference between the input currents into inputs 8 and 9 multiplied by a constant, which can be frequency dependent for filtering purposes.

[0022] Immunity against injected currents at frequencies different from the guard frequency and their odd harmonics is achieved by placing the demodulating multiplexer in front of the differential transimpedance amplifier. The differential transimpedance amplifier 7 only needs to convert DC or low frequency currents into an output voltage. It does not need toconvert signals at the guard frequency. Furthermore, to protect the differential transimpedance amplifier 7 against injected currents at frequencies different from the guard frequency and their odd harmonics, capacitors 16 and 17 are provided. These divert substantially all injected high frequency currents into the guard node 3, away from the differential transimpedance amplifier inputs 8 and 9. Placing the demodulating multiplexer in front of the differential transimpedance amplifier 7 and providing capacitors 16 and 17 guarantee the high dynamic range of the circuit, that is, the circuit can reliably measure currents flowing through the unknown impedance 4 even in the presence of unwanted injected currents which are magnitudes higher than the current to be measured. For example, a current with amplitude of 10 μΑ can be measured with acceptable error in the '. presence of an injected current with amplitude of 10 mA.[0022] Immunity against injected currents and their frequency is demodulated by the demodulating multiplexer in front of the differential transimpedance amplifier. The differential transimpedance amplifier 7 only needs to convert DC or low frequency currents into an output voltage. It does not need to convert signals to the guard frequency. Furthermore, to protect the differential transimpedance amplifiers, capacitors 16 and 17 are provided. These diversions of the differential input and output of the differential transimpedance amplifier 8 and circuit, that is, the circuit can reliably measure currents flowing through the unknown impedance 4 even in the presence of unwanted injected currents which are magnitudes higher than the current to be measured. For example, a current with amplitude of 10 μΑ can be measured with acceptable error in the '. presence of an injected current with amplitude of 10 mA.

[0023] Low input impedance of the control and evaluation circuit, in spite of the ‘on’ resistance of the multiplexer 6, is achieved thanks to providing the differential amplifier 20. Differential amplifier 20 may e.g. be an operational amplifier (as in Fig. 1) or an amplifier made of one or more discrete transistors. Differential amplifier 20 measures the voltage difference between the guard node 3 and the sense node 2, amplifies this voltage difference, and drives the reference input 10 of the differential transimpedance amplifier 7 with the amplified voltage difference. A feedback loop is thereby implemented. Differential amplifier 20 operates as the error amplifier of the feedback loop, while the differential transimpedance amplifier 7 and multiplexer 6 act as the controller. The feedback loop ensures that the voltage difference between sense node and guard node is substantially cancelled. Furthermore, as a consequence of the amplification of the error signal (i.e. the voltage difference) by the error amplifier 20, the input impedance of the measurement circuit is considerably reduced in comparison with a measurement circuit in which the guard voltage is applied as the control signal of the transimpedance amplifier. Without the difference amplifier 20, the input impedance of the measurement circuit would be defined by capacitors 16 and 17, the input impedance of the differential amplifier 7 and the switch resistances of multiplexer 6. Without the difference amplifier, a significant (and unknown) part of the measurement current would thus flow across impedance 5, making it impossible, in certain applications, to measure the unknown impedance with the desired precision. The low input impedance of the measurement circuit achieved thanks to the feedback loop prevents, to a large extent, that current flows away through sense-to-guard impedance 5 and thereby substantially eliminates the error introduced by the presence of impedance 5. ft is worthwhile noting that a small fraction of the current across the unknown impedance will always be lost through impedance 5; however, due to the presence of the feedback loop, this fraction can be made sufficiently small so that it can be ignored.[0023] Low input impedance of the control and evaluation circuit, in spite of the resistance of the multiplexer 6, can be obtained by providing the differential amplifier 20. The differential amplifier 20 may be an operational amplifier (as in FIG. 1) or an amplifier made of one or more discrete transistors. Differential amplifier 20 measures the voltage difference between the guard node 3 and the sense node 2, amplifies this voltage difference, and drives the reference input of the differential transimpedance amplifier 7 with the amplified voltage difference. A feedback loop is finally implemented. Differential amplifier 20 operates as the error amplifier of the feedback loop, while the differential transimpedance amplifier 7 and multiplexer 6 act as the controller. The feedback loop ensures that the voltage difference between sense and node is substantially canceled. Furthermore, the effect of the amplification of the error signal (ie the voltage difference) by the error amplifier 20, the input impedance of the measurement circuit is reduced in comparison with a measurement circuit in which the voltage is applied to the control signal of the transimpedance amplifier. Without the difference amplifier 20, the input impedance of the measurement circuit would be defined by capacitors 16 and 17, the input impedance of the differential amplifier 7 and the resistor resistors of multiplexer 6. Without the difference amplifier, a significant (and unknown) part of the measurement current would thus for across impedance 5, making it impossible, in certain applications, to measure the unknown impedance with the desired precision. The low input impedance of the measurement circuit thanks to the feedback loops, to a large extent, that current flows away through sense-to-guard impedance 5 and this substantially eliminates the error introduced by the presence of impedance 5. ft is worthwhile noting that a small fraction of the current impedance will always be lost through impedance 5; However, the presence of the feedback loop, this fraction can be made sufficiently small that it can be ignored.

[0024] As the measurement is carried out with alternating currents and voltages, it is only important that the AC voltage difference between the sense and guard nodes 2, 3 is kept at 0 V. Although the feedback loop also controls the DC voltage difference, it is not required to keep DC voltage at 0 V. Indeed, a constant DC voltage offset between the sense and the guard nodes 2, 3 does not negatively affect the operation of the circuit.[0024] As the measurement is carried out with alternating currents and voltages, it is only important that the AC voltage difference between the sense and the guard nodes 2, 3 is kept at 0 V. Although the DC voltage difference It is not required to keep DC voltage at 0 V. Indeed, DC constant voltage between the sense and the guard nodes 2, 3 does not negatively affect the operation of the circuit.

[0025] Fig. 2 illustrates a second preferred embodiment of a capacitive sensing circuit. Antenna electrode 1 is the same as in Fig. 1. The microcontroller 30 has a square wave output 31, which drives a low-pass filter 32 and an amplifier 33. The signal at the output of amplifier 33 is the guard voltage applied to the guard node 3. Microcontroller 30 has an additional square wave output 34, which drives the control input of multiplexer 6. The signal at output 34 is the demodulation carrier. Capacitors 18 and 17 in Fig. 2 serve the same purpose as in the embodiment shown in Fig. 1.[0025] FIG. A second embodiment of a capacitive sensing circuit. Antenna electrode 1 is the same as in FIG. 1. The microcontroller 30 has a square wave output 31, which drives a low-pass filter 32 and an amplifier 33. The signal at the output of the amplifier 33 is the guard voltage applied to the guard node 3. Microcontroller 30 has an additional square wave output 34, which drives the control input of the multiplexer 6. The signal at output 34 is the demodulation carrier. Capacitors 18 and 17 in Fig. 2 serve the purpose in the embodiment shown in Fig. 1.

[0026] The differential transimpedance amplifier 7 comprises transistors 35 and 36, bias resistors 37 and 38, collector resistors 39 and 40, operational amplifier 41, resistors 42 and 43 and capacitors 44 and 45. DC voltage source 46 supplies power to the differential transimpedance amplifier. DC voltage source 47 supplies a DC voltage reference. Resistors 48 and 49 are the bias resistors for reference input 10 of the differential transimpedance amplifier 7. They also determine the collector impedance for transistor 50. Transistor 50 fulfills the function of the differential amplifier 20 in Fig. 1. Capacitor 51 AC-couples the node between resistors 48 and 49 to the guard node 3. A substantially larger collector load is thereby presented to transistor 50 which is also operating at guard potential through its emitter connected to guard node 3, compared to the impedance of resistor 49 alone connected to voltage source 46.The differential transimpedance amplifier 7 including transistors 35 and 36, bias resistors 37 and 38, collector resistors 39 and 40, operational amplifier 41, resistors 42 and 43 and capacitors 44 and 45. DC voltage source 46 power supplies to the differential transimpedance amplify. DC voltage source 47 supplies DC voltage reference. Resistors 48 and 49 are of the differential impedance for transistor 50. Transistor 50 fulfills the function of the differential amplifier 20 in FIG. 1. Capacitor 51 AC-couples the node between resistors 48 and 49 to the guard node 3. A substantially larger collector load is that it is also present to the transistor. impedance of resistor 49 alone connected to voltage source 46.

[0027] Indeed, in the shown embodiment, the upper terminal of resistor 49 has substantially guard potential. This implies that the error current generated by the error amplifier 50, that is the AC collector current of transistor 50, is converted via resistor 49 into an error voltage referenced to the guard voltage. The resulting AC voltage at the bases of transistors 35, 36 is the sum of the guard voltage and the error voltage, if the top terminal of resistor 49 was connected to the positive supply voltage instead, the error current required to generate the same voltage at the bases of transistors 35, 38 would be significantly larger, as it would have to additionally generate the guard voltage at the bases of transistors 35, 36. This would impiy a greatly reduced loop gain of the feedback loop.Indeed, in the embodiment, the upper terminal of resistor 49 has substantially guard potential. This implies that the current error generated by the error amplifier 50, which is the AC current collector of transistor 50, is converted via resistor 49 into an error voltage referenced to the voltage voltage. The resulting AC voltage at the bases of transistors has been reported to be the source of voltage. The bases of transistors 35, 38 would be significantly larger, as it would be more generally generated by the voltage of the bases of transistors 35, 36. This would greatly reduce the loop gain of the feedback loop.

[0028] The DC operating points of each of transistors 35 and 36, when enabled by multiplexer 6, are substantially defined by resistances 37, 38 and the forward voltage of the base-emitter (BE) junction of transistor 50 through the feedback loop made of transistor 50, transistors 35 and 36 and multiplexer 6:The DC operating points of each of the transistors 35 and 36, when enabled by multiplexer 6, are substantially defined by resistances 37, 38 and the forward voltage of the base-emitter (BE) junction of transistor 50 through the feedback loop made of transistor 50, transistors 35 and 36 and multiplexer 6:

Ie35 = VbE50/R37 Ie36 = VbE50/R38, where Ie35 and Ie3b are the emitter currents of transistors 35 and 36 respectively, Vbeso is the BE forward junction voltage of transistor 50 and R37 and 1½ are the resistances of resistors 37 and 38 respectively. Through the feedback loop, transistor 50 keeps the DC voltage difference between sense and guard nodes equal to its BE forward junction voltage.Ie35 = VbE50 / R37 Ie36 = VbE50 / R38, where Ie35 and Ie3b are the emitter currents of transistors 35 and 36 respectively, Vbeso is the BE forward junction voltage of transistor 50 and R37 and 1½ are the resistances of resistors 37 and 38 respectively. Through the feedback loop, transistor 50 keeps the DC voltage difference between sense and guard nodes

[0029] The current to be measured is the AC current flowing through unknown impedance 4. Thanks to the low input impedance of the measurement circuit, substantially the same current flows into multiplexer 6. Multiplexer 6 demodulates or rectifies the current to be measured by routing it into capacitor 16 and input 9 during one half of the local oscillator period and into capacitor 17 and input 8 during the second half of the local oscillator period. Substantially all of the rectified current flows into or out of inputs 8 and 9. Resistors 37 and 38 are chosen such that their resistances are substantially larger than the emitter input impedance of transistors 35 and 36. Consequently, substantially all rectified current flows into or out of the emitters of transistors 35 and 36. Substantially the same current thus flows out of or into the collectors of transistors 35 and 36. Current losses due to the base currents can be neglected in this application. Resistors 39, 40, 42, 43 and operational amplifier 41 convert the difference of the collector currents into a voltage at the output of operational amplifier 41. Preferably, the resistances 40 and 39 are chosen to be substantially identical, and resistances 42 and 43 are preferably also chosen substantially identic»!. In this case, the voltage at the output of operational amplifier 41 is equal to V47 + R42 * Alc, where R42 is the value of resistance 42 (and resistance 43), V47 is the voltage of voltage source 47 and Alc is the difference of the collector currents of transistors 35 and 36. The voltage at the output of operational amplifier 41 is, therefore, indicative of the unknown current to be measured. Capacitors 44 and 45 together with resistors 42 and 43 form a low-pass filter, and are chosen to be substantially identical.The current to be measured is the AC current flowing through the unknown impedance 4. Thanks to the low input impedance of the measurement circuit, substantially the same current flows to the multiplexer 6. Multiplexer 6 demodulates or rectifies the current to be measured by routing it into capacitor 16 and input 9 during the second half of the local oscillator period and into capacitor 17 and input 8 during the second half of the local oscillator period. Substantially all of the rectified current flows into or out of inputs 8 and 9. Resistors 37 and 38 are substantially more important than the output impedance of transistors 35 and 36. of the emitters of transistors 35 and 36. Current losses due to the currents can be neglected in this application. Resistors 39, 40, 42, 43 and operational amplifier 41. preferably, the resistances 40 and 39 are chosen to be predominantly identical, and resistances 42 and 43 are also chosen substantially identic "!. In this case, the voltage at the output of operational amplifier is equal to V47 + R42 * Alc, where R42 is the value of resistance 42, and V47 is the voltage of voltage source 47 and Alc is the difference of the collector currents of transistors 35 and 36. The voltage is the output of operational amplifier 41 is, therefore, indicative of the unknown current to be measured. Capacitors 44 and 45 together with resistors 42 and 43 form a low-pass filter, and are chosen to be substantially identical.

[0030] The transistor 50 converts the AC voltage difference between the sense node 2 and the guard node 3 into an AC collector current indicative of that voltage difference. As the top connection of resistor 49 is substantially kept at guard voltage by capacitor 51, which has at the carrier frequency an impedance substantially smaller than the impedance of resistor 49 and also resistor 48, the AC collector current is converted via resistor 49 into an AC voltage fed into the bases of transistors 35 and 36. The emitters of transistors 35 and 36 follow the voltage on their bases, and the AC feedback loop is closed through multiplexer 6. As a result, the voltage difference between sense and guard is kept substantially at OV AC.The transistor 50 converts the AC voltage difference between the sense node 2 and the guard node 3 into an AC collector current indicative of that voltage difference. As the top connection of resistor 49 is more important than that of capacitor 51, which has a higher frequency impedance than the impedance of resistor 49 and also resistor 48, the AC collector is converted via resistor 49 into an AC Voltage fed into the bases of transistors 35 and 36. The emitters of transistors 35 and 36 follow the voltage on their bases and the AC feedback loop is closed through the multiplexer. at OV AC.

[0031] Another preferred embodiment of a capacitive sensing circuit is shown in Fig. 3. The bipolar transistor 50 in Fig. 2 has the disadvantage that any high-frequency voltage appearing between the sense and guard nodes 2, 3 due to the application of an external electromagnetic high-frequency field to the sensor, or the injection of a high-frequency current (Bulk Current Injection test or BCI test), will be rectified by the BE junction of the transistor 50, due to its exponential relation between BE voltage and collector current. One option to address this problem would be to replace the bipolar transistor with a field effect transistor, which has at most a second order polynomial relation between its gate-source voltage and drain current. One disadvantage is however that the transconductance of a field effect transistor is appreciably smaller than the transconductance of a comparable bipolar transistor. For example, a BF862 field-effect transistor has approximately only one quarter of the transconductance of a 2N3904 bipolar transistor, when both are operating at the same collector current of 3 mA. In the embodiment of Fig. 3, transistor 50 (Fig. 2) is therefore replaced with field effect transistor 52, bipolar transistor 53 and resistor 54. Field-effect transistor 52, which can be a junction field effect transistor or a Mosfet, is operated at substantially constant drain current due to the fact that the voltage across resistor 54 amounts to the BE forward voltage of transistor 53, which is substantially constant for the purpose of this circuit. As field-effect transistor 52 is operated at constant drain current, the AC voltage on its source terminal follows the AC voltage at its gate terminal. Consequently, the voltage on the base of transistor 53 follows the voltage on the sense node 2. Transistor 53 plays the same role as transistor 50 in Fig. 2.[0031] Another preferred embodiment of a capacitive sensing circuit is shown in FIG. 3. The bipolar transistor 50 in FIG. 2 has the disadvantage that any high-frequency voltage appearing between the sense and guard nodes 2, 3 due to the application of an external electromagnetic high-frequency field to the sensor, or the injection of a high frequency current (Bulk Current Injection test or BCI test), will be rectified by the BE junction of the transistor 50, due to its exponential relationship between BE voltage and current collector. One option to address this problem would be to replace the bipolar transistor with a field effect transistor, which has a higher order polynomial relationship between its gate source voltage and drain current. One disadvantage is that the transconductance of a transistor field is appreciably smaller than the transconductance of a comparable bipolar transistor. For example, a BF862 field-effect transistor has a transient 2N3904 bipolar transistor, when both are operating at the same collector current of 3 mA. In the embodiment of Fig. 3, transistor 50 (Fig. 2) is a transistor 52, bipolar transistor 53 and resistor 54. Field-effect transistor 52, which can be a junction field effect transistor or a Mosfet, is operated at substantially constant current drain The value of the voltage across the transistor is 53%, which is substantially constant for the purpose of this circuit. As field-effect transistor 52 is operated at constant drain current, the AC voltage on its source terminal follows the AC voltage at its gate terminal. Therefore, transistor voltage plays the same role as transistor 50 in FIG. 2.

[0032] Another disadvantage of the circuit illustrated in Fig. 2 is that part of the measured impedance is an offset impedance, mainly caused by the internal capacitance of the multiplexer 6 between its switch terminals and circuit ground. Due to production tolerances, the offset impedance has to be considered unknown. If not compensated for, the offset impedance appears as an error in the measurement of the unknown impedance 4. The multiplexers 55, 56, resistors 57, 58 and capacitor 59 are provided in the embodiment illustrated in Fig. 3 to address this problem. Multiplexers 55 and 56 are controlled via their control input by output port 65 of microcontroller 30. During the normal measurement (i.e. the measurement of the unknown impedance 4), multiplexers 55 and 56 are switched to their upper positions. Multiplexer 55 has a certain ‘on’ resistance, which would normally be added to the input impedance of the measurement circuit. However, as multiplexer 56 routes the input of the feedback error amplifier (transistors 52, 53 and resistor 54) to the sense node 2, the ‘on‘ resistance of multiplexer 55 is located inside the feedback loop, and is thus virtually eliminated. During the normal measurement, the measurement circuit measures the sum of the unknown impedance and the offset impedance. During a so-called offset impedance measurement, microcontroller 30 switches both multiplexers 55 and 56 to their lower positions. The impedances between the upper left terminals and ground are substantially equal to the impedances between the lower left terminals and ground. It follows that in this switching state of the multiplexers 55 and 56, the measurement circuit measures only the unwanted offset impedance. The microcontroller 30 then subtracts the unwanted offset impedance from the measured sum of unknown impedance 4 and offset impedance, yielding only the unknown impedance 4. Resistors 57 and 58 keep the DC voltage of both lower and upper left terminals of multiplexers 55 and 56 at a defined DC potential, irrespective of the multiplexer positions. Capacitor 59 guards the node between resistors 57 and 58 and prevents that the unknown impedance measurements and the offset impedance measurements interfere through resistors 57 and 58.[0032] Another disadvantage of the circuit illustrated in FIG. 2 is that part of the impedance measured by the internal capacitance of the multiplexer. Due to production tolerances, the offset impedance has been considered unknown. The multiplexers 55, 56, resistors 57, 58 and capacitor 59 are provided in the illustrated embodiment in FIG. 3 to address this problem. Multiplexers 55 and 56 are controlled by their control input by output port 65 of microcontroller 30. During the normal measurement (i.e. the measurement of the unknown impedance 4), multiplexers 55 and 56 are switched to their upper positions. Multiplexer 55 has a certain resistance, which would normally be added to the input impedance of the measurement circuit. However, to multiplex 56 routes to the input of the feedback error amplifier (transistors 52, 53 and resistor 54) to the sense node 2, the 'on' resistance of multiplexer 55 is located within the feedback loop, and is thus substantially eliminated. During the normal measurement, the measurement of the impedance and the impedance. During a so-called offset impedance measurement, microcontroller 30 switches both multiplexers 55 and 56 to their lower positions. The impedances between the upper and the lower side of the earth are substantially equal to the impedances between the lower and the left. It follows that in this switching state of the 55 and 56 multiplexers, the measurement circuit measures only the unwanted offset impedance. The microcontroller 30 then subtracts the impedance impedance of the impedance of the impedance of the impedance. 4. Resistors 57 and 58 keep the DC voltage of both lower and upper bounds of the multiplexers 55 and 56 at a defined DC potential, irrespective of the multiplexer positions. Capacitor 59 guards the node between resistors 57 and 58 and prevents impedance measurements and the impedance measurements interfere through resistors 57 and 58.

[0033] Another disadvantage of the circuit in Fig. 2 is that any imbalance between the two measurement paths (input 8 to output and input 9 to output) of the differential transimpedance amplifier 7 may lead to a reduction of the measurement range of the measurement circuit due to saturation. The transconductance of the differential transimpedance amplifier 7 can be appreciably large. For example, the collector current difference of transistors 35, 36 corresponding to a full measurement range could be 10 μΑ, while the DC bias operating current of both transistors might be 1 mA. In this case, an imbalance of the DC operating current of 1 % due to a mismatch of transistors 35, 36 or a mismatch of resistors 37, 38 would cause an error output signal equal to the full measurement range.[0033] Another disadvantage of the circuit in FIG. 2 is that any imbalance between the two measurement paths (input 8 to output and input 9 to output) of the differential transimpedance amplifier 7 may lead to a reduction in the measurement of the measurement circuit due to saturation. The transconductance of the differential transimpedance amplifier 7 can be appreciably wide. For example, the collector current difference of transistors 35, corresponding to a full measurement range could be 10 μΑ, while the DC bias operating current of both transistors might be 1 mA. In this case, an imbalance of the DC operating current of 1% due to a mismatch of transistors 35, 36 or a mismatch of resistors 37, 38 would cause an error output signal equal to the full measurement range.

[0034] In order to compensate for imbalance, the capacitive sensing system of Fig. 3 comprises a resistor 63 and a low-pass filter 62 connected in series between one of the inputs of amplifier 41 and a pulse-width modulation (PWM) output 64 of the microcontroller 30. The microcontroller 30 measures the sum of the effects of the offset impedance and the imbalance by setting multiplexers 55 and 56 to their lower position. Microcontroller 30 then adjusts the duty cycle of its PWM output 64 until the measured output voltage of operational amplifier 41 lies at least approximately in the middle of the input range of the ADC input of the microcontroller 30. The low-pass filter 62 converts the duty cycle of PWM output 64 into a proportional DC voltage, and resistor 63 injects a corresponding current into one of the measurement paths of the differential transimpedance amplifier 7, resulting in addition to or subtraction from the output of operational amplifier 41 of a constant voltage.In order to compensate for imbalance, the capacitive sensing system of FIG. 3 including a resistor 63 and a low-pass filter 62 connected in series of one of the inputs of ampli fi er 41 and a pulse-width modulation (PWM) output 64 of the microcontroller 30. The microcontroller 30 measures the sum of the effects of the offset impedance and the imbalance by setting multiplexers 55 and 56 to their lower position. Microcontroller 30 then adjusts the duty cycle of its PWM output to the ADC input of the microcontroller 30. The low-pass filter 62 converts the duty The pulse cycle of PWM output gives a proportional DC voltage, and resistor 63 injects a corresponding current of one of the measurement paths of the differential transimpedance amplifier 7, resulting in addition to or subtraction from the output of operational amplifier of 41 of a constant voltage.

[0035] Impedance 61, which is supposed to have a known value, and switch 60 allow the microcontroller 30 to calibrate the measurement circuit. To this end, microcontroller 30 switches multiplexers 55 and 56 to their lower switching position, and switches on switch 60 through output port 66. The voltage at the output of the operational amplifier 41, fed to the ADC input of microcontroller 30, is now indicative of the sum of the known reference impedance 61 and the offset impedance. Since the offset impedance can be measured as described above, the microcontroller 30 can calculate an empirical value of the reference impedance 61. As the reference impedance is known a priori and the empirical value is also known, the microcontroller 30 can calculate the overall (complex-valued) gain of the measurement circuit by dividing the empirical value by the a priori known value. The microcontroller is preferably configured to divide the measurements of the unknown impedance 4 and the offset impedance by the gain factor in order to obtain calibrated measurement values.[0035] Impedance 61, which is supposed to have a known value, and switch 60 allow the microcontroller 30 to calibrate the measurement circuit. To this end, microcontroller 30 multiplexer switches 55 and 56 to their lower switching position, and switches to switch 60 through output port 66. The voltage at the output of the operational amplifier 41, fed to the ADC input of microcontroller 30, is now indicative the impedance 61 and the offset impedance. Since the impedance can be measured as above, the microcontroller 30 can calculate an empirical value of the reference impedance 61. As the reference impedance is known a priori and the empirical value is also known, the microcontroller 30 can calculate the overall (complex -valued) gain of the measurement circuit by dividing the empirical value by the a priori known value. The microcontroller is more efficient than the results of the measurement of the impedance 4 and the impedance by the factor in order to obtain calibrated measurement values.

[0036] The capacitive sensing circuit of Fig. 4 uses another option for coping with imbalance between the measurement paths of the differential transimpedance amplifier 7. Capacitors 70 and 71 AC-couple the inputs of operational amplifier 41 to the collectors of transistors 35 and 36. In this way, an imbalance between the DC operating points of the collector currents does not propagate to the output of operational amplifier 41. This implies, however, that the modulation of the collector currents of transistors 35 and 36 is compulsory in this embodiment (because the capacitors 70 and 71 block DC and low-frequency components of the collector currents). Accordingly, whereas a static measurement (with multiplexers 55 and 56 in one switching state during the measurement) is possible with the embodiments of Figs. 1 to 3, such measurement cannot be successfully carried out with the embodiment of Fig. 4. Therefore, microcontroller 30 has to switch continually multiplexers 55, 56 between their upper and lower switch positions (e.g. with a modulation frequency in the range from 100 Hz to 10 kHz), thereby modulating the current to be measured. The microcontroller 30 now measures the amplitude of the modulated signal at the output of operational amplifier 41. This amplitude corresponds to the difference between the current flowing across the series connection of the unknown impedance 4 and the offset impedance and the current flowing across the offset impedance. This has the advantageous side effect that the (unwanted) offset impedance is automatically eliminated from the measurements.The capacitive sensing circuit of Fig. 4. Capacitors 70 and 71 AC-couple the inputs of operational amplifiers 41 to the collectors of transistors 35 and 36. In this way, an imbalance between the DC 41. This implies, however, that the modulation of the collector currents of transistors 35 and 36 is compulsory in this embodiment (because the capacitors 70 and 71 block DC and low -frequency components of the collector currents). A significant measure of static measurement (with multiplexers 55 and 56 in one switching state during measurement) is possible with the embodiments of Figs. 1 to 3, such measurement can not be carried out with the embodiment of Fig. 4. Therefore, microcontroller 30 has to switch continually multiplexers 55, 56 between their upper and lower switch positions (e.g. with a modulation frequency in the range from 100 Hz to 10 kHz), thus modulating the current to be measured. The microcontroller 30 now measures the amplitude of the modulated signal at the output of operational amplifier 41. This amplitude corresponds to the difference between the current flowing of the series connection of the unknown impedance 4 and the offset impedance and the current flowing across the offset impedance . This has the advantage that the (unwanted) offset impedance is automatically eliminated from the measurements.

[0037] Furthermore, with the embodiment of Fig. 4, an alternative reference (calibration) measurement is now possible. The series connection of switch 68 and reference impedance 67 is arranged between the sense node 2 and ground. The switch 68 is controlled by output port 69 of microcontroller 30. When microcontroller 30 switches the multiplexers 55, 56 to their upper positions and keeps this position, while controlling switch 68 with a square wave (with a frequency corresponding to the modulation frequency), the amplitude of the output of operational amplifier 41 will be indicative of the reference impedance 67, independently of the unknown impedance 4 and the offset impedance. Indeed, both the unknown impedance 4 and the offset impedance can be considered static on the time scale of the modulation. It follows that any current flowing across the antenna electrode 1 will be converted into a DC current difference between collectors of transistors 35, 36 and blocked by the capacitors 70 and 71. The offset impedance is eliminated due to the differential measurement. The microcontroller 30 can determine the complex gain of the measurement circuit by dividing the measured value of the reference impedance 67 by the a priori known value. The microcontroller 30 may divide its measurements by this gain factor in order to obtain calibrated measurement values.In addition, with the embodiment of FIG. 4, an alternative reference (calibration) measurement is now possible. The series connection of switch 68 and reference impedance 67 is arranged between the sense node 2 and ground. The microcontroller 30 microcontroller 30. When microcontroller 30 switches the multiplexers 55, 56 to their positions and keeps this position, while controlling switch 68 with a square wave (with a frequency corresponding to the modulation frequency), The magnitude of the output of operational impulse is indicative of the reference impedance 67, independently of the unknown impedance 4 and the offset impedance. Indeed, both the impedance 4 and the impedance can be considered on the modulation. It follows that a current flow between collectors of capacitors 35, 36 and blocked by the capacitors 70 and 71. The offset impedance is eliminated due to the differential measurement. The microcontroller can determine the complex gain of the measurement circuit by dividing the measured value of the reference impedance 67 by the a priori known value. The microcontroller 30 can divide its measurements by this gain factor in order to obtain calibrated measurement values.

[0038] It should be remembered that, whenever reference has been made to a current measurement performed by the microcontroller 30, this means a measurement of the complex current. Such measurement of the complex current may be implemented according to any one of the methods discussed hereinabove with respect to Fig. 1. For instance, the measurement of the complex current could be performed by carrying out two separate measurements with different phase shifts between square wave outputs 31 and 34. Advantageously, the phase shifts differ by 90 degrees, in which case one would speak about I and Q measurements. Nevertheless, other phase shift differences, except 0 and 180 degrees (and any multiples of 180 degrees), between the two measurements could also be used. Alternatively, the complex current could be measured using slightly different frequencies on the square wave outputs 31 and 34.It should be remembered that this is a measurement of the current measurement performed by the microcontroller 30, this means a measurement of the complex current. Such measurement of the complex current may be implemented according to any of the methods discussed above. 1. For instance, the measurement of the complex may be carried out by the carrier and the carrier or the carrier or the employer. Advantageously, the phase shifts differ by 90 degrees, in which case one would speak about I and Q measurements. Nevertheless, other phase shift differences, except 0 and 180 degrees (and any multiples of 180 degrees), between the two measurements could also be used. Alternatively, the complex can be measured using different frequencies 31 and 34.

[0039] While specific embodiments have been described in detail, those skilled in the art will appreciate that various modifications and alternatives to those details could be developed in light of the overall teachings of the disclosure. Accordingly, the particular arrangements disclosed are meant to be illustrative only and not limiting as to the scope of the invention, which is to be given the full breadth of the appended claims and any and all equivalents thereof.While specific embodiments have been described in detail, those skilled in the art would appreciate that various modifications and alternatives to those details could be developed in the light of the overall teachings of the disclosure. Accordingly, the particular arrangements are intended to be illustrative only and not limiting to the scope of the invention, which is to be given the full breadth of the appended claims and any and all equivalents thereof.

Claims (11)

1. A capacitive sensing system, comprising an antenna electrode for emitting an alternating electric field in response to an alternating voltage being applied to said antenna electrode; and a control and evaluation circuit that includes: a differential transimpedance amplifier comprising a first signal input, a second signal input, a control signal input and an output, said differential transimpedance amplifier being configured to drive into said first signal input a first current such that a first voltage generated at said first signal input follows a voltage applied to said control signal input, to drive into said second signal input a second current such that a second voltage generated at said second signal input follows said voltage applied at said control signal input and to generate on said output an output signal indicative of a difference between said first and second currents; a multiplexer, hereinafter referred to as first multiplexer, configured and arranged to switch said antenna electrode alternately to said first current input and to said second current input; a reference voltage node operatively connected to said control signal input of said transimpedance amplifier, said control and evaluation circuit being configured to generate an alternating reference voltage at said reference voltage node; characterized in that said control and evaluation circuit includes an error amplifier having a first and a second input operatively connected to said antenna electrode and to said reference voltage node, respectively, and an output operatively connected to said control signal input of said transimpedance amplifier; said error amplifier being configured to generate on its output an error signal, which corresponds to an amplification of a voltage difference between said reference voltage node and said antenna electrode.
2. The capacitive sensing system as claimed in claim 1, wherein said control and evaluation circuit comprises a microcontroller including an ADC input operatively connected to said output of said differential transimpedance amplifier, said microcontroller being configured and arranged for controlling switching operations of said multiplexer.
3. The capacitive sensing system as claimed in claim 2, wherein said microcontroller comprises a first square wave output operatively connected to said multiplexer for controlling the switching operations thereof; and a second square wave output operatively connected to said reference voltage node via a low-pass filter.
4. The capacitive sensing system as claimed in any one of claims 1 to 3, wherein said microcontroller is configured to output, at said first and second square wave outputs, square waves having the same frequency and to change, from time to time, a phase difference between said first and second square wave outputs.
5. The capacitive sensing system as claimed in any one of claims 1 to 3, wherein said microcontroller is configured to output, at said first and second square wave outputs, square waves with frequencies differing by a frequency difference comprised in the range from 2 Hz to 1 MHz, preferably in the range from 10 Hz to 20 kHz and more preferably in the range from 10 Hz to 20 kHz.
6. The capacitive sensing system as claimed in any one of claims 1 to 5, wherein said control and evaluation circuit includes a second multiplexer and a third multiplexer, said second and third multiplexers having a first switching state in which said second multiplexer connects said first Ï multiplexer with said antenna electrode while said third multiplexer connects said .χ. first input of said error amplifier with said antenna electrode and a second switching state in which said second multiplexer connects said first ; multiplexer with an intermediary node while said third multiplexer connects said V first input of said error amplifier with said intermediary node.
7. The capacitive sensing system as claimed in claim 6, wherein said control and evaluation circuit comprises a reference branch, hereinafter referred to as first reference branch, including a series connection of an impedor and a switch, said .... first reference branch being connected between said intermediary node and a ground conductor.
8. The capacitive sensing system as claimed in any one of claims 1 to 7, wherein said control and evaluation circuit comprises a reference branch, hereinafter referred to as second reference branch, including a series connection of an impedor and a switch, said second reference branch being connected between said antenna electrode and a ground conductor.
9. The capacitive sensing system as claimed in any one of claims 1 to 8, wherein said error amplifier comprises a bipolar junction transistor with a base, an emitter and a collector, said base being said first input of said error amplifier, said emitter being said second input of said error amplifier and said collector being connected to said output of said error amplifier.
10. The capacitive sensing system as claimed in any one of claims 1 to 8, wherein said error amplifier comprises a JFET transistor or a MOSFET transistor with a gate, an source and a drain, said gate being said first input of said error amplifier, said source being said second input of said error amplifier and said drain being connected to said output of said error amplifier.
11. The capacitive sensing system as claimed in any one of claims 1 to 8, wherein said error amplifier comprises a bipolar junction transistor with a base, an emitter and a collector, a field-effect transistor with a gate, a source and a drain, and a resistor, said gate being the first input of said error amplifier, said emitter being said second input of said error amplifier, said collector being said output of said error amplifier, said source being connected to said base, said drain being connected to said output of said error amplifier, and said base being connected to said second input of said error amplifier via said resistor.
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