KR970072357A - Lead frame for semiconductor device, manufacturing method thereof and punch and die for manufacturing same - Google Patents

Lead frame for semiconductor device, manufacturing method thereof and punch and die for manufacturing same Download PDF

Info

Publication number
KR970072357A
KR970072357A KR1019970013253A KR19970013253A KR970072357A KR 970072357 A KR970072357 A KR 970072357A KR 1019970013253 A KR1019970013253 A KR 1019970013253A KR 19970013253 A KR19970013253 A KR 19970013253A KR 970072357 A KR970072357 A KR 970072357A
Authority
KR
South Korea
Prior art keywords
punch
semiconductor device
lead frame
manufacturing
region
Prior art date
Application number
KR1019970013253A
Other languages
Korean (ko)
Other versions
KR100237735B1 (en
Inventor
미노루 카와바타
카쯔지 이누이
Original Assignee
모리 카즈히로
마쯔시다덴시코교 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 모리 카즈히로, 마쯔시다덴시코교 가부시기가이샤 filed Critical 모리 카즈히로
Publication of KR970072357A publication Critical patent/KR970072357A/en
Application granted granted Critical
Publication of KR100237735B1 publication Critical patent/KR100237735B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48111Disposition the wire connector extending above another semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

본 발명은 특히 광반도체장치에 호적한 반도체장치용 리드프레임 및 그 제조방법 및 이것을 제조하기 위한 펀치 및 금형에 관한 것으로서, 오목형상부에 살붙임, 컵이빠짐 및 균열이 발생하는 일없이 다수개의 발광소자 또는 칩사이즈가 큰 발광소자를 탑재할 수 있는 반도체장치용 리드프레임의 제조방법을 제공하는 것을 목적으로한 것이며, 그 해결수단으로서, 프레스수단에 의해 띠형상금속재료의 긴쪽방향의 측면을 펀칭해서 돌기현상부를 형성하고, 이어서 이 돌기형상부의 선단부를 재료측면으로부터 평면형상의 펀치로쳐서 평탄화하고, 이어서 이 평탄화한 영역을 재료측면으로부터 만곡형상펀치로 쳐서 부채형상부를 형성하고, 이어서 이 부채형 상부의 선단부를 재료측면으로부터 볼록형상의 펀치로쳐서 오목형상부를 형성하는 것을 특징으로 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a semiconductor device suitable for an optical semiconductor device, a method for manufacturing the same, and a punch and a mold for manufacturing the same. It is an object of the present invention to provide a method for manufacturing a lead frame for a semiconductor device in which a light emitting device or a light emitting device having a large chip size can be mounted. Punching is formed to form a projection, and then the tip of the projection is flattened by a flat punch from the material side, and then the flattened area is hit with a curved punch from the material side to form a fan-shaped portion, and then this fan-shaped. A concave portion is formed by hitting the upper end portion with a convex punch from the material side. It will have to.

Description

반도체장치용 리드프레임 및 그 제조방법 및 이것을 제조하기 위한 펀치 및 금형Lead frame for semiconductor device, manufacturing method thereof and punch and die for manufacturing same

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 실시형태의 반도체장치용 리드프레임의 제조공정도, 제2도는 제1도에 있어서, 돌기형상부를 평면형상의 펀치로치는 동작을 설명하는 도면, 제3도는 본 실시형태의 만곡형상펀치 및 부채형상부의 작용을 설명하는 도면, 제4도는 본 실시형태의 금형 및 오목형상부를 표시한 사시도, 제5도는 본 실시형태의 반도체장치용 리드프레임의 오목형상부를 표시한 상면도, 제6도는 일반적인 발광다이오드의 구성을 표시한 측면도.FIG. 1 is a manufacturing process diagram of a lead frame for a semiconductor device according to the present embodiment, and FIG. 2 is a diagram for explaining the operation of turning the projection into a flat punch in FIG. 1, and FIG. 3 is a curved punch of the present embodiment. And FIG. 4 is a perspective view showing the mold and the concave portion of the present embodiment, and FIG. 5 is a top view showing the concave portion of the lead frame for a semiconductor device of the present embodiment. Side view showing the structure of a typical light emitting diode.

Claims (6)

프레스수단에 의해 반도체장치용 리드프레임을 제조하는 방법에 있어서, 띠형상금속재료의 긴쪽방향의 측면에 돌기형상부를 형성하는 공정과, 상기 돌기형상부의 선단부를 만곡형상의 펀치로쳐서 부채형상부를 형성하는 공정과, 상기 부채형상부의 선단부를 볼록형상의 펀치로쳐서 오목형상부를 형성하는 공정을 구비한 것을 특징으로 하는 반도체장치용 리드프레임의 제조방법.A method of manufacturing a lead frame for a semiconductor device by a press means, the step of forming a projection on the side of the strip-shaped metal material in the longitudinal direction, and forming a fan-shaped portion by hitting the tip of the projection with a curved punch. And a step of forming a concave portion by convex punching the distal end portion of the fan-shaped portion. 프레스수단에 의해 반도체장치용 리드프레임을 제조하는 방법에 있어서, 띠형상금속재료의 긴쪽방향의 측면에 돌기형상부를 형성하는 공정과, 상기 돌기형상부의 선단부를 평면형상의 펀치로쳐서 평탄화하는 공정과, 상기 평탄화한 영역을 만곡형상의 펀치로쳐서 부채형상부를 형성하는 공정과, 상기 부채형상부의 선단부를 볼록형상의 펀치로쳐서 오목형상부를 형성하는 공정을 구비한 것을 특징으로 하는 반도체장치용 리드프레임의 제조방법.A method of manufacturing a lead frame for a semiconductor device by a press means, comprising the steps of: forming a projection on the side of the strip-shaped metal material in the longitudinal direction, and flattening the tip of the projection by a flat punch; And forming a fan-shaped portion by punching the flattened region with a curved punch, and forming a concave portion by punching the tip portion of the fan-shaped portion with a convex punch. Way. 제1의 곡률반경을 가진 제1영역과 상기 제1의 곡률반경보다도 큰 제2의 곡률반경을 가진 제2영역으로 구성된 만곡형상영역을 구비한 것을 특징으로 하는 반도체장치용 리드프레임을 제조하기 위한 펀치.A curved shape region comprising a first region having a first radius of curvature and a second region having a second radius of curvature greater than the first radius of curvature is provided for manufacturing a lead frame for a semiconductor device. punch. 제3항에 있어서, 상기 제1영역은 상기 만곡형상영역이 바깥쪽이며, 상기 제2영역은 상기 만곡형상영역의 중앙인 것을 특징으로 하는 반도체장치용 리드프레임을 제조하기 위한 펀치.The punch for manufacturing a lead frame for a semiconductor device according to claim 3, wherein the first region has the curved region outward and the second region has a center of the curved region. 상부금형 및 하부금형으로 구성되고, 또한 상기 상부금형 및 상기 하부금형에 의해 띠형상금속재료를 고정하고, 상기 띠형상금속재료의 긴쪽방향의 측면으로부터 볼록형상의 펀치로쳐서 오목형상부를 형성하는 금형에 있어서, 상기 상부금형 및 상기 하부금형의 오목형상부형성영역의 둘레가장자리에, 상기 볼록형상의 펀치로쳤을때에 상기 오목형상부의 측벽에 발생하는 살붙임을 받아들이기 위한 우묵한 곳을 형성한 것을 특징으로하는 반도체장치용 리드프레임을 제조하기 위한 금형.In the mold which consists of an upper mold and a lower mold, and fixes a belt-shaped metal material by the said upper mold and the said lower mold, and forms a concave shape by hitting a convex punch from the side of the belt-shaped metal material in the longitudinal direction. The recess is formed at a circumferential edge of the concave portion forming region of the upper mold and the lower mold to form a recess for accommodating skin generated on the side wall of the concave portion when the convex punch is punched. A mold for manufacturing a lead frame for a semiconductor device. 리드꼭대기부에 반도체소자를 탑재하기 위한 오목형상부를 구비한 반도체장치용 리드프레임에 있어서, 상기 오목형상부의 측벽끝부분에 살붙임부를 형성한 것을 특징으로 하는 반도체장치용 리드프레임.A lead frame for a semiconductor device having a recessed portion for mounting a semiconductor element on a lead top, wherein the lead frame for the semiconductor device is formed with a dent at a sidewall end of the recessed portion. ※ 참고사항: 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the original application.
KR1019970013253A 1996-04-11 1997-04-10 Lead frame for semiconductor and manufacturing method of the same, and punches and molds for fabricating that KR100237735B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8089242A JP2871586B2 (en) 1996-04-11 1996-04-11 Lead frame for semiconductor device, method of manufacturing the same, punch and die for manufacturing the same
JP96-89242 1996-04-11

Publications (2)

Publication Number Publication Date
KR970072357A true KR970072357A (en) 1997-11-07
KR100237735B1 KR100237735B1 (en) 2000-01-15

Family

ID=13965290

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970013253A KR100237735B1 (en) 1996-04-11 1997-04-10 Lead frame for semiconductor and manufacturing method of the same, and punches and molds for fabricating that

Country Status (2)

Country Link
JP (1) JP2871586B2 (en)
KR (1) KR100237735B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004107443A1 (en) * 2003-06-03 2004-12-09 Asetronics Ag Insulated metal substrate with at least one light diode, light diode matrix and production method

Also Published As

Publication number Publication date
JP2871586B2 (en) 1999-03-17
KR100237735B1 (en) 2000-01-15
JPH09283804A (en) 1997-10-31

Similar Documents

Publication Publication Date Title
KR910002570A (en) Blank cutting device and cutting method
RU2004122410A (en) PRESS METHOD AND PRODUCT OBTAINED BY THIS METHOD
BR9812796A (en) Handle for container end and method for manufacturing it
DE59606093D1 (en) DEEP-DRAWING TOOL WITH INTEGRATED HOLDING-DOWN HOLDER
KR860000690A (en) Manufacturing apparatus and method of shadow mask
KR970072357A (en) Lead frame for semiconductor device, manufacturing method thereof and punch and die for manufacturing same
KR850003065A (en) Metal and resin holder for fixing semiconductor device to radiant radiator and manufacturing method
AR001386A1 (en) Male snap button component, particularly for clothing items.
DE50304208D1 (en) Progressive Die
KR910019192A (en) Lead frame for semiconductor device and manufacturing method
KR910019155A (en) Lead Forming Method of Semiconductor Device
KR950005400A (en) Manufacturing method of mandrel for blind rivet
KR880003370A (en) Shadow Mask Forming Device
CN1939613B (en) Stripped thorn hole turnover method, radiator fin therewith and mould thereof
KR970003895A (en) Manufacturing method of lead frame
ES2145578T3 (en) ELASTIC CONTACT TAB AND PROCEDURE FOR ITS MANUFACTURE FROM A METAL PLATE.
SU940957A1 (en) Method of producing ring part of sheet blank
JPH1147852A (en) Spacer mounting structure of synthetic resin molded goods and method therefor
KR940011101A (en) Drawing device
RU1807861C (en) Method for fabrication of cutting tool for chopping vegetables from sheet blank
JPH07142667A (en) Method of making dimple in semiconductor chip mount portion of lead frame
KR970003891A (en) Semiconductor Lead Frame Cutting Method
RU2000116690A (en) METHOD FOR STAMPING PARTS FROM SHEET BILLS ON PRESSES
KR970053691A (en) Reforming apparatus for removing burrs
KR960021238A (en) Forming method for the wide part

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20120924

Year of fee payment: 14

FPAY Annual fee payment

Payment date: 20130924

Year of fee payment: 15

LAPS Lapse due to unpaid annual fee