KR970058449A - Manufacturing method of multilayer circuit board - Google Patents
Manufacturing method of multilayer circuit board Download PDFInfo
- Publication number
- KR970058449A KR970058449A KR1019950065931A KR19950065931A KR970058449A KR 970058449 A KR970058449 A KR 970058449A KR 1019950065931 A KR1019950065931 A KR 1019950065931A KR 19950065931 A KR19950065931 A KR 19950065931A KR 970058449 A KR970058449 A KR 970058449A
- Authority
- KR
- South Korea
- Prior art keywords
- bonding pad
- layer pattern
- circuit board
- forming
- layer
- Prior art date
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
본 발명은 다층회로기판을 계단식으로 제조하는 방법에 관한 것으로 계단식으로 각 층마다 본딩패드를 구성하므로서 패키지의 하이 핀화에 대응할 수 있는 다층 회로기판을 제공하는 데 목적이 있다.The present invention relates to a method of manufacturing a multi-layered circuit board in a cascade, and an object of the present invention is to provide a multi-layered circuit board that can cope with high pinning of a package by forming a bonding pad for each layer.
이를 위해 본 발명은 기판위에 2층 패턴을 형성함과 동시에 본딩패드를 형성하는 단계와 상기 2층 패턴위에 상기 본딩패드가 노출되도록 구멍을 뚫은 프리프레그를 깔고 그 위에 구리층을 입힌 후 에칭하여 3층 패턴을 형성함과 동시에 본딩패드를 형성하는 단계와 상기 3층 패턴위에 상기 본딩패드가 노출되도록 구멍을 뚫은 프리프레그를 깔고 그 위에 구리층을 입힌 후 에칭하여 4층 패턴을 형성함과 동시에 본딩패드를 형성하는 단계로 이루어진 것을 특징으로 한다.To this end, the present invention forms a two-layer pattern on the substrate and at the same time forming a bonding pad and spreading a prepreg punched to expose the bonding pad on the two-layer pattern and coating a copper layer thereon and then etching it. Forming a layer pattern and simultaneously forming a bonding pad and spreading a prepreg punched to expose the bonding pad on the three layer pattern, coating a copper layer thereon, and etching to form a four layer pattern and bonding at the same time. Characterized in that the step of forming a pad.
이같이 구조의 본 발명은 본딩패드가 2,3,4층에 모두 형성되어 있어서 기존의 다층회로기판에 비해 2배 이상으로 본딩수를 증가시킬 수 있어 패키지의 하이 핀화에 대처가 가능하다.In the present invention having the structure as described above, the bonding pads are formed on all two, three, and four layers, so that the number of bondings can be increased more than twice as compared to the existing multilayer circuit board, thereby coping with high pinning of the package.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명의 다층회로기판의 단면도.2 is a cross-sectional view of the multilayer circuit board of the present invention.
제3도는 본 발명의 다층회로기판의 개략적인 사시도.3 is a schematic perspective view of a multilayer circuit board of the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950065931A KR970058449A (en) | 1995-12-29 | 1995-12-29 | Manufacturing method of multilayer circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950065931A KR970058449A (en) | 1995-12-29 | 1995-12-29 | Manufacturing method of multilayer circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970058449A true KR970058449A (en) | 1997-07-31 |
Family
ID=66624259
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950065931A KR970058449A (en) | 1995-12-29 | 1995-12-29 | Manufacturing method of multilayer circuit board |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970058449A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100340406B1 (en) * | 1999-10-20 | 2002-06-12 | 이형도 | A method of measuring the insulating distance between layers in a printed circuit board for rambus and a printed circuit board fabraication method using the same |
-
1995
- 1995-12-29 KR KR1019950065931A patent/KR970058449A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100340406B1 (en) * | 1999-10-20 | 2002-06-12 | 이형도 | A method of measuring the insulating distance between layers in a printed circuit board for rambus and a printed circuit board fabraication method using the same |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6872590B2 (en) | Package substrate for electrolytic leadless plating and manufacturing method thereof | |
KR100499003B1 (en) | A package substrate for electrolytic leadless plating, and its manufacturing method | |
EP1895586A3 (en) | Semiconductor package substrate | |
EP1796445A3 (en) | Multilayer printed circuit board | |
KR960042902A (en) | Printed circuit board with solder ball mounting groove and ball grid array package using the same | |
KR100298897B1 (en) | Method for manufacturing pcb | |
EP1566993A4 (en) | Circuit board, multi-layer wiring board, method for making circuit board, and method for making multi-layer wiring board | |
JP3577421B2 (en) | Package for semiconductor device | |
US20050246892A1 (en) | Fabrication method for printed circuit board | |
KR950028585A (en) | How to Form Solder Bumps on IC Mounting Boards | |
US5294755A (en) | Printed wiring board having shielding layer | |
JP3899059B2 (en) | Electronic package having low resistance and high density signal line and method of manufacturing the same | |
KR970060427A (en) | Manufacturing method of lead frame | |
US5406119A (en) | Lead frame | |
US6896173B2 (en) | Method of fabricating circuit substrate | |
JPH11233531A (en) | Structure and method for packaging electronic part | |
KR970058449A (en) | Manufacturing method of multilayer circuit board | |
JPH11274734A (en) | Electronic circuit device and its manufacture | |
JP2003273484A (en) | Connection structure | |
US6420207B1 (en) | Semiconductor package and enhanced FBG manufacturing | |
JPH0215699A (en) | Multilayer printed wiring board | |
JPH09293957A (en) | Wiring board and its solder supply method | |
JP2003249743A (en) | Wiring substrate and method of manufacturing the same, semiconductor device and electronic device | |
JP2933729B2 (en) | Printed wiring board device | |
JPH02237142A (en) | Manufacture of board for semiconductor mounting use |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |