KR970054106A - Semiconductor manufacturing method - Google Patents
Semiconductor manufacturing method Download PDFInfo
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- KR970054106A KR970054106A KR1019950065890A KR19950065890A KR970054106A KR 970054106 A KR970054106 A KR 970054106A KR 1019950065890 A KR1019950065890 A KR 1019950065890A KR 19950065890 A KR19950065890 A KR 19950065890A KR 970054106 A KR970054106 A KR 970054106A
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- plasma
- layer
- forming
- rtn
- film
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Abstract
본 발명은 반도체 제조 방법에 관한 것으로서, 본 발명은 하부 전극 위에 질화막을 형성시켜 TA205막 열처리 시 확산된 산소와의 반응을 최소화시켜서 정전 용량을 증가시킬 수 있는 반도체 제조 방법을 제공하는데 그목적을 두고 있다.The present invention relates to a semiconductor manufacturing method, and the present invention is to provide a semiconductor manufacturing method that can increase the capacitance by forming a nitride film on the lower electrode to minimize the reaction with oxygen diffused during the TA205 film heat treatment. have.
하부 전극 위에 SI 조성을 가지고 있는 유전막(SIN, SION, SIO2)인 버튼 레이어를 단일막 내지 복합 막으로 형성하는 제1스텝과, 메탈 옥사이드를 이요아여 다층의 고 유전체 막을 형성하는 제2스텝과, 다층의 고 유전체 막위에 상부 전극을 형성하여 커패서터를 완성하는 제3스텝으로 구성됨을 특징으로 한다.A first step of forming a button layer, which is a dielectric film (SIN, SION, SIO 2 ) having an SI composition, from a single layer to a composite layer on the lower electrode, a second step of forming a multilayer high dielectric film using metal oxide; And a third step of forming a capacitor by forming an upper electrode on the multi-layer high dielectric film.
또한 본 발명에 의한 반도체 제조 방법은 하부 전극 위에 버튼 레이어+고 유전 막을 형성하고 후속 열처리에 의ㅐ 버튼 레이어와 고 유전막 계면에 40Å 이하의 SIO2(or SION)막이 형ㅅㅇ하는 것을 특징으로 한다.In addition, the semiconductor manufacturing method according to the present invention is characterized in that a button layer + high dielectric film is formed on the lower electrode, and a SIO 2 (or SION) film having a thickness of 40 m or less is formed at the interface between the button layer and the high dielectric film by subsequent heat treatment.
또한 본 발명에 의한 반도체 제조 방법은 하부 전극(SI계열, SILICIDE계열)위에 버튼 레이어(SI 조성이 포함된 유전막)형성을 N2O PLASMA, RTN, NH3+N2O(O2) PLASMA, RTN+RTO, NH3PLASMA+RTO, RTN(NH3PLASMA+UV-O3, RTN(NH3PLASMA)+DRY O2등과 같은 조건을 한 개 내지 복합적으로 처리하여 단일막 내지 복합 막의 버튼 레이어를 얻는 것을 특징으로 한다.In addition, the semiconductor manufacturing method according to the present invention is formed on the lower electrode (SI series, SILICIDE series) to form a button layer (dielectric layer containing the SI composition) N 2 O PLASMA, RTN, NH 3 + N 2 O (O 2 ) PLASMA, RTN + RTO, NH 3 PLASMA + RTO, RTN (NH 3 PLASMA + UV-O 3 , RTN (NH 3 PLASMA) + DRY O 2 ) It is characterized by obtaining.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도(A) 내지 (D)도는 본 발명에 의한 반도체 제조 방법을 도시한 공정도.1 (A) to (D) are process drawings showing a semiconductor manufacturing method according to the present invention.
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950065890A KR970054106A (en) | 1995-12-29 | 1995-12-29 | Semiconductor manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950065890A KR970054106A (en) | 1995-12-29 | 1995-12-29 | Semiconductor manufacturing method |
Publications (1)
Publication Number | Publication Date |
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KR970054106A true KR970054106A (en) | 1997-07-31 |
Family
ID=66624150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019950065890A KR970054106A (en) | 1995-12-29 | 1995-12-29 | Semiconductor manufacturing method |
Country Status (1)
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KR (1) | KR970054106A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990054911A (en) * | 1997-12-26 | 1999-07-15 | 김영환 | Capacitor Manufacturing Method of Semiconductor Device |
KR100519514B1 (en) * | 1999-07-02 | 2005-10-07 | 주식회사 하이닉스반도체 | Method of forming capacitor provied with TaON dielectric layer |
KR100831254B1 (en) * | 2006-11-27 | 2008-05-22 | 동부일렉트로닉스 주식회사 | Mim in semiconductor device and method for forming the same |
-
1995
- 1995-12-29 KR KR1019950065890A patent/KR970054106A/en not_active Application Discontinuation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990054911A (en) * | 1997-12-26 | 1999-07-15 | 김영환 | Capacitor Manufacturing Method of Semiconductor Device |
KR100519514B1 (en) * | 1999-07-02 | 2005-10-07 | 주식회사 하이닉스반도체 | Method of forming capacitor provied with TaON dielectric layer |
KR100831254B1 (en) * | 2006-11-27 | 2008-05-22 | 동부일렉트로닉스 주식회사 | Mim in semiconductor device and method for forming the same |
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