KR970054011A - Method for forming charge storage electrode of semiconductor device - Google Patents
Method for forming charge storage electrode of semiconductor device Download PDFInfo
- Publication number
- KR970054011A KR970054011A KR1019950050932A KR19950050932A KR970054011A KR 970054011 A KR970054011 A KR 970054011A KR 1019950050932 A KR1019950050932 A KR 1019950050932A KR 19950050932 A KR19950050932 A KR 19950050932A KR 970054011 A KR970054011 A KR 970054011A
- Authority
- KR
- South Korea
- Prior art keywords
- etching
- polysilicon film
- charge storage
- storage electrode
- polysilicon
- Prior art date
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- Semiconductor Memories (AREA)
Abstract
본 발명은 층간절연막을 식각하여 전하저장극 콘택 홀을 형성하는 제1단계 식각선택비가 상대적으로 적은 제1폴리실리콘막과 상대적으로 큰 제2폴리실리콘막을 차례로 형성하는 제2단계 전하저장전극 마스크를 사용하여 제2폴리실리콘막을 식각하는 제3ㄷ단계 전체구조 상부에 제1스페이서용 막을 증착하고 전면식각하면서 과도식각을 실시하여 상기 제1폴리실리콘막을 부분 식각하는 제4단계 및 전체구조 상부에 제2스페이서용 막을 증착하고 전면식각하면서 과도식각을 실시하여 상기 층간절연막을 노출시키는 제5단계 상기 전면식각하고 남은 스페이서용 막들을 제거하는 제6단계를 포함하는 것을 특징으로 하는 반도체 소자의 저하저장전극 형성방법에 관한 것으로, 폴리실리콘막간의 식각선택비를 이용한 간단한 공정으로 측면을 계단형으로 형성하여 포면적이고 크고 단차 발생을 감소시키크로써, 고집적 소자으 캐패시턴스 확보 및 소자의 신뢰성을 향상시키는 효과가 있다.The present invention provides a second step charge storage electrode mask for sequentially forming a first polysilicon film having a relatively low first etching selectivity by etching the interlayer insulating layer to form a charge storage electrode contact hole, and then forming a relatively large second polysilicon film. Using the first spacer layer on the entire structure of the third step of etching the second polysilicon layer, and performing over-etching while etching the entire surface, and partially etching the first polysilicon layer. And a fifth step of exposing the interlayer insulating layer by performing transient etching while depositing a spacer film and etching the entire surface, and a sixth step of removing the remaining spacer film after etching the front surface. The method relates to the formation method, the side of the stepped shape in a simple process using the etching selectivity between the polysilicon film By reducing the surface area is large and large stepped, there is an effect of ensuring the capacitance of the high-density device and improve the reliability of the device.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제5도는 본 발명의 일실시예에 따른 전하저장전극 형성 공정도.5 is a process chart for forming a charge storage electrode according to an embodiment of the present invention.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950050932A KR970054011A (en) | 1995-12-16 | 1995-12-16 | Method for forming charge storage electrode of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950050932A KR970054011A (en) | 1995-12-16 | 1995-12-16 | Method for forming charge storage electrode of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970054011A true KR970054011A (en) | 1997-07-31 |
Family
ID=66595124
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950050932A KR970054011A (en) | 1995-12-16 | 1995-12-16 | Method for forming charge storage electrode of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970054011A (en) |
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1995
- 1995-12-16 KR KR1019950050932A patent/KR970054011A/en not_active Application Discontinuation
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WITN | Withdrawal due to no request for examination |