KR970053435A - Method for forming interlayer insulating film of semiconductor device - Google Patents

Method for forming interlayer insulating film of semiconductor device Download PDF

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Publication number
KR970053435A
KR970053435A KR1019950058460A KR19950058460A KR970053435A KR 970053435 A KR970053435 A KR 970053435A KR 1019950058460 A KR1019950058460 A KR 1019950058460A KR 19950058460 A KR19950058460 A KR 19950058460A KR 970053435 A KR970053435 A KR 970053435A
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KR
South Korea
Prior art keywords
insulating film
forming
insulating
semiconductor device
film
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KR1019950058460A
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Korean (ko)
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이창권
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김주용
현대전자산업 주식회사
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Priority to KR1019950058460A priority Critical patent/KR970053435A/en
Publication of KR970053435A publication Critical patent/KR970053435A/en

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  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 소자의 금속층간 절연막 형성 방법에 관한 것으로, 유전 상수의 증가를 방지하기 위하여 유전 상수가 낮은 절연막의 상부 및 하부에 굴절율이 높은 절연막을 각각 형성하므로써 불순물의 침투를 완전하게 차단하여 시간의 경과에 따른 절연 특성의 감소를 방지한다. 따라서 소자의 전기적 특성 및 신뢰성이 향상될 수 있도록 한 반도체 소자의 금속층간 절연막 형성 방법에 관한 것이다.The present invention relates to a method for forming an insulating film between metal layers of a semiconductor device, in order to prevent the penetration of impurities completely by forming an insulating film having a high refractive index on the upper and lower portions of the insulating film having a low dielectric constant to prevent an increase in the dielectric constant. To prevent the reduction of insulation properties over time. Accordingly, the present invention relates to a method for forming an insulating film between metal layers of a semiconductor device to improve electrical characteristics and reliability of the device.

Description

반도체 소자의 금속층간 절연막 형성 방법Method for forming interlayer insulating film of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1A 내지 제1C도는 본 발명의 제1실시예를 설명하기 위한 소자의 단면도.1A to 1C are cross-sectional views of elements for explaining the first embodiment of the present invention.

Claims (8)

반도체 소자의 금속층간 절연막 형성 방법에 있어서, 절연층이 형성된 실리콘 기판상에 제1절연막을 형성하고, 상기 제1절연막상에 금속 배선을 형성하는 단계와, 상기 단계로부터 전체 상부면에 제2절연막을 형성하고 표면을 평탄화시킨 후 상기 제2절연막상에 제3절연막을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.A method of forming a metal interlayer insulating film of a semiconductor device, the method comprising: forming a first insulating film on a silicon substrate on which an insulating layer is formed, and forming metal wiring on the first insulating film; And forming a third insulating film on the second insulating film after the surface is planarized. 제1항에 있어서, 상기 제1 및 제3절연막은 1.7 이상의 높은 굴절율을 가지는 절연 물질인 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.The method of claim 1, wherein the first and third insulating films are insulating materials having a high refractive index of 1.7 or more. 제1항에 있어서, 상기 제2절연막은 3.5이하의 낮은 유전율을 갖는 절연 물질인 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.The method of claim 1, wherein the second insulating layer is an insulating material having a low dielectric constant of 3.5 or less. 제1항 또는 제3항에 있어서, 상기 제2절연막은 고밀도 플라즈마를 이용한 FSG막인 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.The method of claim 1 or 3, wherein the second insulating film is an FSG film using a high density plasma. 반도체 소자의 금속층간 절연막 형성 방법에 있어서, 절연층이 형성된 실리콘 기판상에 금속 배선을 형성한 후 전체 상부면에 제1절연막을 형성하는 단계와, 상기 단계로부터 상기 제1절연막상에 제2절연막을 형성하고, 표면을 평탄화시킨 다음 상기 제2절연막상에 제3절연막을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.A method of forming a metal interlayer insulating film of a semiconductor device, the method comprising: forming a metal wiring on a silicon substrate on which an insulating layer is formed, and then forming a first insulating film on the entire upper surface; and from the step, a second insulating film on the first insulating film. And forming a third insulating film on the second insulating film after planarizing the surface thereof. 제5항에 있어서, 상기 제1 및 제3절연막은 1.7 이상의 높은 굴절율을 가지는 절연 물질인 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.The method of claim 5, wherein the first and third insulating films are insulating materials having a high refractive index of 1.7 or more. 제5항에 있어서, 상기 제2절연막은 3.5이하의 낮은 유전율을 갖는 절연 물질인 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.The method of claim 5, wherein the second insulating film is an insulating material having a low dielectric constant of 3.5 or less. 제5항 또는 제7항에 있어서, 상기 제2절연막은 고밀도 플라즈마를 이용한 FSG막인 것을 특징으로 하는 반도체 소자의 금속층간 절연막 형성 방법.The method of claim 5 or 7, wherein the second insulating film is an FSG film using a high density plasma. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950058460A 1995-12-27 1995-12-27 Method for forming interlayer insulating film of semiconductor device KR970053435A (en)

Priority Applications (1)

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KR1019950058460A KR970053435A (en) 1995-12-27 1995-12-27 Method for forming interlayer insulating film of semiconductor device

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Application Number Priority Date Filing Date Title
KR1019950058460A KR970053435A (en) 1995-12-27 1995-12-27 Method for forming interlayer insulating film of semiconductor device

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KR970053435A true KR970053435A (en) 1997-07-31

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