KR970053034A - Gate electrode formation method of semiconductor device - Google Patents

Gate electrode formation method of semiconductor device Download PDF

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Publication number
KR970053034A
KR970053034A KR1019950054623A KR19950054623A KR970053034A KR 970053034 A KR970053034 A KR 970053034A KR 1019950054623 A KR1019950054623 A KR 1019950054623A KR 19950054623 A KR19950054623 A KR 19950054623A KR 970053034 A KR970053034 A KR 970053034A
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South Korea
Prior art keywords
thermal oxide
oxide film
forming
silicon substrate
etching
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KR1019950054623A
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Korean (ko)
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KR0171987B1 (en
Inventor
박상훈
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김주용
현대전자산업 주식회사
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Priority to KR1019950054623A priority Critical patent/KR0171987B1/en
Publication of KR970053034A publication Critical patent/KR970053034A/en
Application granted granted Critical
Publication of KR0171987B1 publication Critical patent/KR0171987B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/495—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo
    • H01L29/4958—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo with a multiple layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 원은 반도체 소자의 게이트 전극 형성방법을 개시한다. 개시된 본원은 실리콘 기판상에 후막의 열산화막을 형성하고, 소정 부분 식각하여 열산화막 패턴을 형성한다음, 이를 이용하여 실리콘 기판을 고정 깊이만큼 식각하여 요홈을 형성한다. 그리고, 상기 열산화막 패턴을 제거하고, 실리콘 기판상에 게이트 산화막을 형성한다음, 게이트 산화막 상부에 도핑된 폴리실리콘층을 형성한다. 이어서, 도핑된 폴리실리콘층을 요홈의 측벽부에만 존재하도록 식각하고, 이 도핑된 폴리실리콘층을 감싸안도록 전이금속층을 형성하여 게이트 전극을 형성한다.The present application discloses a method for forming a gate electrode of a semiconductor device. The disclosed application forms a thermal oxide film of a thick film on a silicon substrate, forms a thermal oxide film pattern by etching a predetermined portion, and then forms a groove by etching the silicon substrate by a fixed depth using the thermal oxide film pattern. The thermal oxide pattern is removed, a gate oxide film is formed on a silicon substrate, and then a doped polysilicon layer is formed on the gate oxide film. Subsequently, the doped polysilicon layer is etched to exist only in the sidewall portion of the groove, and the transition metal layer is formed to surround the doped polysilicon layer to form a gate electrode.

Description

반도체 소자의 게이트 전극 형성방법Gate electrode formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래의 방법에 따라 형성된 반도체 소자의 게이트 전극을 나타낸 단면도.1 is a cross-sectional view showing a gate electrode of a semiconductor device formed according to a conventional method.

제2도는 (a)내지 (d)는 본 발명에 따른 반도체 소자의 게이트 전극 형성방법을 설명하기 위한 공정 순서도.2 is a process flowchart for explaining a method of forming a gate electrode of a semiconductor device according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 실리콘 기판 12 : 열산화막11 silicon substrate 12 thermal oxide film

13 : 요홈 14 : 게이트 산화막13: groove 14: gate oxide film

15 : 폴리실리콘 16 : 전이 금속막15 polysilicon 16 transition metal film

17 : 열산화막17: thermal oxide film

Claims (6)

실리콘 기판상에 후막의 열산화막을 형성하는 단계; 상기 열산화막을 소정 부분 식각하여 열산화막 패턴을 형성하는 단계; 상기 열산화막 패턴에 의하여 실리콘 기판을 소정 깊이만큼 식각하여 요홈을 형성하는 단계; 상기 열산화막 패턴을 제거하는 단계; 상기 요홈을 구비한 실리콘 기판상에 게이트 산화막을 형성하는 단계; 상기 게이트 산화막 상부에 도핑된 폴리실리콘층을 형성하는 단계; 상기 도핑된 폴리실리콘층을 요홈의 측벽부에만 존재하도록 식각하는 단계; 상기 식각이 이루어진 도핑된 폴리실리콘층을 감싸안도록 전이금속층을 형성하여 게이트 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 게이트 전극 형성방법.Forming a thick oxide thermal oxide film on the silicon substrate; Etching a portion of the thermal oxide layer to form a thermal oxide pattern; Etching the silicon substrate by a predetermined depth by the thermal oxide film pattern to form grooves; Removing the thermal oxide pattern; Forming a gate oxide film on the silicon substrate having the recess; Forming a doped polysilicon layer on the gate oxide layer; Etching the doped polysilicon layer to exist only in the sidewall portions of the grooves; Forming a transition metal layer to surround the etched doped polysilicon layer to form a gate electrode. 제1항에 있어서, 상기 열산화막의 두께는 1000 내지 3000Å인 것을 특징으로 하는 반도체 소자의 게이트 전극 형성방법.The method according to claim 1, wherein the thermal oxide film has a thickness of 1000 to 3000 GPa. 제1항 또는 제2항에 있어서, 상기 요홈을 형성하는 단계에서, 실리콘 기판이 식각되는 깊이는 1000 내지 5000Å인 것을 특징으로 하는 반도체 소자의 게이트 전극 형성방법.The method of claim 1, wherein a depth of the silicon substrate is etched in the forming of the recess is 1000 to 5000 μs. 제1항 내지 제3항중 어느 한 항에 있어서, 상기 열산화막 패턴은 HF를 포함한 화학 용액으로 식각하는 것을 특징으로 하는 반도체 소자의 게이트 전극 형성방법.The method of claim 1, wherein the thermal oxide film pattern is etched with a chemical solution containing HF. 제1항에 있어서, 상기 요홈을 형성하기 위한 식각시, 플라즈마 식각에 의하여 요홈의 측벽부가 20 내지 40°정도 경사가 지도록 식각하는 것을 특징으로 하는 반도체 소자의 게이트 전극 형성방법.The method of claim 1, wherein the sidewalls of the grooves are inclined by about 20 to 40 ° by plasma etching during etching to form the grooves. 제1항에 있어서, 상기 폴리실리콘층은 면저항이 20 내지 40Ω/정도만큼 도핑하는 것을 특징으로 하는 반도체 소자의 게이트 전극 형성방법.The method of claim 1, wherein the polysilicon layer has a sheet resistance of 20 to 40 mA / A method of forming a gate electrode of a semiconductor device, characterized in that the doping by the degree. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950054623A 1995-12-22 1995-12-22 Gate electrode forming method of semiconductor device KR0171987B1 (en)

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KR1019950054623A KR0171987B1 (en) 1995-12-22 1995-12-22 Gate electrode forming method of semiconductor device

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KR1019950054623A KR0171987B1 (en) 1995-12-22 1995-12-22 Gate electrode forming method of semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9107256B2 (en) 2011-09-22 2015-08-11 Samsung Electronics Co., Ltd. Light emitting diode lighting apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9107256B2 (en) 2011-09-22 2015-08-11 Samsung Electronics Co., Ltd. Light emitting diode lighting apparatus

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