KR970018468A - Leadframe with Extended Tie Bar and Semiconductor Chip Package Using the Same - Google Patents
Leadframe with Extended Tie Bar and Semiconductor Chip Package Using the Same Download PDFInfo
- Publication number
- KR970018468A KR970018468A KR1019950031511A KR19950031511A KR970018468A KR 970018468 A KR970018468 A KR 970018468A KR 1019950031511 A KR1019950031511 A KR 1019950031511A KR 19950031511 A KR19950031511 A KR 19950031511A KR 970018468 A KR970018468 A KR 970018468A
- Authority
- KR
- South Korea
- Prior art keywords
- lead frame
- tie bar
- semiconductor chip
- leadframe
- extended
- Prior art date
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
본 명은 실장되어질 반도체 칩에 형성된 본딩패드를 대응하고, 그 본딩패드들에 전기적으로 연결되는 리드들과, 리드프레임을 지지하기 위한 타이바를 갖는 리드프레임에 있어서, 상기 타이바가 성형공정의 진행시 성형수지를 리드프레임의 상부와 하부에 균형 있게 충진될 수 있도록 리드프레임의 내측 방향으로 연장되어 있는 것을 특징으로 하는 연장된 타이바를 갖는 리드프레임 및 반도체 칩 패키지를 제공함으로써, 패키지 성형공정에서의 리드프레임 상부와 하부로 유입되는 성형수지의 유입속도 차이를 줄여 크랙의 발생을 방지하여 반도체 칩 패키지의 신뢰성을 개선시키는 효과를 나타내는 것을 특징으로 한다.The present invention corresponds to a bonding pad formed on a semiconductor chip to be mounted, and has a lead frame having leads electrically connected to the bonding pads and a tie bar for supporting the lead frame, wherein the tie bar is formed during the molding process. By providing a lead frame and a semiconductor chip package having an extended tie bar, characterized in that the resin is extended in the inward direction of the lead frame so that the resin can be balanced in the upper and lower portions of the lead frame, the lead frame in the package forming process It is characterized in that the effect of improving the reliability of the semiconductor chip package by preventing the occurrence of cracks by reducing the difference in the flow rate of the molding resin flowing into the upper and lower parts.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제3도는 본발명에 따른 리드 온 칩 패키지용 리드프레임의 일 실시예로써, 리드프레임과 반도체 칩의 결합된 상태를 나타내는 평면도.3 is a plan view illustrating a combined state of a lead frame and a semiconductor chip according to one embodiment of a lead frame for a lead-on chip package according to the present invention.
제4도는 제3도의 리드프레임을 포함하는 리드 온 칩 패키지의 성형공정에서 모의 실험을 통하여 에폭시 성형 수지가 유입되는 상태를 나타낸 단면도.4 is a cross-sectional view showing a state in which the epoxy molding resin is introduced through the simulation in the molding process of the lead-on chip package including the lead frame of FIG.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950031511A KR970018468A (en) | 1995-09-23 | 1995-09-23 | Leadframe with Extended Tie Bar and Semiconductor Chip Package Using the Same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950031511A KR970018468A (en) | 1995-09-23 | 1995-09-23 | Leadframe with Extended Tie Bar and Semiconductor Chip Package Using the Same |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970018468A true KR970018468A (en) | 1997-04-30 |
Family
ID=66615295
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950031511A KR970018468A (en) | 1995-09-23 | 1995-09-23 | Leadframe with Extended Tie Bar and Semiconductor Chip Package Using the Same |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970018468A (en) |
-
1995
- 1995-09-23 KR KR1019950031511A patent/KR970018468A/en not_active Application Discontinuation
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |