KR970012165A - Central processing unit signal status monitoring unit - Google Patents

Central processing unit signal status monitoring unit Download PDF

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Publication number
KR970012165A
KR970012165A KR1019950026161A KR19950026161A KR970012165A KR 970012165 A KR970012165 A KR 970012165A KR 1019950026161 A KR1019950026161 A KR 1019950026161A KR 19950026161 A KR19950026161 A KR 19950026161A KR 970012165 A KR970012165 A KR 970012165A
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KR
South Korea
Prior art keywords
central processing
processing unit
signal state
signal
bus interface
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Application number
KR1019950026161A
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Korean (ko)
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KR0181534B1 (en
Inventor
변정건
Original Assignee
김광호
삼성전자 주식회사
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Priority to KR1019950026161A priority Critical patent/KR0181534B1/en
Publication of KR970012165A publication Critical patent/KR970012165A/en
Application granted granted Critical
Publication of KR0181534B1 publication Critical patent/KR0181534B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

계산등의 데이타 처리와 입출력등의 전체적인 제어를 하는 중앙 처리 장치와; 상기 중앙 처리 장치와 외부 장치를 연결시켜주는 버스 인터페이스 장치와 ; 어떤 특정한 목적을 위하여 구성되어 상기 버스 인터페이스 장치에 의하여 상기 중앙 처리 장치에 연결되는 주변 장치와; 상기 중앙 처리 장치의 신호 상태를 검출하기 위한 검출장치와; 검출한 신호 상태를 표시하는표시장치로 이루어지는 중앙 처리 장치 신호 상태의 모니터링 장치는 중앙 처리 장치(10)의 어드레스 신호나 데이타 신호등의 신호 상태를 외부 표시장치(50)를 통하여 사용자가 항상 관측이 가능하게 되므로써 시스템의 동작 상태와 시스템 오류의 원인을 보다 정확하게 판단할 수 있으므로 시스템의 재부팅으로 인한 데이타의 손실을 예방할 수 있다.A central processing unit for performing overall control of data processing such as calculation and input / output; A bus interface device connecting the central processing unit and an external device; A peripheral device configured for any particular purpose and connected to the central processing unit by the bus interface device; A detection device for detecting a signal state of the central processing unit; A central processing unit signal state monitoring device comprising a display device for displaying a detected signal state allows a user to always observe a signal state such as an address signal or a data signal of the central processing unit 10 through the external display device 50. By doing so, the operating status of the system and the cause of the system error can be more accurately determined, thus preventing data loss due to the system reboot.

Description

중앙 처리 장치 신호 상태의 모니터링 장치Central processing unit signal status monitoring unit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 이 발명의 실시예에 따른 중앙 처리 장치 신호 상태의 모니터링 장치의 블럭 구성도이고,2 is a block diagram of an apparatus for monitoring a central processing unit signal state according to an embodiment of the present invention;

제3도는 이 발명의 실시예에 따른 중앙 처리 장치 신호 상태의 모니터링 장치의 상세 구성도이다.3 is a detailed block diagram of an apparatus for monitoring a central processing unit signal state according to an embodiment of the present invention.

Claims (2)

계산등의 데이타 처리와 입출력등의 전체적인 제어를 하는 중앙 처리 장치와; 상기 중앙 처리 장치와 외보 장치를 연결시켜주는 버스 인터페이스 장치와; 어떤 특정한 목적을 위하여 구성되어 상기 버스 인터페이스 장치에 의하여 상기 중앙 처리 장치에 연결되는 주변장치와; 상기 중앙 처리장치의 신호 상태를 검출하기 위한 검출장치와; 검출한 신호 상태를 표시하는 표시장치로 이루어지는 것을 특징으로 하는 중앙 처리 장치 신호 상태의 모니터링 장치.A central processing unit for performing overall control of data processing such as calculation and input / output; A bus interface device for connecting the central processing unit and the external reporting unit; A peripheral device configured for any particular purpose and connected to the central processing unit by the bus interface device; A detection device for detecting a signal state of the central processing unit; And a display device for displaying the detected signal state. 제1항에 있어서 상기 표시장치(51)는, 상기 검출장치(40)에서 검출되는 신호 상태를 입력받아 출력하는 표시 구동부(51)와 상기 표시 구동부(51)에 의하여 출력되는 신호 상태를 표시하는 표시부(50)로 이루어지는 것을 특징으로 하는 중앙 처리 장치 신호 상태의 모니터링 장치.The display device of claim 1, wherein the display device 51 displays a signal signal output by the display driver 51 and the display driver 51 for receiving and outputting a signal state detected by the detection device 40. The monitoring unit of the central processing unit signal status, characterized in that the display section (50). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950026161A 1995-08-23 1995-08-23 Computer having monitoring apparatus of cpu KR0181534B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950026161A KR0181534B1 (en) 1995-08-23 1995-08-23 Computer having monitoring apparatus of cpu

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950026161A KR0181534B1 (en) 1995-08-23 1995-08-23 Computer having monitoring apparatus of cpu

Publications (2)

Publication Number Publication Date
KR970012165A true KR970012165A (en) 1997-03-29
KR0181534B1 KR0181534B1 (en) 1999-05-15

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Application Number Title Priority Date Filing Date
KR1019950026161A KR0181534B1 (en) 1995-08-23 1995-08-23 Computer having monitoring apparatus of cpu

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KR (1) KR0181534B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100474716B1 (en) * 1997-08-05 2005-07-07 삼성전자주식회사 I / O data monitoring method between exchange and external device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100439218B1 (en) * 2001-09-19 2004-07-05 엘지전자 주식회사 Apparatus and method for display of access address

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100474716B1 (en) * 1997-08-05 2005-07-07 삼성전자주식회사 I / O data monitoring method between exchange and external device

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KR0181534B1 (en) 1999-05-15

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