KR960030429A - Thin film transistor liquid crystal display device and manufacturing method thereof - Google Patents

Thin film transistor liquid crystal display device and manufacturing method thereof Download PDF

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KR960030429A
KR960030429A KR1019950000545A KR19950000545A KR960030429A KR 960030429 A KR960030429 A KR 960030429A KR 1019950000545 A KR1019950000545 A KR 1019950000545A KR 19950000545 A KR19950000545 A KR 19950000545A KR 960030429 A KR960030429 A KR 960030429A
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gate
insulating film
contact hole
semiconductor layer
liquid crystal
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KR0163912B1 (en
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배병성
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김광호
삼성전자 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield

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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
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  • Manufacturing & Machinery (AREA)
  • Mathematical Physics (AREA)
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  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

이 발명은 박막트랜지스터 액정 디스플레이 소자 및 제조방법에 관한 것으로서, 박막트랜지스터 액정디스플레이 소자를 화소 스위칭 소자로서 사용함에 있어서 만족하는 온전류와 오프전류를 얻게 하기 위한, 기판위에 오프셋영역이 있는 반도체층 패턴이 형성되어 있고, 상기 반도체층 패턴 위에 게이트 절연막이 형성되어 있고, 상기 게이트절연막 위에 게이트패턴이 형성되어 있고, 상기 게이트패턴과 상기 게이트절연막의 외주를 둘러싸는 형태로 층간절연막이 형성되어 있고, 상기 게이트절연막 상부에 콘택구멍이 형성되어 있어 콘택구멍을 통하여 상기 반도체층과 연결되어진 모양으로 소오스/드레인 및 풀업게이트가 형성되어 있는 것을 특징으로 하는 박막트랜지스터 액정 디스플레이 소자에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor liquid crystal display device and a manufacturing method, wherein a semiconductor layer pattern having an offset region on a substrate is provided for obtaining a satisfactory on current and off current in using a thin film transistor liquid crystal display device as a pixel switching device. A gate insulating film is formed on the semiconductor layer pattern, a gate pattern is formed on the gate insulating film, and an interlayer insulating film is formed to surround an outer periphery of the gate pattern and the gate insulating film. The present invention relates to a thin film transistor liquid crystal display device, wherein a contact hole is formed in an upper portion of an insulating layer, and a source / drain and a pull up gate are formed in a form connected to the semiconductor layer through the contact hole.

Description

박막트랜지스터 액정 디스플레이 소자 및 그 제조방법Thin film transistor liquid crystal display device and manufacturing method thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제4도는 본 발명의 바람직한 실시예에 따른 박막트랜지스터 액정디스플레이 소자의 측단면도이고, 제5도는 제4도의 평면도이고, 제6도의 (가)∼(하)는 본 발명의 제1실시예에 따른 박막트랜지스터 액정디스플레이 소자의 제조방법을 나타낸 공정 순서도이고, 제7도는 본 발명에 제2실시예에 따른 박막트랜지스터 액정 디스플레이 소자의 측단면도이고, 제8도는 본 발명의 제3실시예에 따른 박막트랜지스터 액정 디스플레이 소자의 측단면도이다.4 is a side cross-sectional view of a thin film transistor liquid crystal display device according to a preferred embodiment of the present invention, FIG. 5 is a plan view of FIG. 4, and (a) to (below) of FIG. 6 according to the first embodiment of the present invention. 7 is a side sectional view of a thin film transistor liquid crystal display device according to a second embodiment of the present invention, and FIG. 8 is a thin film transistor according to a third embodiment of the present invention. Side sectional view of a liquid crystal display element.

Claims (8)

기판(20)위에 오프셋영역(R)이 있는 반도체층(22) 패턴이 형성되어 있고, 상기 반도체층(22) 패턴 위에 게이트절연막(24)이 형성되어 있고, 상기 게이트절연막(24) 위에 게이트(26) 패턴이 형성되어 있고, 상기 게이트(26) 패턴과 상기 게이트 절연막(24)의 외주를 둘러싸는 형태로 층간절연막(30)이 형성되어 있고, 상기 게이트절연막(24) 상부에 콘택구멍(32)이 형성되어 있어 콘택구멍(32)을 통하여 상기 반도체층(22)과 연결되어진 모양으로 소오스/드레인(34)이 형성되어 있고, 상기 게이트(26) 상부에 풀업게이트(36)가 형성되어 있는 박막트랜지스터 액정 디스플레이 소자.A pattern of the semiconductor layer 22 having an offset region R is formed on the substrate 20, a gate insulating film 24 is formed on the semiconductor layer 22 pattern, and a gate is formed on the gate insulating film 24. A pattern is formed, and an interlayer insulating film 30 is formed to surround the outer periphery of the gate 26 pattern and the gate insulating film 24, and the contact hole 32 is formed on the gate insulating film 24. Is formed to form a source / drain 34 connected to the semiconductor layer 22 through the contact hole 32, and a pull-up gate 36 is formed on the gate 26. Thin film transistor liquid crystal display device. 제1항에 있어서, 상기 풀업게이트(36)는 채널층에 대해 차광막 역할을 하도록 형성된 것을 특징으로 하는 박막트랜지스터 액정 디스플레이 소자.The thin film transistor liquid crystal display of claim 1, wherein the pull-up gate (36) is formed to serve as a light shielding film for the channel layer. 제1항에 있어서, 상기 콘택구멍(32)는 소오스/드레인 전극을 위한 콘택구멍(32-1)과 게이트 전극을 위한 콘택구멍(32-1)으로 이루어진 것을 특징으로 하는 박막 트랜지스터 액정 디스플레이 소자.The thin film transistor liquid crystal display of claim 1, wherein the contact hole (32) comprises a contact hole (32-1) for a source / drain electrode and a contact hole (32-1) for a gate electrode. 제1항에 있어서, 상기 반도체층(22)에서 오프셋영역(R)에 저농도로 이온주입된 저농도 이온주입영역(L)을 갖는 것을 특징으로 하는 박막트랜지스터 액정 디스플레이 소자.The thin film transistor liquid crystal display device according to claim 1, further comprising a low concentration ion implantation region (L) implanted at a low concentration into the offset region (R) in the semiconductor layer (22). 제1항에 있어서, 상기 게이트(26)는 두개로 나누어진 모양의 이중게이트(26-1)로 형성되고, 상기 반도체층(22)의 이온주입되지 않은 부분 중에 상기 이중게이트(26-1)의 하부를 제외한 부분에 이온주입이 되고, 상기 이중게이트(26-1)의 상부에 각각 연결된 형태로 풀업게이트(36)가 형성되어 있는 것을 특징으로 하는 박막트랜지스터 액정 디스플레이 소자.The double gate 26-1 of claim 1, wherein the gate 26 is formed of two divided double gates 26-1, and the double gates 26-1 are not implanted in the semiconductor layer 22. A thin film transistor liquid crystal display device, characterized in that the ion implantation is formed in a portion other than the lower portion of the double gate and the pull-up gates 36 are connected to the upper portions of the double gates 26-1. 기판(20)위에 반도체층(22)을 증착하는 단계와, 상기 반도체층(22)을 패턴하는 단계와; 상기 반도체층(22) 패턴의 외주에 게이트절연막(24)을 형성하는 단계와; 상기 게이트절연막(24)의 외주에 게이트(26)를 형성하는 단계와; 상기 게이트(26)을 패턴하는 단계와; 상기 게이트(26)패턴시 외부로 노출된 게이트절연막(24)을 통해 이온주입(28)을 하는 단계와; 상기 기판(20)과 상기 게이트절연막(24)과 상기 게이트(26)의 각기 외부로 노출된 부위를 둘러싸는 형태로 층간절연막(30)을 중착하는 단계와; 상기 주입이온(28)의 활성화 단계와; 상기 층간절연막(30)의 상부에 콘택구멍(32)을 형성하는 단계와; 상기 층간절연막(30)의 상부에 메탈을 적층한 후, 패턴하여 소오스/드레인(34) 및 풀업게이트(36)를 형성하는 단계와; 상기 층간절연막(30)의 노출된 상부의 한쪽에 화소전극(40)을 형성하는 단계와; 상기 화소전극(40)의 상부에 보호막(44)을 형성하는 단계로 이루어진 것을 특징으로 하는 박막트랜지스터 액정 디스플레이 소자의 제조방법.Depositing a semiconductor layer (22) on a substrate (20), and patterning the semiconductor layer (22); Forming a gate insulating film (24) on an outer circumference of the semiconductor layer (22) pattern; Forming a gate (26) on an outer circumference of the gate insulating film (24); Patterning the gate (26); Performing ion implantation (28) through the gate insulating film (24) exposed to the outside during the gate (26) pattern; Depositing an interlayer insulating film (30) so as to surround portions exposed to the outside of the substrate (20), the gate insulating film (24) and the gate (26); Activating the implantation ion (28); Forming a contact hole (32) on the interlayer insulating film (30); Stacking a metal on top of the interlayer insulating film (30) and then patterning to form a source / drain (34) and a pull-up gate (36); Forming a pixel electrode (40) on one of the exposed upper portions of the interlayer insulating film (30); Forming a passivation layer (44) on the pixel electrode (40). 제6항에 있어서, 상기 층간절연막(30)의 상부에 콘택구멍(32)을 형성하는 단계는 소오스/드레인 전극을 위한 콘택구멍(32-1)과 게이트 전극을 위한 콘택구멍(32-2)을 동시에 형성하는 것을 특징으로 하는 박막트랜지스터 액정 디스플레이 소자의 제조방법.The method of claim 6, wherein the forming of the contact hole 32 on the interlayer insulating film 30 comprises contact hole 32-1 for the source / drain electrodes and contact hole 32-2 for the gate electrode. Method for manufacturing a thin film transistor liquid crystal display device characterized in that at the same time forming. 제6항에 있어서, 상기 풀업게이트(36)는 상기 게이트(26) 보다 넓게 형성하는 것을 특징으로 하는 박막트랜지스터 액정 디스플레이 소자의 제조방법.7. A method according to claim 6, wherein the pull-up gate (36) is formed wider than the gate (26). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950000545A 1995-01-13 1995-01-13 Thin film transistor KR0163912B1 (en)

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Cited By (5)

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KR100741976B1 (en) * 2005-08-25 2007-07-23 삼성에스디아이 주식회사 Thin film transistor and fabricating for the same
US8013337B2 (en) 2003-04-29 2011-09-06 Samsung Mobile Display Co., Ltd. Thin film transistor and display device using the same
US8530290B2 (en) 2007-03-09 2013-09-10 Samsung Display Co., Ltd. Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the same
US8711074B2 (en) 2003-09-18 2014-04-29 Samsung Display Co., Ltd. Flat panel display
CN112567527A (en) * 2018-08-06 2021-03-26 三星显示有限公司 Display device and operation method thereof

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KR101002664B1 (en) 2008-07-02 2010-12-21 삼성모바일디스플레이주식회사 Thin Film Transistor, The method for Using The Same and Organic Light Emitting Display Device Comprising the TFT

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* Cited by examiner, † Cited by third party
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US8013337B2 (en) 2003-04-29 2011-09-06 Samsung Mobile Display Co., Ltd. Thin film transistor and display device using the same
US8624298B2 (en) 2003-04-29 2014-01-07 Samsung Display Co., Ltd. Display device including thin film transistor
US8652885B2 (en) 2003-04-29 2014-02-18 Samsung Display Co., Ltd. Method of fabricating thin film transistor
US8711074B2 (en) 2003-09-18 2014-04-29 Samsung Display Co., Ltd. Flat panel display
KR100741976B1 (en) * 2005-08-25 2007-07-23 삼성에스디아이 주식회사 Thin film transistor and fabricating for the same
US7763889B2 (en) 2005-08-25 2010-07-27 Samsung Mobile Display Co., Ltd. Thin film transistor, method of fabricating the same, and a display device including the thin film transistor
US8278159B2 (en) 2005-08-25 2012-10-02 Samsung Display Co., Ltd. Thin film transistor, method of fabricating the same, and a display device including the thin film transistor
US8530290B2 (en) 2007-03-09 2013-09-10 Samsung Display Co., Ltd. Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the same
US8569764B2 (en) 2007-03-09 2013-10-29 Samsung Display Co., Ltd. Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the same
CN112567527A (en) * 2018-08-06 2021-03-26 三星显示有限公司 Display device and operation method thereof

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