KR960028328A - Luminance mute circuit of multi-synchronous monitor - Google Patents

Luminance mute circuit of multi-synchronous monitor Download PDF

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Publication number
KR960028328A
KR960028328A KR1019940040262A KR19940040262A KR960028328A KR 960028328 A KR960028328 A KR 960028328A KR 1019940040262 A KR1019940040262 A KR 1019940040262A KR 19940040262 A KR19940040262 A KR 19940040262A KR 960028328 A KR960028328 A KR 960028328A
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KR
South Korea
Prior art keywords
voltage
crt
microprocessor
pulse width
output
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KR1019940040262A
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Korean (ko)
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KR0151605B1 (en
Inventor
윤성진
Original Assignee
배순훈
대우전자 주식회사
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Priority to KR1019940040262A priority Critical patent/KR0151605B1/en
Publication of KR960028328A publication Critical patent/KR960028328A/en
Application granted granted Critical
Publication of KR0151605B1 publication Critical patent/KR0151605B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/57Control of contrast or brightness
    • H04N5/59Control of contrast or brightness in dependence upon beam current of cathode ray tube
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F38/00Adaptations of transformers or inductances for specific applications or functions
    • H01F38/42Flyback transformers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18Generation of supply voltages, in combination with electron beam deflecting
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/26Pc applications
    • G05B2219/2615Audio, video, tv, consumer electronics device

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Receiver Circuits (AREA)

Abstract

본 발명은 멀티 동기 모니터에 관한 것으로, 특히 멀티 동기 모니터의 모드 변환시 가변되는 브라운관의 그리드 전압을 뮤트시킴으로써, 모니터의 화면에 나타나는 백 래스터(Back Raster)를 보이지 않게 하기 위하여, 수평출력 트랜지스터가 동작을 함으로써 전자 빔을 수평방향으로 주사시키기 위한 톱니파를 발생시키고, 플라이백 트랜스포머의 2차측에서 나오는 전압을 정류하고 평활하여 출력된 전압을 분배함으로써 브라운관(CRT)의 그리드로 입력시키는 음전압 발생수단과, 컴퓨터로부터 입력되는 수직 동기신호 및 수평 동기신호의 유무를 판단하여 설정된 모드에 따른 펄스폭 변조신호를 출력시키는 마이크로 프로세서, 상기 마이크로 프로세서에서 출력되는 펄스폭 변조신호에 의해 상기 음전압 발생수단에서 발생된 브라운관(CRT)의 그리드 전압을 가변시켜 휘도를 제어하는 휘도 제어수단 및 상기 마이크로 프로세서로부터 출력되는 펄스폭 변조신호의 모드 전환시 상기 휘도 제어수단의 출력 전압을 뮤트시키는 뮤트 회로 수단으로 구성한 멀티 동기 모니터의 휘도 뮤트 회로를 제공한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multi-synchronous monitor. In particular, the horizontal output transistor is operated to mute the grid voltage of the CRT that is varied during mode switching of the multi-synchronous monitor so that the back raster shown on the screen of the monitor is not shown. Negative voltage generating means for generating a sawtooth wave for scanning the electron beam in a horizontal direction, rectifying the voltage coming from the secondary side of the flyback transformer, and smoothing and distributing the output voltage to the grid of the CRT; The microprocessor generates a pulse width modulated signal according to a set mode by determining the presence of a vertical synchronizing signal and a horizontal synchronizing signal input from a computer, and the negative voltage generating means generates the pulse width modulated signal output from the microprocessor. Grid voltage of CRT A luminance mute circuit of a multi-synchronous monitor comprising a luminance control means for varying the brightness and controlling the luminance and a mute circuit means for muting the output voltage of the luminance control means when switching the mode of the pulse width modulated signal output from the microprocessor. .

Description

멀티동기 모니터의 휘도 뮤트회로Luminance mute circuit of multi-synchronous monitor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 종래 멀티 동기 모니터의 휘도 가변회로도, 제2도는 본 발명에 의한 멀티 동기 모니터의 휘도 뮤트 회로도이다.1 is a luminance variable circuit diagram of a conventional multi-synchronous monitor, and FIG. 2 is a luminance mute circuit diagram of a multi-synchronous monitor according to the present invention.

Claims (2)

수평출력 트랜지스터가 동작을 함으로써 톱니파를 발생시켜 전자빔을 수평 방향으로 주사시키고 또한 플라이백 트랜스포머가 구동을 하여 2차측에서 나오는 전압을 정류하고 평활하여 출력된 전압을 분배함으로써 브라운관(CRT)의 그리드로 출력시키는 음전압 발생수단(10)과 컴퓨터로부터 입력되는 수직 동기신호 및 수평 동기신호의 유무를 판단하여 설정된 모드에 따른 펄스폭 변조신호를 출력시키는 마이크로 프로세서(20); 상기 마이크로 프로세서(20)에서 출력되는 펄스폭 변조신호에 의해 상기 음전압 발생수단(10)에서 발생된 브라운관(CRT)의 그리드 전압을 가변시켜 휘도를 제어하는 휘도 제어수단(30)및; 상기 마이크로 프로세서(20)로부터 출력되는 펄스폭 변조신호의 모드 변환시 상기 휘도 제어수단(30)의 출력 전압을 뮤트시키는 뮤트 회로 수단(40)으로 구성된 것을 특징으로 하는 멀티 동기 모니터의 휘도 뮤트 회로.The horizontal output transistor operates to generate sawtooth waves to scan the electron beam in the horizontal direction, and the flyback transformer drives to rectify the voltage from the secondary and distribute the output voltage to the grid of the CRT. A microprocessor 20 for determining whether the negative voltage generating means 10 and the vertical synchronizing signal and the horizontal synchronizing signal input from the computer output the pulse width modulated signal according to the set mode; Brightness control means (30) for controlling the brightness by varying the grid voltage of the CRT generated by the negative voltage generation means (10) by the pulse width modulation signal output from the microprocessor (20); And a mute circuit means (40) for muting the output voltage of the luminance control means (30) during the mode conversion of the pulse width modulated signal output from the microprocessor (20). 제1항에 있어서, 상기 휘도 제어수단(30)은 상기 마이크로 프로세서(1)에서 출력되는 펄스 폭 변조신호의 직류 레벨을 결정하는 직류레벨 설정부(31)와; 상기 직류레벨 설정부(31)에서 결정된 직류 레벨의 노이즈를 제거하고 RC 시정수에 의해 적분하여 저주파 노이즈를 제거하는 평활부(32) 및; 상기 평활부(32)에서 나오는 전압을 기준전압과 비교하여 상기 브라운관(CRT)의 그리드(G1)로 출력시킴으로써 브라운관(CRT)의 밝기를 가변시키는 휘도 제어부(33)를 포함하여 구성된 것을 특징으로 하는 멀티 동기 모니터의 휘도 뮤트 회로.2. The apparatus of claim 1, wherein the brightness control means (30) includes: a DC level setting unit (31) for determining a DC level of a pulse width modulated signal output from the microprocessor (1); A smoothing unit 32 which removes the noise of the DC level determined by the DC level setting unit 31 and integrates by the RC time constant to remove low frequency noise; And a brightness controller 33 for varying the brightness of the CRT by outputting the voltage from the smoothing part 32 to the grid G1 of the CRT by comparing with the reference voltage. Luminance mute circuit for multi-synchronous monitors. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940040262A 1994-12-31 1994-12-31 Luminance mute circuit of multi-sync. monitor KR0151605B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940040262A KR0151605B1 (en) 1994-12-31 1994-12-31 Luminance mute circuit of multi-sync. monitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940040262A KR0151605B1 (en) 1994-12-31 1994-12-31 Luminance mute circuit of multi-sync. monitor

Publications (2)

Publication Number Publication Date
KR960028328A true KR960028328A (en) 1996-07-22
KR0151605B1 KR0151605B1 (en) 1998-10-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940040262A KR0151605B1 (en) 1994-12-31 1994-12-31 Luminance mute circuit of multi-sync. monitor

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KR0151605B1 (en) 1998-10-15

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