KR960026207A - Tungsten Plug Manufacturing Method - Google Patents

Tungsten Plug Manufacturing Method Download PDF

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Publication number
KR960026207A
KR960026207A KR1019940039055A KR19940039055A KR960026207A KR 960026207 A KR960026207 A KR 960026207A KR 1019940039055 A KR1019940039055 A KR 1019940039055A KR 19940039055 A KR19940039055 A KR 19940039055A KR 960026207 A KR960026207 A KR 960026207A
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KR
South Korea
Prior art keywords
tungsten plug
insulating layer
predetermined thickness
layer
etching
Prior art date
Application number
KR1019940039055A
Other languages
Korean (ko)
Other versions
KR100347245B1 (en
Inventor
김상응
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940039055A priority Critical patent/KR100347245B1/en
Publication of KR960026207A publication Critical patent/KR960026207A/en
Application granted granted Critical
Publication of KR100347245B1 publication Critical patent/KR100347245B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 고집적 반도체소자의 텅스턴 플러그 제조방법에 관한 것으로, 콘택홀에 형성되는 텅스텐 플러그가 움푹 들어가는 것을 방지하기 위하여 하부 절연막의 두께를 일정 두께 더 두껍게 형성하고, 텅스텐 플러그를 제조한 다음, 하부 절연막을 일정두께를 식각하는 텅스텐 플러그가 절연막 상부면과 평탄화되도록 제조하는 방법이다.The present invention relates to a tungsten plug manufacturing method of a highly integrated semiconductor device, in order to prevent the tungsten plug formed in the contact hole to be recessed to form a thicker thickness of the lower insulating film, and to manufacture a tungsten plug, A method of manufacturing the insulating film is made to planarize the tungsten plug for etching a predetermined thickness with the upper surface of the insulating film.

Description

텅스텐 플러그 제조방법Tungsten Plug Manufacturing Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제5도 및 제9도는 본 발명에 의한 텅스텐 플러그를 제조하는 단계를 도시한 단면도.5 and 9 are cross-sectional views showing the step of manufacturing a tungsten plug according to the present invention.

Claims (5)

반도체소자의 텅스텐 플러그 제조방법에 있어서, 반도체기판에 절연층 예정된 두께보다 일정두께 (d)만큼 더 두껍게 형성하고, 콘택마스크를 이용한 식각공정으로 상기 절연층의 일정두께를 식각하여 콘택홀을 형성하는 단계와, 전체적으로 글루층을 얇은 두께로 증착하고, 그 상부에 텅스텐막을 두껍게 증착하는 단계와, 상기 텅스텐막을 전면식각하여 상기 콘택홀에 텅스텐막이 남은 텅스텐 플러그를 형성하는 단계와, 노출된 글루층을 식각하는 단계와, 상기 절연층의 일정두께(d)를 습식이나 건식식각으로 제거하여 텅스텐 플러그의 상부면이 절연층의 상부면과 같아지도록 하는 단계를 포함하는 텅스텐 플러그 제작방법.In the method of manufacturing a tungsten plug of a semiconductor device, a contact hole is formed on a semiconductor substrate by a predetermined thickness (d) thicker than a predetermined thickness of the insulating layer, and by etching a predetermined thickness of the insulating layer by an etching process using a contact mask. Depositing a thick layer of the glue layer on the whole, and depositing a thick tungsten layer on the upper surface; Etching and removing the predetermined thickness (d) of the insulating layer by wet or dry etching so that the upper surface of the tungsten plug is the same as the upper surface of the insulating layer. 제1항에 있어서, 상기 하부층은 산화막으로 형성하는 것을 특징으로 하는 텅스텐 플러그 제조방법.The method of claim 1, wherein the lower layer is formed of an oxide film. 제1항에 있어서, 상기 글루층은 Ti/TiN막으로 형성하는 것을 특징으로 하는 텅스텐 플러그 제조방법.The method of claim 1, wherein the glue layer is formed of a Ti / TiN film. 제1항에 있어서, 상기 절연층의 일정두께(d)를 습식할때 50:1=순수:HF 또는 50:1=NH4F:HF 용액에서 식각하는 것을 특징으로 하는 텅스텐 플러그 제조방법.The method of claim 1, wherein when the predetermined thickness d of the insulating layer is wet, the tungsten plug is etched in a 50: 1 = pure: HF or 50: 1 = NH4F: HF solution. 제1항에 있어서, 상기 절연층의 일정두께(d)를 건식식각으로 제거할때 CF4개스와 CHF3개스를 흘려주면서 Ar, He 개스를 공급하는 것을 특징으로 하는 텅스텐 플러그 제조방법.The method of claim 1, wherein Ar and He gas are supplied while CF 4 gas and CHF 3 gas are flowed when the constant thickness d of the insulating layer is removed by dry etching. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940039055A 1994-12-29 1994-12-29 Method for manufacturing tungsten plug KR100347245B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940039055A KR100347245B1 (en) 1994-12-29 1994-12-29 Method for manufacturing tungsten plug

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940039055A KR100347245B1 (en) 1994-12-29 1994-12-29 Method for manufacturing tungsten plug

Publications (2)

Publication Number Publication Date
KR960026207A true KR960026207A (en) 1996-07-22
KR100347245B1 KR100347245B1 (en) 2002-11-04

Family

ID=37488752

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940039055A KR100347245B1 (en) 1994-12-29 1994-12-29 Method for manufacturing tungsten plug

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Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05121564A (en) * 1991-10-25 1993-05-18 Seiko Epson Corp Semiconductor device and manufacture thereof
JPH05291408A (en) * 1992-04-15 1993-11-05 Nippon Steel Corp Semiconductor device and its manufacture

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Publication number Publication date
KR100347245B1 (en) 2002-11-04

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