KR960026186A - Polysilicon conductive film formation method - Google Patents

Polysilicon conductive film formation method Download PDF

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Publication number
KR960026186A
KR960026186A KR1019940037672A KR19940037672A KR960026186A KR 960026186 A KR960026186 A KR 960026186A KR 1019940037672 A KR1019940037672 A KR 1019940037672A KR 19940037672 A KR19940037672 A KR 19940037672A KR 960026186 A KR960026186 A KR 960026186A
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KR
South Korea
Prior art keywords
polysilicon
film
conductive film
forming
polysilicon film
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Application number
KR1019940037672A
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Korean (ko)
Inventor
엄금용
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940037672A priority Critical patent/KR960026186A/en
Publication of KR960026186A publication Critical patent/KR960026186A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 기판 상에 도핑되지 않은 폴리실리콘막을 형성하되 예정된 폴리실리콘 전도막 전체두께중 일정두께만을 형성하는 단계; 상기 도핑되지 않은 폴리실리콘막상에 도핑된 폴리실리콘막을 형성하되 예정된 폴리실리콘 전도막 전체두께가 될때까지 형성하는 단계; 열처리 공정을 통해 상기 도핑된 폴리실리콘막내의 도펀트가 도핑되지 않은 폴리실리콘막으로 확산되어 전체 폴리실리콘막내의 도펀트 농도를 일정하게 하는 단계를 포함하는 것을 특징으로 하는 폴리실리콘 전도막 형성방법에 관한 것으로, 폴리실리콘 전도막 하부층으로의 도펀트 확산을 방지하여 소자의 특성을 향상시키는 효과를 가져온다.The present invention comprises the steps of forming a non-doped polysilicon film on the substrate, but only a predetermined thickness of the predetermined total thickness of the polysilicon conductive film; Forming a doped polysilicon film on the undoped polysilicon film until the predetermined thickness of the polysilicon conductive film is reached; And a step of diffusing the dopant in the doped polysilicon film into the undoped polysilicon film through a heat treatment process to uniform the dopant concentration in the entire polysilicon film. In addition, the dopant diffusion into the polysilicon conductive layer lower layer is prevented, thereby improving the characteristics of the device.

Description

폴리실리콘 전도막 형성방법Polysilicon conductive film formation method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1C도는 본 발명의 일 실시예에 따른 반도체 제조공정도.1A to 1C are semiconductor manufacturing process diagrams according to one embodiment of the present invention.

Claims (5)

폴리실리콘 전도막 형성방법에 있어서, 기판 상에 도핑되지 않은 폴리실리콘막을 형성하되 예정된 폴리실리콘 전도막 전체두께중 일정두께만을 형성하는 단계; 상기 도핑되지 않은 폴리실리콘막상에 도핑된 폴리실리콘막을 형성하되 예정된 폴리실리콘 전도막 전체두께가 될때까지 형성하는 단계; 열처리 공정을 통해 상기 도핑된 폴리실리콘막내의 도펀트가 도핑되지 않은 폴리실리콘막으로 확산되어 전체 폴리실리콘막내의 도펀트 농도를 일정하게 하는 단계를 포함하는 것을 특징으로 하는 폴리실리콘 전도막 형성방법.A method for forming a polysilicon conductive film, the method comprising: forming an undoped polysilicon film on a substrate, but forming only a predetermined thickness of a predetermined total thickness of the polysilicon conductive film; Forming a doped polysilicon film on the undoped polysilicon film until the predetermined thickness of the polysilicon conductive film is reached; And spreading the dopant in the doped polysilicon film to the undoped polysilicon film through a heat treatment process to maintain a constant dopant concentration in the entire polysilicon film. 제1항에 있어서, 상기 폴리실리콘 전도막은 비트라인인 것을 특징으로 하는 폴리실리콘 전도막 형성방법.The method of claim 1, wherein the polysilicon conductive film is a bit line. 제1항에 있어서, 상기 폴리실리콘 전도막은 전하저장전극인 것을 특징으로 하는 폴리실리콘 전도막 형성방법.The method of claim 1, wherein the polysilicon conductive film is a charge storage electrode. 제1항에 있어서, 상기 폴리실리콘 전도막은 플레이트 전극인 것을 특징으로 하는 폴리실리콘 전도막 형성방법.The method of claim 1, wherein the polysilicon conductive film is a plate electrode. 제1항에 있어서, 상기 도핑된 폴리실리콘막은 폴리실리콘 소오스 가스 및 불순물 소오스 가스를 동시에 첨부하여 불순물을 주입하는 인-시튜(In-situ) 도핑(Doping) 방법으로 형성하는 것을 특징으로 하는 폴리실리콘 전도막 형성방법.The polysilicon layer of claim 1, wherein the doped polysilicon layer is formed by an in-situ doping method in which impurities are added by simultaneously attaching a polysilicon source gas and an impurity source gas. Conductive film forming method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940037672A 1994-12-28 1994-12-28 Polysilicon conductive film formation method KR960026186A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940037672A KR960026186A (en) 1994-12-28 1994-12-28 Polysilicon conductive film formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940037672A KR960026186A (en) 1994-12-28 1994-12-28 Polysilicon conductive film formation method

Publications (1)

Publication Number Publication Date
KR960026186A true KR960026186A (en) 1996-07-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940037672A KR960026186A (en) 1994-12-28 1994-12-28 Polysilicon conductive film formation method

Country Status (1)

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KR (1) KR960026186A (en)

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