KR960009534B1 - Serial interface circuit for controlling subscriber's board in full electronics exchange - Google Patents

Serial interface circuit for controlling subscriber's board in full electronics exchange Download PDF

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Publication number
KR960009534B1
KR960009534B1 KR93012068A KR930012068A KR960009534B1 KR 960009534 B1 KR960009534 B1 KR 960009534B1 KR 93012068 A KR93012068 A KR 93012068A KR 930012068 A KR930012068 A KR 930012068A KR 960009534 B1 KR960009534 B1 KR 960009534B1
Authority
KR
South Korea
Prior art keywords
clock
transmission
board
reception
interface circuit
Prior art date
Application number
KR93012068A
Other languages
Korean (ko)
Other versions
KR950002510A (en
Inventor
Sang-Joong Kim
Original Assignee
Daewoo Electronic Component
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daewoo Electronic Component filed Critical Daewoo Electronic Component
Priority to KR93012068A priority Critical patent/KR960009534B1/en
Publication of KR950002510A publication Critical patent/KR950002510A/en
Application granted granted Critical
Publication of KR960009534B1 publication Critical patent/KR960009534B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Interface Circuits In Exchanges (AREA)
  • Devices For Supply Of Signal Current (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

a clock generator(20); a first frequency divider(30) for frequency-dividing the clock generated by the clock generator(20) to generate a reference clock; a second frequency divider(40) for frequency-dividing the divided clock again; a start signal synchronizing circuit(50) for matching the divided clock and a control signal of a processor(10) to generate a start pulse; a transmission synchronous signal generator(60) for OR operating the start pulse and reference clock to generate a clock pulse for transmission and reception; a transmission/reception controller(70,80) for generating a control signal for transmission and reception according to the clock pulse input; and transmitter and receiver(100,110) for interfacing data from a data storage of the processor(10) using the transmission/reception control signal as an enable signal.
KR93012068A 1993-06-30 1993-06-30 Serial interface circuit for controlling subscriber's board in full electronics exchange KR960009534B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR93012068A KR960009534B1 (en) 1993-06-30 1993-06-30 Serial interface circuit for controlling subscriber's board in full electronics exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93012068A KR960009534B1 (en) 1993-06-30 1993-06-30 Serial interface circuit for controlling subscriber's board in full electronics exchange

Publications (2)

Publication Number Publication Date
KR950002510A KR950002510A (en) 1995-01-04
KR960009534B1 true KR960009534B1 (en) 1996-07-20

Family

ID=19358306

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93012068A KR960009534B1 (en) 1993-06-30 1993-06-30 Serial interface circuit for controlling subscriber's board in full electronics exchange

Country Status (1)

Country Link
KR (1) KR960009534B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990020368A (en) * 1997-08-30 1999-03-25 윤종용 Stand-alone interface device in private switching system
KR100288752B1 (en) * 1998-09-23 2001-05-02 윤종용 Matching device between subscriber board and subscriber control interface board

Also Published As

Publication number Publication date
KR950002510A (en) 1995-01-04

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G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee