KR950030650A - Automatic Gain Control of HTV Receiver - Google Patents

Automatic Gain Control of HTV Receiver Download PDF

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Publication number
KR950030650A
KR950030650A KR1019940007626A KR19940007626A KR950030650A KR 950030650 A KR950030650 A KR 950030650A KR 1019940007626 A KR1019940007626 A KR 1019940007626A KR 19940007626 A KR19940007626 A KR 19940007626A KR 950030650 A KR950030650 A KR 950030650A
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KR
South Korea
Prior art keywords
signal
output
amplifier
gain
data segment
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KR1019940007626A
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Korean (ko)
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KR960013650B1 (en
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박병호
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이헌조
엘지전자 주식회사
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/52—Automatic gain control
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Television Receiver Circuits (AREA)
  • Picture Signal Circuits (AREA)

Abstract

본 발명은 8VSB(8 Vestigical Side Band)에 의해 신호가 전송되는 HDTV(High Definizion Television)수신기의 자동이득 자동이득 조절장치에 관한 것으로, 특히 입력신호의 전압크기 조절을 튜너와 IF증폭기(Intermediate Frequency Amplifier)에서 수행하는 자동이득 조절장치에 관한 것이다.이를 위해, 본 발명은 튜너증폭기(1)와, IF증폭기(2)에서 증폭되어 기저대역 신호로 변환된 신호를 A/D(Analog/Digital)변환하는 A/D/변환수단(4), 상기 A/D변환수단(4)에서 A/D변환된 신호로부터 동기신호를 검출하고 동기신호 크기를 일정기준에 따라 판단하여 업/다운모드(Up/Down Mode)를 결정하는 모드선택 신호(39)와 이득조절을 제어하는 인에이블 신호(40)를 출력하는 데이타 세그먼트 동기신호 검출수단(5), 및 상기 데이타 세그먼트 동기신호 검출수단(5)으로부터 출력되는 신호에 따라 상기 튜너증폭기(1)와 IF증폭기(2)의 조절하는 이득조절신호 제어수단(3)으로 구성된다. 따라서, 본 발명은 튜너증폭기의 이득을 가능하면 최대가 되도록 하여 전체시스템의 잡음특성을 향상시킬 수 있는 지연 AGC방식의 조절전압 구동회로를 디지탈회로로 구현하여, 지연AGC방식을 적용하는 동기디지탈 통신시스템(Synchronous Digital Communication System)에 적용가능하며, 특히 데이터 세그먼트 동기신호로 이들을 조절하는 8VSB(8 Vestigical Side Band)에 적용가능하며, 특히 데이터 세그먼트 동기신호로 이득을 조절하는 8VSB HDTV 전송시스템의 지연 AGC구동회로에 효과적으로 적용시킬 수 있고 ASLC(Application Specific Integrated Cirunits)화가 가능하여 상기 구현이 용이한 효과가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an automatic gain automatic gain control apparatus for a high definition television (HDTV) receiver in which a signal is transmitted by 8 VSV (8 Vestigical Side Band). The present invention relates to an A / D (Analog / Digital) conversion of a signal amplified by a tuner amplifier 1 and an IF amplifier 2 and converted into a baseband signal. The A / D / converting means 4 and the A / D converting means 4 detect a synchronous signal from the A / D converted signal and determine the synchronous signal size according to a predetermined criterion. Output from the data segment synchronizing signal detecting means 5 for outputting a mode selection signal 39 for determining Down Mode and the enable signal 40 for controlling gain adjustment, and the data segment synchronizing signal detecting means 5; Tuner amplification according to signal Is composed of (1) and the gain control signal controlling means (3) for adjustment of the IF amplifier (2). Accordingly, the present invention implements a delayed AGC control voltage driving circuit capable of increasing the gain of the tuner amplifier as much as possible to improve the noise characteristics of the entire system as a digital circuit, thereby applying synchronous digital communication. Applicable to Synchronous Digital Communication System, especially 8VSB (8 Vestigical Side Band) which controls them with data segment sync signal, especially delay AGC of 8VSB HDTV transmission system that adjust gain with data segment sync signal. It can be effectively applied to the driving circuit and ASLC (Application Specific Integrated Cirunits) can be implemented there is an effect that the implementation is easy.

Description

에이치디티브이(HDTV) 수신기의 자동이득 조절장치Automatic Gain Control of HTV Receiver

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 의한 자동이득 조절장치의 구성도, 제2도는 제1도의 모드선택 신호에 의한 튜너증폭기 및 IF 증폭기의 이득특성도.1 is a configuration diagram of an automatic gain adjusting device according to the present invention, and FIG. 2 is a gain characteristic diagram of a tuner amplifier and an IF amplifier using a mode selection signal of FIG.

Claims (4)

튜너증폭기(1)와 IF증폭기(2)에서 증폭되어 기저대역 신호로 변환된 신호를 A/D(Analog/Digital)변환하는 A/D변환수단(4), 상기 A/D변환수단(4)에서 A/D변환된 신호로부터 동기신호를 검출하고 동기신호 크기를 일정기준에 따라 판단하여 업/다운모드(Up/Down Mode)를 결정하는 모드선택 신호(39)와 이득조절을 제어하는 인에이블 신호(40)를 출력하는 데이타 세그먼트 동기 신호 검출수단(5), 및 상기 데이타 세그먼트 동기신호 검출수단(5)으로부터 출력되는 신호에 따라 상기 튜너증폭기(1)와 IF증폭기(2)의 이득을 조절하는 이득 조절신호 제어수단(3)으로 구성되는 것을 특징으로 하는 HDTV 수신기의 자동이득 조절장치.A / D conversion means (4) for A / D (Analog / Digital) conversion of the signal amplified by the tuner amplifier 1 and the IF amplifier 2 and converted to the baseband signal, and the A / D conversion means 4 Enable to control the mode selection signal 39 and gain control to determine the up / down mode by detecting the synchronization signal from the A / D converted signal and determining the synchronization signal size according to a certain standard. The gain of the tuner amplifier 1 and the IF amplifier 2 is adjusted in accordance with the data segment synchronizing signal detecting means 5 for outputting the signal 40 and the signal output from the data segment synchronizing signal detecting means 5. Automatic gain control device of the HDTV receiver, characterized in that consisting of a gain control signal control means (3). 제1항에 있어서, 상기 이득조절신호 제어수단(3)은 상기 데이터 세그먼트 동기신호 검출수단(5)으로부터 출력되는 모드선택 신호(39)에 따라 업/다운 카운팅하는 제1 및 제2 업/다운 카운터(36), (37), 상기 제1 및 제2 업/다운 카운터 (36),(37)로부터 출력되는 신호를 D/A(Digital/Analog)변환하여 상기 튜너증폭기(1)와 IF증폭기(2)의 이득을 조절하는 제1 및 제2 D/A변환수단(31),(32), 상기 제1 업/다운 카운터(36)로부터 출력되는 신호를 상기 튜너증폭기(1)의 최대 이득과 비교하는 튜너증폭기 이득비교수단(33), 상기 제2업/다운 카운터(37)로부터 출력되는 신호를 상기 IF증폭기(2)의 최소이득과 비교하는 IF증폭기 이득비교수단(34), 상기 데이터 세그먼트 동기신호 검출수단(5)으로부터 출력되는 모드선택 신호(39)에 따라 상기 튜너증폭기 이득비교수단(33)과 IF증폭기 이득비교수단(34)의 출력신호 중 하나를 선택하는 멀티플렉서(35), 및 상기 데이터 세그먼트 동기신호 검출수단(5)으로부터 출력되는 인에이블 신호(40)와 멀티플렉서(35)로부터 출력되는 신호에 따라 상기 제1 및 제2 업/다운 카운터(36),(37)를 인에이블/디스에이블 시키는 카운터 인에이블 신호발생수단(38)으로 구성되는 것을 특징으로 하는 HDTV 수신기의 자동이득 조절장치.The first and second up / down counting apparatuses according to claim 1, wherein the gain control signal control means (3) up / down counts according to the mode selection signal (39) output from the data segment synchronization signal detection means (5). The tuner amplifier 1 and the IF amplifier by converting the signals output from the counters 36 and 37 and the first and second up / down counters 36 and 37 by D / A (Digital / Analog) conversion. Maximum gain of the tuner amplifier 1 by outputting signals output from the first and second D / A converting means 31 and 32 and the first up / down counter 36 to adjust the gain of (2). A tuner amplifier gain comparing means 33 for comparing with the IF amplifier gain comparing means 34 for comparing the signal output from the second up / down counter 37 with the minimum gain of the IF amplifier 2, and the data The tuner amplifier gain comparison means 33 and the IF amplifier gain ratio in accordance with the mode selection signal 39 output from the segment synchronization signal detecting means 5; The multiplexer 35 for selecting one of the output signals of the means 34 and the enable signal 40 output from the data segment synchronization signal detecting means 5 and the signal output from the multiplexer 35. And a counter enable signal generating means (38) for enabling / disabling the first and second up / down counters (36, 37). 제2항에 있어서, 상기 카운터 인에이블 신호발생수단(38)은 상기 멀티플렉서(35)로부터 출력되는 신호를 반전시키는 반전수단(383), 상기 데이타 세그먼트 동기신호 검출수단(5)으로부터 출력되는 인에이블 신호(40)와 상기 반전수단(383)으로부터 출력되는 신호를 논리곱하여 상기 제1 업/다운 카운터(36)의 인에이블 단자로 출력하는 제1 논리곱수단(381) 및 상기 데이터 세그먼트 동기신호 검출수단(5)으로부터 출력되는 인에이블 신호(40)와 상기 멀티플렉서(35)로부터 출력되는 신호를 논리곱하여 상기 제2 업/다운 카운터(37)의 인에이블 단자로 출력하는 제2논리곱수단(382)으로 구성되는 것을 특징으로 하는 HDTV 수신기의 자동이득 조절장치.3. The counter enable signal generating means (38) according to claim 2, wherein the counter enable signal generating means (38) is inverting means (383) for inverting the signal output from the multiplexer (35), and the enable output from the data segment synchronizing signal detecting means (5). First logical multiplication means 381 and the data segment synchronizing signal detection for ANDing the signal 40 and the signal output from the inverting means 383 and outputting the result to the enable terminal of the first up / down counter 36. Second logical multiplication means 382 which logically multiplies the enable signal 40 output from the means 5 and the signal output from the multiplexer 35 and outputs the result to the enable terminal of the second up / down counter 37. Automatic gain control device of the HDTV receiver, characterized in that consisting of. 제2항에 있어서, 상기 멀티플렉서(35)는 상기 데이타 세그먼트 동기신호 검출수단(5)으로부터 출력되는 모드선택 신호(39)가 하이레벨(High Level)이면 상기 IF증폭기 이득비교수단(34)의 출력신호를 선택하고, 상기 모드선택 신호(39)가 로우레벨(Low Level)이면 상기 튜너증폭기 이득비교수단(33)의 출력신호를 선택하여 상기 카운터 인에이블 신호발생수단(38)으로 출력하는 것을 특징으로 하는 HDTV 수신기의 자동이득 조절장치.3. The multiplexer (35) according to claim 2, wherein the multiplexer (35) outputs the IF amplifier gain comparison means (34) if the mode selection signal (39) output from the data segment synchronization signal detecting means (5) is at a high level. A signal is selected, and when the mode selection signal 39 is at a low level, the output signal of the tuner amplifier gain comparing means 33 is selected and output to the counter enable signal generating means 38. Automatic gain control of HDTV receivers. ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019940007626A 1994-04-12 1994-04-12 Agc circuit for hdtv receiver KR960013650B1 (en)

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Application Number Priority Date Filing Date Title
KR1019940007626A KR960013650B1 (en) 1994-04-12 1994-04-12 Agc circuit for hdtv receiver

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Application Number Priority Date Filing Date Title
KR1019940007626A KR960013650B1 (en) 1994-04-12 1994-04-12 Agc circuit for hdtv receiver

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KR960013650B1 KR960013650B1 (en) 1996-10-10

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100249236B1 (en) * 1997-11-03 2000-03-15 구자홍 Apparatus and Method for recovery data segment syne in DHTV
KR100252954B1 (en) * 1997-11-26 2000-04-15 구자홍 Apparatus for controlling agc of digital TV
KR100442232B1 (en) * 1997-08-28 2004-09-18 엘지전자 주식회사 Automatic gain control device of hdtv reducing gate size upon asic

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100442232B1 (en) * 1997-08-28 2004-09-18 엘지전자 주식회사 Automatic gain control device of hdtv reducing gate size upon asic
KR100249236B1 (en) * 1997-11-03 2000-03-15 구자홍 Apparatus and Method for recovery data segment syne in DHTV
KR100252954B1 (en) * 1997-11-26 2000-04-15 구자홍 Apparatus for controlling agc of digital TV

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