KR940013205A - Digital video conversion circuit - Google Patents
Digital video conversion circuit Download PDFInfo
- Publication number
- KR940013205A KR940013205A KR1019920022134A KR920022134A KR940013205A KR 940013205 A KR940013205 A KR 940013205A KR 1019920022134 A KR1019920022134 A KR 1019920022134A KR 920022134 A KR920022134 A KR 920022134A KR 940013205 A KR940013205 A KR 940013205A
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- South Korea
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- image data
- converted image
- generating means
- latch
- data generating
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Abstract
영상추적장치에서 중심추적연산시 표적영상과 배경영상의 분리에 의존됨에 따라 추적 성능이 저하되며 표적영상이 배경영상보다 밝거나 어두운지를 일일이 확인하여 수동으로 입력시켜야만 하는 것을 개선하다.Depending on the separation of the target image and the background image in the center tracking operation in the image tracking device, the tracking performance is degraded.
이를 위하여 디자탈의 입력 영상데이타를 화소클럭에 동기하여 래치하는 제1래치와, 미리 설정된 표적윈도우내의 평균밝기에 따른 다수의 변환 영상데이타를 저장하고 있으며 상기 제1래치수단에 래치된 영상데이타와 상기 평균밝기 데이타를 어드레스로 입력하여 입력 어드레스에 대응하는 변환 영상데이타를 출력하는 변환 영상데이타 발생수단과, 상기 변환 영상데이타 발생수단에서 출력되는 변환 영상데이타 발생수단과, 상기 변환 영상데이타 발생수단에서 출력되는 변환 영상데이타를 상기 화소클럭의 반전된 클럭에 동기하여 래치 출력되는 제2래치로 구성한다.To this end, a first latch for latching digital input image data in synchronization with the pixel clock, and a plurality of converted image data according to average brightness in a predetermined target window are stored. Converted image data generating means for inputting average brightness data as an address and outputting converted image data corresponding to an input address, converted image data generating means output from said converted image data generating means, and outputting from said converted image data generating means; The converted image data is composed of a second latch latched in synchronization with the inverted clock of the pixel clock.
따라서 표적영상을 강조변환하여 추적성능을 향상시킨다.Therefore, it enhances the tracking performance by highlighting the target image.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 중심추적방식의 윈도우 설정 예시도,1 is an example of setting the window of the central tracking method,
제2도는 본 발명에 따른 디지탈 영상변환회로도,2 is a digital image conversion circuit diagram according to the present invention;
제3도는 본 발명에 따른 변환함수의 설명도.3 is an explanatory diagram of a transform function according to the present invention.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920022134A KR940013205A (en) | 1992-11-23 | 1992-11-23 | Digital video conversion circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920022134A KR940013205A (en) | 1992-11-23 | 1992-11-23 | Digital video conversion circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
KR940013205A true KR940013205A (en) | 1994-06-25 |
Family
ID=67211057
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920022134A KR940013205A (en) | 1992-11-23 | 1992-11-23 | Digital video conversion circuit |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940013205A (en) |
-
1992
- 1992-11-23 KR KR1019920022134A patent/KR940013205A/en not_active Application Discontinuation
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Legal Events
Date | Code | Title | Description |
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WITN | Withdrawal due to no request for examination |