KR940002572Y1 - Video signal circuit using aft - Google Patents
Video signal circuit using aft Download PDFInfo
- Publication number
- KR940002572Y1 KR940002572Y1 KR2019910010788U KR910010788U KR940002572Y1 KR 940002572 Y1 KR940002572 Y1 KR 940002572Y1 KR 2019910010788 U KR2019910010788 U KR 2019910010788U KR 910010788 U KR910010788 U KR 910010788U KR 940002572 Y1 KR940002572 Y1 KR 940002572Y1
- Authority
- KR
- South Korea
- Prior art keywords
- video signal
- aft
- signal
- tuner
- channel
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/90—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for satellite broadcast receiving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J7/00—Automatic frequency control; Automatic scanning over a band of frequencies
- H03J7/02—Automatic frequency control
- H03J7/04—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/65—Arrangements characterised by transmission systems for broadcast
- H04H20/71—Wireless systems
- H04H20/74—Wireless systems of satellite networks
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Astronomy & Astrophysics (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
내용 없음.No content.
Description
제 1 도는 본 고안의 전체 회로도.1 is an overall circuit diagram of the present invention.
제 2 도는 채널변화시 BB신호의 VT신호 및 AGC신호의 변화 파형도.2 is a change waveform diagram of a V T signal and an AGC signal of a BB signal when a channel is changed.
제 3 도는 본 고안의 튜너 내부구성도.3 is a tuner internal configuration of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10 : BS튜너 11 : 혼합기10: BS tuner 11: Mixer
12,18,19 : 버퍼증폭기 13 : VCO12,18,19: Buffer Amplifier 13: VCO
14 : AGC 16 : 복조회로14: AGC 16: demodulation circuit
17 : 발진기 20 : 마이콤17: oscillator 20: micom
30 : 비디오신호 억제회로30: video signal suppression circuit
본 고안은 위성방송 수신장치의 비디오신호 억제회로에 관한 것으로, 특히 BS튜너의 AFT를 이용한 비디오신호 억제회로에 관한 것이다.The present invention relates to a video signal suppression circuit of a satellite broadcasting receiver, and more particularly, to a video signal suppression circuit using an AFT of a BS tuner.
일반적으로 위성방송은 10.95GHz에서 12.75GHz까지의 범위의 전자파를 적도선넘어 정지위성에서 더 넓은 지역에 방송작동을 실행하기 위해 지상에 전송한다.In general, satellite broadcasting transmits electromagnetic waves in the range from 10.95 GHz to 12.75 GHz over the equator to the ground for broadcast operation over a wider area from the stationary satellite.
높은 이득의 포물선형 안테나 혹은 그곳의 평면안테나는 그들을 안테나 부근의 1GHz밴드의 신호를 즉시 변환하도록 전파를 받는다.High-gain parabolic antennas or planar antennas are propagated to convert them immediately in the signal of 1 GHz band near the antenna.
이것은 받은 신호가 옥내수신기에 케이블에 의해 전송되기 원하기 때문이고, 그래서 그 주파수는 세기에 있어 충분한 신호를 만들기 위하여 더 낮게 만들어진다.This is because the received signal wants to be transmitted by the cable to the indoor receiver, so the frequency is made lower to make enough signal in strength.
이와같은 위성수신장치에는 AGC타입의 튜너를 보통 사용하므로 채널이 변환될 때 순간적으로 입력 RF값이 없고, 따라서 AGC가 작동되어 BB(Base Band)출력으로 파형을 출력하는데 이 파형은 TV화면상에도 순간적으로 나타나고 또한 오디오 신호음에서도 영향을 미쳐서 "뻑"하는 잡음소리를 발생하는 폐단이 있다.AGC-type tuners are usually used in such satellite receivers, so when the channel is converted, there is no instantaneous input RF value. Therefore, the AGC is activated and the waveform is output to the base band (BB) output. There is a closed loop that appears instantaneously and also affects the audio signal, producing a "stiff" noise.
본 고안은 상기한 종래의 폐단을 해결하기 위하여 안출한 것으로, 본 고안의 목적은 위성방송 수신장치의 회로를 복잡하게 추가함이 없이 BS튜너의 AFT(Auto Fine Tunning)단자에 전압변동을 걸어 비디오신호 억제기능은 물론 오디오신호 변동도 억제하는 BS튜너의 AFT를 이용한 비디오신호 억제회로를 제공함에 있다.The present invention was devised to solve the above-mentioned conventional discontinuity. The object of the present invention is to change the voltage of the AFT (Auto Fine Tunning) terminal of BS tuner without adding the circuit of the satellite broadcasting receiver. The present invention provides a video signal suppression circuit using an AFT of a BS tuner that suppresses not only a signal suppression function but also an audio signal variation.
상기한 본 고안의 목적을 달성하기 위한 기술적 구성은, BS튜너의 AFT단자와 마이콤의 제어단자 사이에 비디오신호 억제신호를 구성하여 채널변화시 복조회로의 동작을 차단시켜 BB출력신호가 출력되지 않도록 하며, 상기 비디오신호 억제회로는 오픈 콜렉터 타입의 구동 트랜지스터와 스위칭 트랜지스터을 이용하여 구성한 것을 특징으로 한다.The technical configuration for achieving the object of the present invention is to configure the video signal suppression signal between the AFT terminal of the BS tuner and the control terminal of the microcomputer to block the operation of the demodulation circuit when the channel is changed to output the BB output signal. The video signal suppression circuit may be configured using an open collector type driving transistor and a switching transistor.
이하 첨부된 도면에 의하여 본 고안의 바람직한 실시예를 상세히 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
제 1 도는 본 고안의 회로구성도이다.1 is a circuit diagram of the present invention.
여기에서 BS튜너(10)의 AFT단자와 마이콤(20)의 제어단자(PA1)사이에 비디오신호 억제회로(30)가 연결된다.The video signal suppression circuit 30 is connected between the AFT terminal of the BS tuner 10 and the control terminal PA1 of the microcomputer 20.
상기 BS튜너(10)의 AFT단자에는 구동용 PNP트랜지스터(Q1)의 콜렉터가 연결되고 에미터는 12V전원전압이 연결된다.The collector of the driving PNP transistor Q 1 is connected to the AFT terminal of the BS tuner 10, and the emitter is connected to a 12V power supply voltage.
상기 트랜지스터(Q1)의 베이스에는 저항소자(R1)를 통하여 스위칭용 NPN트랜지스터(Q2)의 콜렉터를 연결하고 에미터는 접지시키며 베이스는 저항소자(R2)를 통하여 상기 마이콤(20)의 제어단자(PA1)에 연결하여 구성한다.The collector of the switching NPN transistor Q 2 is connected to the base of the transistor Q 1 through a resistor R 1 , the emitter is grounded, and the base of the transistor Q 1 is connected to the base of the microcomputer 20 through the resistor R 2 . It is configured by connecting to the control terminal (PA1).
이하 제 2 도를 참조하여 이들의 작용 효과를 설명한다.Hereinafter, with reference to Figure 2 will be described the effect of these.
BS 튜너(10)의 채널변화시 위상동기루프(PLL)회로(도시되지 않음)가 작동되어 튜닝전압(VT)이 맞추어지고 비디오신호와 오디오신호가 세팅된다.When the channel of the BS tuner 10 changes, a phase locked loop (PLL) circuit (not shown) is operated to adjust the tuning voltage V T and to set a video signal and an audio signal.
제 2 도에 도시한 바와 같이 채널 1에서 채널 2로 변환되는 경우 채널 1상태와 채널 2상태는 안정상태로 아무런 이상이 없다.As shown in FIG. 2, when the channel 1 is converted from the channel 1 to the channel 2, the channel 1 state and the channel 2 state are stable.
반면에, 채널 1에서 채널 2로 변환되는 중간단계에 PLL이 변화되며, 따라서 BS튜너(10)내의 입력 RF값은 낮아지게 되고 포워드(Forward)AGC방식에 따라 AGC전압이 안정된 4V에서 갑자기 상승하여 입력 RF값이 높아지면서 다시 4V로 안정하게 내려가는 파형이 나타난다.On the other hand, the PLL is changed in the intermediate stage of the conversion from channel 1 to channel 2, so that the input RF value in the BS tuner 10 is lowered and the AGC voltage suddenly rises at a stable 4V according to the forward AGC method. As the input RF value increases, a waveform appears to steadily drop back to 4V.
이 AGC파형이 거의 BS튜너(10)의 BB단자로 나타나게 된다.This AGC waveform appears almost at the BB terminal of the BS tuner 10.
상기 BB단자는 베이스 밴드의 비디오신호와 서브캐리어 오디오신호가 나오는 단자로 비디오 화면에 영향을 주며 비디오보다는 오디오음에 영향을 더 미친다.The BB terminal is a terminal for outputting a baseband video signal and a subcarrier audio signal, which affects a video screen and affects audio sound more than video.
여기에서 채널 1과 채널 2사이의 중간 단계동안 PLL은 동작하고 비디오신호 억제를 하며 AGC변동전압이 BB출력으로 나가지 못하게 하기 위하여 제 3 도와 같은 BS튜너를 구성한다.Here, during the intermediate stage between channel 1 and channel 2, the PLL operates, suppresses the video signal, and configures the BS tuner like the third degree to prevent the AGC fluctuation voltage from going to the BB output.
여기에서 입력신호는 혼합기(11)에서 버퍼 증폭기(12)를 통한 VCO(13)신호와 혼합되고, 이 혼합신호는 AGC(14)를 통하여 479.5MHz의 IF신호가 만들어진다.Here, the input signal is mixed with the VCO 13 signal through the buffer amplifier 12 in the mixer 11, and this mixed signal is made an IF signal of 479.5 MHz through the AGC 14.
이 IF 신호는 복조회로(16)에서 복조되어 버퍼증폭기(18)를 통하여 BB단자로 출력되고 그 일부량이 버퍼증폭기(19)를 통해 피드백되어 AFT단자와 발진회로(17)에 공급된다.The IF signal is demodulated by the demodulation circuit 16 and outputted to the BB terminal through the buffer amplifier 18, and a part of it is fed back through the buffer amplifier 19 and supplied to the AFT terminal and the oscillation circuit 17.
상기 발진회로(17)의 발진주파수는 479.5MHz로 BB크기에 따라 전압은 8.5V±1V까지 변동되고 주파수는 479.5MHz±5MHz까지 변동된다.The oscillation frequency of the oscillation circuit 17 is 479.5MHz, the voltage varies by 8.5V ± 1V and the frequency varies by 479.5MHz ± 5MHz according to the BB size.
이때 제 1 도에 도시된 바와 같이 오픈 콜렉터 타입의 비디오신호 억제회로(30)가 동작된다.At this time, as shown in FIG. 1, the open collector type video signal suppression circuit 30 is operated.
제 1 도에서 마이콤(20)의 제어단자(PA1)신호가 OV이면 저항(R2)을 통한 트랜지스터(Q2)의 베이스 인가신호가 로우로 되어 상기 트랜지스터(Q2)는 오프된다.In FIG. 1, when the control terminal PA1 signal of the microcomputer 20 is OV, the base application signal of the transistor Q 2 through the resistor R 2 goes low and the transistor Q 2 is turned off.
따라서 상기 오프된 트랜지스터(Q2)의 콜렉터에 저항(R1)을 통하여 연결된 트랜지스터(Q1)의 베이스에 하이 신호가 인가되므로 상기 트랜지스터(Q1)도 오프된다.Accordingly, since the high signal is applied to the base of the transistor Q 1 connected to the collector of the turned off transistor Q 2 through the resistor R 1 , the transistor Q 1 is also turned off.
그러므로 BS튜너(10)의 AFT전압은 8.5V이다.Therefore, the AFT voltage of BS tuner 10 is 8.5V.
한편, 상기 마이콤(20)의 제어단자(PA1)신호가 5V이면 상기 두 트랜지스터(Q2)(Q1)는 모두 온되므로 BS튜너(10)의 AFT단자 전압은 12V이다.On the other hand, when the control terminal PA1 signal of the microcomputer 20 is 5V, the two transistors Q 2 and Q 1 are both turned on, so the AFT terminal voltage of the BS tuner 10 is 12V.
상기 BS튜너(10)의 AFT전압이 12V이면 제 3 도에서 IF=479.5MHz발진신호와 멀어지게 되고, IF신호가 복조회로(16)에서 복조되지 않는다.If the AFT voltage of the BS tuner 10 is 12V, it is far from the IF = 479.5MHz oscillation signal in FIG. 3, and the IF signal is not demodulated in the demodulation circuit 16. FIG.
따라서 버퍼증폭기(18)를 통한 BB출력은 없게 된다.Therefore, there is no BB output through the buffer amplifier 18.
이와같이 비디오신호가 억제되는 시간은 채널 1에서 채널 2로 변경될 때 PLL이 맞추어지는 최대시간 60msec를 측정한 후 같은 70msec로 한다.In this way, the time at which the video signal is suppressed is set to 70 msec after measuring the maximum time of 60 msec when the PLL is adjusted when changing from channel 1 to channel 2.
채널 1에서 채널 2로 바뀌면 PLL은 변경되어 60msec이내에 종료가 되며 그 사이에 AGC전압은 변동하게 되지만 비디오 억제시간이 70msec정도 걸려서 AGC전압변동은 복조회로(16)에서 차단되고 BB단자로 신호출력이 없으므로 채널 2의 PLL이 안정화된 상태에서, 즉 AGC전압이 안정화된 상태에서 비디오신하고 억제되도록 마이콤을 프로그램하여 조절한다.When changing from channel 1 to channel 2, the PLL is changed to finish within 60msec, and the AGC voltage fluctuates in the meantime, but the video suppression time takes about 70msec. Since the PLL of channel 2 is stabilized, that is, the AGC voltage is stabilized, the microcomputer is programmed and adjusted to suppress the video scene.
이상과 같이 본 고안에 의하면 화면이 안정화되고, 채널변화시 출력되는 잡음성분을 제거하며 비디오신호억제회로가 간단하여 제품에 신뢰성이 향상되는 효과가 있다.As described above, according to the present invention, the screen is stabilized, the noise component outputted when the channel is changed, and the video signal suppression circuit is simple has the effect of improving reliability in the product.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019910010788U KR940002572Y1 (en) | 1991-07-13 | 1991-07-13 | Video signal circuit using aft |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019910010788U KR940002572Y1 (en) | 1991-07-13 | 1991-07-13 | Video signal circuit using aft |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR930003833U KR930003833U (en) | 1993-02-26 |
| KR940002572Y1 true KR940002572Y1 (en) | 1994-04-20 |
Family
ID=19316403
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019910010788U KR940002572Y1 (en) | 1991-07-13 | 1991-07-13 | Video signal circuit using aft |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR940002572Y1 (en) |
-
1991
- 1991-07-13 KR KR2019910010788U patent/KR940002572Y1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR930003833U (en) | 1993-02-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4592093A (en) | Super high frequency receiver | |
| KR0157413B1 (en) | Receiver for terrestrial am and satellite fm-tv broadcasting signal | |
| US5321852A (en) | Circuit and method for converting a radio frequency signal into a baseband signal | |
| US4667243A (en) | Television receiver for direct broadcast satellite signals | |
| KR100339318B1 (en) | Terrestrial and satellite television reception tuner | |
| JPH0678227A (en) | Method and apparatus for reception of broadcasting signal | |
| US4881272A (en) | Multi-band FM receiver for receiving FM broadcasting signals and TV broadcasting sound signals | |
| EP0470504A2 (en) | Fixed RF AGC of a television tuner for FM reception in a television receiver | |
| US6795128B2 (en) | Television tuner capable of receiving FM broadcast | |
| US20010045994A1 (en) | Tuner apparatus | |
| US6683656B1 (en) | Video intermediate frequency processing apparatus | |
| US6731348B2 (en) | Television tuner having simple layout and capable of receiving FM broadcast signals without interference | |
| US6483552B1 (en) | Television tuner | |
| KR940002572Y1 (en) | Video signal circuit using aft | |
| JP2000078490A (en) | Television tuner | |
| EP0470484A2 (en) | Information radio reception in a television receiver by synthesizing only center frequency | |
| JP3357436B2 (en) | Video intermediate frequency processing device | |
| JPH0730456A (en) | Television tuner | |
| JPH11341373A (en) | Tuner for receiving digital broadcasting | |
| US5303410A (en) | Signal strength meter circuit for radio receiver | |
| KR970007889B1 (en) | A receiver tuner for satellite broadcast and cable broadcast | |
| KR930000964Y1 (en) | Automatic gain control circuit for tv tuner | |
| JP2880223B2 (en) | Television receiver | |
| JP2730056B2 (en) | Television tuner | |
| JPH08289221A (en) | Digital and analog sharing tuner |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E701 | Decision to grant or registration of patent right | ||
| REGI | Registration of establishment | ||
| LAPS | Lapse due to unpaid annual fee |