KR930011714A - Image Processing Circuit and Method - Google Patents

Image Processing Circuit and Method Download PDF

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Publication number
KR930011714A
KR930011714A KR1019910020911A KR910020911A KR930011714A KR 930011714 A KR930011714 A KR 930011714A KR 1019910020911 A KR1019910020911 A KR 1019910020911A KR 910020911 A KR910020911 A KR 910020911A KR 930011714 A KR930011714 A KR 930011714A
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KR
South Korea
Prior art keywords
signal
line memory
image processing
delayed
video signal
Prior art date
Application number
KR1019910020911A
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Korean (ko)
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KR940009545B1 (en
Inventor
정준모
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강진구
삼성전자 주식회사
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Priority to KR1019910020911A priority Critical patent/KR940009545B1/en
Publication of KR930011714A publication Critical patent/KR930011714A/en
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Publication of KR940009545B1 publication Critical patent/KR940009545B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/77—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase
    • H04N9/78—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase for separating the brightness signal or the chrominance signal from the colour television signal, e.g. using comb filter

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

내용 없음No content

Description

영상처리회로 및 방법Image Processing Circuit and Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도는 종래의 영상처리 회로도.1 is a conventional image processing circuit diagram.

제 2 도는 본 발명에 따른 영상처리 회로도.2 is an image processing circuit diagram according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

100, 200 : 제1-제 2 라인메모리 300 : MUX100, 200: 1st-2nd line memory 300: MUX

400 : 영상신호 처리부400: image signal processing unit

Claims (2)

디지탈 영상처리 시스템에서 NTSC 복합영상신호나 슈퍼 VHS 신호의 영상처리시 라인메모리를 공통으로 사용하는 라인메모리를 이용한 영상처리회로에 있어서, 제 1 입력단자(P11)를 통해 입력된 NTSC 복합영상신호와 슈퍼 VHS 휘도신호를 입력하여 1H 지연 출력하는 제 1 라인메모리(100)와, 상기 제 1 라인메모리(100)에서 1H 지연된 복합영상신호(VH)와 제 2 입력단자(P12)를 통해 입력된 슈퍼 VHS 색신호중 사용자의 선택에 의해 소정 선택 제어신호에 의해 하나의 신호를 선택 출력하는 MUX(300)와, 상기 MUX(300)에서 선택된 신호를 1H 지연시켜 출력하는 제 2 라인메모리(200)와, 상기 제 1 입력단자(P11)를 통해 입력된 NTSC 복합영상신호나 슈퍼 VHS 휘도신호를 입력하고 상기 제 1 라인메모리(100)에서 1H 지연된 NTSC 복합영상신호나 1H 지연된 슈퍼 VHS 신호를 입력아혀 상기 제 2 라인메모리(200)에서 1H 지연된 신호를 입력하여 영상신호를 처리하는 영상신호처리부(400)로 구성함을 특징으로 하는 회로.An image processing circuit using a line memory that commonly uses a line memory for image processing of an NTSC composite video signal or a super VHS signal in a digital image processing system, comprising: an NTSC composite video signal input through a first input terminal P11; The first line memory 100 for inputting the super VHS luminance signal and outputting the 1H delay, and the super video inputted through the composite video signal VH and the second input terminal P12 delayed by 1H from the first line memory 100. A MUX 300 that selects and outputs one signal by a predetermined selection control signal according to a user's selection among VHS color signals, a second line memory 200 which delays and outputs the signal selected by the MUX 300 by 1H; The NTSC composite video signal or the super VHS luminance signal input through the first input terminal P11 is input, and the 1SC delayed NTSC composite video signal or 1H delayed super VHS signal is input from the first line memory 100.And a video signal processor (400) for processing a video signal by inputting a 1H delayed signal from the two-line memory (200). 제 1-제 2 라인메모리(100, 200)를 구비하여 NTSC 복합영상신호와 슈퍼 VHS 신호를 영상처리하는 디지탈 영상처리 시스템의 라인메모리를 이용한 영상처리 방법에 있어서, 상기 NTSC 복합영상의 영상처리시에는 상기 제 1 라인메모리(100)에서 1H 지연된 복합영상신호(VH)를 선택하여 1H 지연시키고 상기 슈퍼 VHS 신호의 영상처리시에는 슈퍼 VHS 색신호를 선택하여 1H 지연시켜 상기 제 2 라인메모리(200)를 공통으로 사용함을 특징으로 하는 방법.An image processing method using a line memory of a digital image processing system having first and second line memories 100 and 200 for image processing an NTSC composite video signal and a super VHS signal, wherein the image processing of the NTSC composite image is performed. In the first line memory 100, the 1H delayed composite video signal VH is selected and delayed by 1H. When the video processing of the super VHS signal is performed, the super VHS color signal is selected and delayed by 1H. Method for using in common. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910020911A 1991-11-22 1991-11-22 Image processing circuit and method KR940009545B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910020911A KR940009545B1 (en) 1991-11-22 1991-11-22 Image processing circuit and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910020911A KR940009545B1 (en) 1991-11-22 1991-11-22 Image processing circuit and method

Publications (2)

Publication Number Publication Date
KR930011714A true KR930011714A (en) 1993-06-24
KR940009545B1 KR940009545B1 (en) 1994-10-14

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ID=19323289

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910020911A KR940009545B1 (en) 1991-11-22 1991-11-22 Image processing circuit and method

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KR (1) KR940009545B1 (en)

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Publication number Publication date
KR940009545B1 (en) 1994-10-14

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