KR930001637U - 반가산기 회로 - Google Patents

반가산기 회로

Info

Publication number
KR930001637U
KR930001637U KR2019910008757U KR910008757U KR930001637U KR 930001637 U KR930001637 U KR 930001637U KR 2019910008757 U KR2019910008757 U KR 2019910008757U KR 910008757 U KR910008757 U KR 910008757U KR 930001637 U KR930001637 U KR 930001637U
Authority
KR
South Korea
Prior art keywords
adder circuit
half adder
circuit
adder
Prior art date
Application number
KR2019910008757U
Other languages
English (en)
Other versions
KR940000256Y1 (ko
Inventor
김성식
Original Assignee
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론 주식회사 filed Critical 금성일렉트론 주식회사
Priority to KR2019910008757U priority Critical patent/KR940000256Y1/ko
Publication of KR930001637U publication Critical patent/KR930001637U/ko
Application granted granted Critical
Publication of KR940000256Y1 publication Critical patent/KR940000256Y1/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/502—Half adders; Full adders consisting of two cascaded half adders

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
KR2019910008757U 1991-06-13 1991-06-13 반가산기 회로 KR940000256Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910008757U KR940000256Y1 (ko) 1991-06-13 1991-06-13 반가산기 회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910008757U KR940000256Y1 (ko) 1991-06-13 1991-06-13 반가산기 회로

Publications (2)

Publication Number Publication Date
KR930001637U true KR930001637U (ko) 1993-01-21
KR940000256Y1 KR940000256Y1 (ko) 1994-01-19

Family

ID=19315078

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910008757U KR940000256Y1 (ko) 1991-06-13 1991-06-13 반가산기 회로

Country Status (1)

Country Link
KR (1) KR940000256Y1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100437841B1 (ko) * 2002-01-02 2004-06-30 주식회사 하이닉스반도체 반가산기 회로

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100437841B1 (ko) * 2002-01-02 2004-06-30 주식회사 하이닉스반도체 반가산기 회로

Also Published As

Publication number Publication date
KR940000256Y1 (ko) 1994-01-19

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Legal Events

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Year of fee payment: 12

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