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Priority to KR1019910005920ApriorityCriticalpatent/KR920020595A/en
Publication of KR920020595ApublicationCriticalpatent/KR920020595A/en
Internal Circuitry In Semiconductor Integrated Circuit Devices
(AREA)
Abstract
내용 없음No content
Description
반도체 장치의 제조방법Manufacturing Method of Semiconductor Device
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명 반도체 장치의 공정 단면도.2 is a process sectional view of the semiconductor device of the present invention.
Claims (1)
p웰(1)에 워드라인을 위한 게이트 포리실리콘(2)을 형성하고 이온주입영역(3)을 형성한 후 실리콘 산화막(4)을 전 표면에 증착하여 콘텍(5)을 형성하는 공정과, 상기 콘텍(5)에 불순물이 도핑되지 않은 얇은 실리콘층(6)을 에피택시 성장법에 의해 선택적으로 형성하는 공정과, 불순물이 도핑된 폴리실리콘(7)을 형성한 후 패터닝 하는 공정을 차례로 실시하여서 이루어짐을 특징으로 하는 반도체 장치의 제조방법.forming a gate polysilicon (2) for a word line in the p well (1), forming an ion implantation region (3), and then depositing a silicon oxide film (4) on the entire surface to form a contact (5); Selectively forming a thin silicon layer (6) which is not doped with impurities in the contact (5) by epitaxial growth, and then forming and patterning the polysilicon (7) doped with impurities. The semiconductor device manufacturing method characterized by the above-mentioned.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910005920A1991-04-121991-04-12
Manufacturing Method of Semiconductor Device
KR920020595A
(en)