KR920013153U - Databus arbitrator in multiprocessor system - Google Patents

Databus arbitrator in multiprocessor system

Info

Publication number
KR920013153U
KR920013153U KR2019900020972U KR900020972U KR920013153U KR 920013153 U KR920013153 U KR 920013153U KR 2019900020972 U KR2019900020972 U KR 2019900020972U KR 900020972 U KR900020972 U KR 900020972U KR 920013153 U KR920013153 U KR 920013153U
Authority
KR
South Korea
Prior art keywords
databus
arbitrator
multiprocessor system
multiprocessor
databus arbitrator
Prior art date
Application number
KR2019900020972U
Other languages
Korean (ko)
Other versions
KR930004910Y1 (en
Inventor
박병관
강경용
심원세
기안도
윤용호
박진원
Original Assignee
재단법인 한국전자통신연구소
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 재단법인 한국전자통신연구소 filed Critical 재단법인 한국전자통신연구소
Priority to KR2019900020972U priority Critical patent/KR930004910Y1/en
Publication of KR920013153U publication Critical patent/KR920013153U/en
Application granted granted Critical
Publication of KR930004910Y1 publication Critical patent/KR930004910Y1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1657Access to multiple memories
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663Access to shared memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
KR2019900020972U 1990-12-26 1990-12-26 Data bus arbitrator for multiprocessor system KR930004910Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019900020972U KR930004910Y1 (en) 1990-12-26 1990-12-26 Data bus arbitrator for multiprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019900020972U KR930004910Y1 (en) 1990-12-26 1990-12-26 Data bus arbitrator for multiprocessor system

Publications (2)

Publication Number Publication Date
KR920013153U true KR920013153U (en) 1992-07-27
KR930004910Y1 KR930004910Y1 (en) 1993-07-26

Family

ID=19307817

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019900020972U KR930004910Y1 (en) 1990-12-26 1990-12-26 Data bus arbitrator for multiprocessor system

Country Status (1)

Country Link
KR (1) KR930004910Y1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000050957A (en) * 1999-01-16 2000-08-05 구자홍 device for mounting out case and top cover in washing machine
KR101203555B1 (en) * 2005-06-29 2012-11-22 엘지전자 주식회사 Commercial cleaning apparatus

Also Published As

Publication number Publication date
KR930004910Y1 (en) 1993-07-26

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