KR910015824U - System memory expansion circuit - Google Patents

System memory expansion circuit

Info

Publication number
KR910015824U
KR910015824U KR2019900002368U KR900002368U KR910015824U KR 910015824 U KR910015824 U KR 910015824U KR 2019900002368 U KR2019900002368 U KR 2019900002368U KR 900002368 U KR900002368 U KR 900002368U KR 910015824 U KR910015824 U KR 910015824U
Authority
KR
South Korea
Prior art keywords
system memory
expansion circuit
memory expansion
circuit
memory
Prior art date
Application number
KR2019900002368U
Other languages
Korean (ko)
Other versions
KR920002579Y1 (en
Inventor
박상우
Original Assignee
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사 filed Critical 주식회사 금성사
Priority to KR2019900002368U priority Critical patent/KR920002579Y1/en
Priority to JP1991009018U priority patent/JP2558586Y2/en
Publication of KR910015824U publication Critical patent/KR910015824U/en
Application granted granted Critical
Publication of KR920002579Y1 publication Critical patent/KR920002579Y1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615Address space extension
    • G06F12/0623Address space extension for memory modules
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Impression-Transfer Materials And Handling Thereof (AREA)
  • Color, Gradation (AREA)
  • Dram (AREA)
KR2019900002368U 1990-02-28 1990-02-28 System memory expansion circuit KR920002579Y1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR2019900002368U KR920002579Y1 (en) 1990-02-28 1990-02-28 System memory expansion circuit
JP1991009018U JP2558586Y2 (en) 1990-02-28 1991-02-26 Ink film and photographic paper mounting device for color video printer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019900002368U KR920002579Y1 (en) 1990-02-28 1990-02-28 System memory expansion circuit

Publications (2)

Publication Number Publication Date
KR910015824U true KR910015824U (en) 1991-09-25
KR920002579Y1 KR920002579Y1 (en) 1992-04-25

Family

ID=19296397

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019900002368U KR920002579Y1 (en) 1990-02-28 1990-02-28 System memory expansion circuit

Country Status (2)

Country Link
JP (1) JP2558586Y2 (en)
KR (1) KR920002579Y1 (en)

Also Published As

Publication number Publication date
KR920002579Y1 (en) 1992-04-25
JPH0744312U (en) 1995-11-14
JP2558586Y2 (en) 1997-12-24

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Legal Events

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E701 Decision to grant or registration of patent right
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