KR910013467A - Semiconductor device mounting and cooling system and regulated power supply system - Google Patents

Semiconductor device mounting and cooling system and regulated power supply system Download PDF

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KR910013467A
KR910013467A KR1019890018635A KR890018635A KR910013467A KR 910013467 A KR910013467 A KR 910013467A KR 1019890018635 A KR1019890018635 A KR 1019890018635A KR 890018635 A KR890018635 A KR 890018635A KR 910013467 A KR910013467 A KR 910013467A
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semiconductor device
semiconductor
heat sink
terminal
conductive contact
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KR970006207B1 (en
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킹 놀벡 딘
로버트 슈네쯔카 2세 해롤드
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원본미기재
요크 인터내셔널 코포레이션
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/115—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4018—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by the type of device to be heated or cooled
    • H01L2023/4025—Base discrete devices, e.g. presspack, disc-type transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4037—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
    • H01L2023/4043—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink heatsink to have chip
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
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Abstract

내용 없음.No content.

Description

반도체 소자 장착 및 냉각 시스템과 이를 이용한 조절된 전력 공급 시스템Semiconductor device mounting and cooling system and regulated power supply system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제6도는 본 발명의 실시예에 따라 구성된 반도체 장치를 도시한 도면,6 shows a semiconductor device constructed in accordance with an embodiment of the present invention;

제7도는 제6도에 도시된 반도체 장치에서 생기는 열 전달을 모델화하기 위한 전기 회로 아날로그를 도시한 도면,FIG. 7 shows an electrical circuit analog for modeling heat transfer occurring in the semiconductor device shown in FIG.

제8도는 본 발명의 또다른 실시예에 따라 구성된 반도체 장치를 도시한 도면.8 shows a semiconductor device constructed in accordance with another embodiment of the present invention.

Claims (32)

정상 상태 작동 동안에 소자가 발생시키는 열보다 더 큰 비율로 열을 발생시키는 초기 과도 주기 동안을 포함하는 충격 사이클이 이루어지는 하나 이상의 반도체 소자를 장착 및 냉각시키기 위한 시스템에서, 반도체 소자의 최소한 하나의 제1폴과 열 및 전기적 전도성 접촉 상태인 전도성 단자 수단과, 소자 동작 동안 반도체 소자내에서 발생된 열을 수용하기 위해 상기 단자 수단과 열적으로 전도성 접촉 상태인 제1열 싱크 수단과, 소자 동작 동안 반도체 내 소자내에서 발생된 열을 수용하기 위해 상기 반도체 소자와 열 전도성 접촉 상태인 제2열 싱크 수단을 구비하며, 상기 제1 및 제2열 싱크 수단은 소자 동작 소정의 과도 및 정상 상태 동작 주기 동안 반도체 소자를 소정의 최대 온도를 또는 그 이하로 유지하기 위해 각각 제1 및 제2소정의 열 용량을 가지는 것을 특징으로 하는 반도체 소자 장착 및 냉각 시스템.In a system for mounting and cooling one or more semiconductor devices in which an impact cycle comprises during an initial transient period in which heat is generated at a rate greater than heat generated by the device during steady state operation, at least one first of the semiconductor devices. Conductive terminal means in thermal and electrically conductive contact with the pole, first heat sink means in thermally conductive contact with the terminal means to receive heat generated in the semiconductor device during device operation, and in the semiconductor during device operation A second heat sink means in thermally conductive contact with the semiconductor device to receive heat generated within the device, wherein the first and second heat sink means comprise a semiconductor during a predetermined transient and steady state operation period of device operation. First and second predetermined thermal capacities, respectively, to maintain the device at or below a predetermined maximum temperature. Semiconductor device mounting and cooling system, she characterized in that it has. 제1항에 있어서, 상기 제2열 싱크 수단은 과도 주기 동안 온도를 증가시키고 그리고 상기 최대 접합부 온도 가깝게 그러나 초과하지 않는 온도에 도달하도록 설계된 고형(solid) 블럭인 것을 특징으로 하는 반도체 소자 장착 및 냉각 시스템.2. The device of claim 1, wherein said second heat sink means is a solid block designed to increase the temperature during a transient period and to reach a temperature close to but not exceeding the maximum junction temperature. system. 제2항에 있어서, 상기 열 싱크 수단은 각 반도체 소자를 위한 개별 블럭을 포함하는 것을 특징으로 하는 반도체 소자 장착 및 냉각 시스템.3. The semiconductor device mounting and cooling system as recited in claim 2 wherein said heat sink means comprises a separate block for each semiconductor device. 제3항에 있어서, 상기 제1열 싱크 수단은 공냉 핀을 구비하는 것을 특징으로 하는 반도체 소자 장착 및 냉각 시스템.4. The semiconductor device mounting and cooling system as recited in claim 3 wherein said first heat sink means comprises air cooling fins. 제3항에 있어서, 상기 제1열 싱크는 액체 냉각 수단을 구비하는 것을 특징으로 하는 반도체 소자 장착 및 냉각 시스템.4. The semiconductor device mounting and cooling system as recited in claim 3 wherein said first heat sink comprises liquid cooling means. 반도체 장치에 있어서, 대향하는 제1 및 제2폴 면을 갖는 디스크형 반도체 소자와, 상기 소자의 제1폴면과 전기적 및 열전도성 접촉성인 제1전도성 단자 수단과, 반도체 소자 동작 동안 상기 소자내에서 발생하는 열을 수용하기 위해 상기 제1열 전도성 단자 수단과 열 전도성 접촉 상태인 제1열 싱크 수단과, 소자 동작 동안 상기 반도체 소자내에서 발생된 열을 수용하기 위해 상기 반도체 소자와 열 전도성 접촉 상태인 제2열 싱크 수단과, 상기 제2열 싱크와 상기 반도체 소자 사이를 압착시키기 위한 압착성 장착력을 인가하는 수단을 구비하며, 상기 제1 및 제2열 싱크 수단은 반도체 소자를 소자 작동의 소정 과도 및 정상 상태 주기동안 소정의 최대 접합부 온도로 또는 그 이하로 유지하기 위해 각각의 제1 및 제2소정의 열 용량을 가지며, 상기 반도체 소자는 정상 상태 작동 주기보다 상기 과도 동작 주기동안 더 큰 열을 발생하는 것을 특징으로 하는 반도체 장치.A semiconductor device comprising: a disk-shaped semiconductor element having opposing first and second pole faces, first conductive terminal means in electrical and thermally conductive contact with the first pole face of the element, and within the device during semiconductor element operation. A first heat sink means in thermally conductive contact with the first thermally conductive terminal means to receive heat generated, and a thermally conductive contact with the semiconductor element to receive heat generated within the semiconductor device during device operation A second heat sink means and means for applying a compressive mounting force for compressing the second heat sink and the semiconductor element, wherein the first and second heat sink means provide a semiconductor device with a device operation. Said semiconductor having respective first and second predetermined thermal capacities to maintain at or below a predetermined maximum junction temperature for a predetermined transient and steady state period, The semiconductor device characterized in that it generates a larger heat during said transient operation period than the period in normal operation state. 제6항에 있어서, 상기 장치는 제2전도성 단자 수단을 구비하며, 여기서 상기 열 싱크는 상기 제2단자와 상기 반도체 소자와 열 및 전기적 도전성 접촉 상태인 것을 특징으로 하는 반도체 장치.7. A semiconductor device according to claim 6, wherein said device comprises a second conductive terminal means, wherein said heat sink is in thermal and electrically conductive contact with said second terminal and said semiconductor element. 제6항에 있어서, 상기 제1열 싱크 수단은 공냉식 핀을 구비하는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 6, wherein said first heat sink means comprises an air-cooled fin. 제6항에 있어서, 상기 제1열 싱크 수단은 액체 냉각 수단을 구비하는 것을 특징으로 하는 반도체 장치.7. A semiconductor device according to claim 6, wherein said first heat sink means comprises liquid cooling means. 제9항에 있어서, 상기 액체 냉각 수단은 상기 액체 냉각제를 수용하기 위해 액체 냉각 흐름 통로를 갖는 판을 구비하는 것을 특징으로 하는 반도체 장치.10. A semiconductor device according to claim 9, wherein said liquid cooling means comprises a plate having a liquid cooling flow passage for receiving said liquid coolant. 제10항에 있어서, 상기 판은 구리로 이루어지고 상기 액체 냉각제는 물인 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 10, wherein the plate is made of copper and the liquid coolant is water. 제6항에 있어서, 상기 제2열 싱크 수단은 소정의 질량을 갖는 블럭을 구비하는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 6, wherein said second heat sink means comprises a block having a predetermined mass. 제12항에 있어서, 상기 블럭은 과도 동작 주기 동안 상기 반도체 소자에 의해 발생된 열의 상당한 부분을 받아들이며, 상기 소정의 최대 접합부 온도를 상기 반도체 소자의 온도를 초과하지 않게 하는 충분한 열 용량을 갖는 것을 특징으로 하는 반도체 장치.13. The block of claim 12, wherein the block receives a substantial portion of the heat generated by the semiconductor device during a transient operation period and has sufficient heat capacity to ensure that the predetermined maximum junction temperature does not exceed the temperature of the semiconductor device. A semiconductor device. 제13항에 있어서, 상기 제1열 싱크는 공냉식 핀을 구비하는 것을 특징으로 하는 반도체 장치.The semiconductor device of claim 13, wherein the first heat sink includes an air-cooled fin. 제13항에 있어서, 상기 제1열 싱크 수단은 액체 냉각 수단을 구비하는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 13, wherein said first heat sink means comprises liquid cooling means. 제15항에 있어서, 상기 액체 냉각 수단은 액체 냉각제 흐름 통로를 갖는 판을 구비하는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 15, wherein said liquid cooling means comprises a plate having a liquid coolant flow passage. 제16항에 있어서, 상기 판은 구리로 이루어지며, 상기 액체 냉각제는 물인 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 16, wherein the plate is made of copper, and the liquid coolant is water. 제12항에 있어서, 상기 제1열 싱크는 공냉식판을 구비하는 것을 특징으로 하는 반도체 장치.13. The semiconductor device according to claim 12, wherein said first heat sink comprises an air-cooled plate. 제12항에 있어서, 상기 제1열 싱크 수단은 액체 냉각 수단을 구비하는 것을 특징으로 하는 반도체 장치.13. A semiconductor device according to claim 12, wherein said first heat sink means comprises liquid cooling means. 제19항에 있어서, 상기 액체 냉각수단은 액체 냉각제 흐름 통로를 갖는 판을 구비하는 것을 특징으로 하는 반도체 장치.20. The semiconductor device according to claim 19, wherein said liquid cooling means comprises a plate having a liquid coolant flow passage. 제20항에 있어서, 상기 판은 구리로 이루어지며, 상기 액체 냉각제는 물인 것을 특징으로 하는 반도체 장치.21. A semiconductor device according to claim 20, wherein said plate is made of copper and said liquid coolant is water. 제6항에 있어서, 상기 반도체 소자는 SCR인 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 6, wherein the semiconductor element is an SCR. 제6항에 있어서, 상기 장치는 상기 제2열 싱크 수단의 온도를 측정하는 수단을 구비하는 것을 특징으로 하는 반도체 장치.7. A semiconductor device according to claim 6, wherein said device comprises means for measuring the temperature of said second heat sink means. 제6항에 있어서, 상기 장치는 상기 제1열 싱크 수단을 상기 제1단자 수단으로부터 절연시키기 위해 상기 제1단자 수단과 상기 제1열 싱크 수단 사이에 삽입된 전기 절연 수단을 포함하는 것을 특징으로 하는 반도체 장치.7. The apparatus of claim 6, wherein the apparatus comprises electrical insulation means inserted between the first terminal means and the first heat sink means to insulate the first heat sink means from the first terminal means. Semiconductor device. 반도체 장치에 있어서, 제1디스크형 반도체 소자와, 제2디스크형 반도체 소자를 구비하며, 상기 제1및 제2반도체 소자는 각각 대향하는 폴면을 가지며, 상기 각 반도체 소자의 한 폴면과 열 및 전기 전도성 접촉 상태인 제1전도성 단자 수단과, 제2단자수 수단과, 소자 동작 동안 제1 및 제2반도체 소자내에서 발생된 열을 수용하기 위해 제1단자 수단과 열 전도성 접촉 상태인 제1열 싱크 수단과, 반도체 소자 작동 동안 제1 및 제2반도체 소자내에서 발생된 열을 수용하기 위해 상기 제1 및 제2반도체 소자의 각각의 다른 폴면과 제2단자 수단 사이에 삽입된 제2열 싱크 수단을 구비하며, 상기 제2싱크 수단은 상기 제2단자 수단과 전기적 도전 접촉 상태이며, 상기 제1 및 제2반도체 소자외 각 다른 폴면과 전기 도전성 접촉 상태이고, 상기 제2열 싱크 수단은 상기 제1 및 제2반도체 소자의 상기 다른 폴면으로부터 상기 제2단자 수단까지 전기적 통로를 제공하며, 상기 제2열 싱크 수단과 상기 제1 및 제2반도체 소자 사이를 압착시키기 위해 상기 제1 및 제2단자 수단 양단에 압착성 장착력을 인가하는 수단과, 상기 제1 및 제2싱크 수단은 상기 제1 및 제2반도체 소자에서 접합부 온도를 소자의 소정의 과도 및 정상 상태 주기동안 소정의 최대 접합부 온도로 또는 그 이하로 유지하기 위한 제1 및 제2소정의 열 용량을 가지는 것을 특징으로 하는 반도체 장치.A semiconductor device comprising: a first disk type semiconductor element and a second disk type semiconductor element, wherein the first and second semiconductor elements each have opposite pole faces, and one pole face and heat and electricity of each semiconductor element. First conductive terminal means in a conductive contact state, second terminal number means, and a first row in thermal conductive contact with the first terminal means to receive heat generated in the first and second semiconductor elements during device operation. A second heat sink inserted between the sink means and each other pole surface of the first and second semiconductor elements and the second terminal means to receive heat generated in the first and second semiconductor elements during semiconductor device operation; Means, the second sink means being in electrical conductive contact with the second terminal means, in electrically conductive contact with each other pole surface other than the first and second semiconductor elements, and the second heat sink means being Providing an electrical passage from the other pole surface of the first and second semiconductor elements to the second terminal means and for compressing between the second heat sink means and the first and second semiconductor elements. Means for applying a compressive mounting force across the terminal means, and wherein the first and second sink means set the junction temperature in the first and second semiconductor elements at a predetermined maximum junction temperature during a predetermined transient and steady state period of the element. And a first and second predetermined heat capacity for holding at or below the furnace. 제25항에 있어서, 상기 제1 및 제2반도체 소자는 정극성 및 부극성 폴면을 가지며, 상기 제1단자 수단은 상기 한 반도체의 정극성 폴면과 그리고 다른 반도체 소자의 부극성 폴면과 접촉 상태인 것을 특징으로 하는 반도체 장치.27. The semiconductor device of claim 25, wherein the first and second semiconductor elements have positive and negative pole faces, and the first terminal means is in contact with the positive pole face of the semiconductor and the negative pole face of the other semiconductor device. A semiconductor device, characterized in that. 제25항에 있어서, 상기 제1열 싱크는 상기 제1 및 제1반도체 소자와 열 및 전기적 접촉 상태인 제1 및 별도의 제2블럭을 구비하는 것을 특징으로 하는 반도체 장치.27. The semiconductor device of claim 25, wherein the first heat sink comprises first and second blocks which are in thermal and electrical contact with the first and first semiconductor elements. 제27항에 있어서, 상기 제1열 싱크 수단은 액체 냉각제를 수용하기 위한 액체 냉각제 흐름 통로를 갖는 판을 구비하는 것을 특징으로 하는 반도체 장치.28. A semiconductor device according to claim 27, wherein said first heat sink means comprises a plate having a liquid coolant flow passage for receiving a liquid coolant. 제28항에 있어서, 상기 판은 구리로 이루어지며, 상기 액체 냉각제는 물인 것을 특징으로 하는 반도체 장치.29. A semiconductor device according to claim 28, wherein said plate is made of copper and said liquid coolant is water. 반도체 장치에 있어서, 제1디스크형 반도체 소자와, 제2디스크형 반도체 장치를 구비하며, 상기 제1 및 제2반도체 소자는 각각 정 및 부극성 폴면을 가지며, 마주보는 제1 및 제2면을 갖는 제1전도성 단자 바를 구비하며, 상기 제1면은 상기 한 반도체의 전극성 폴면과 열 및 전기 도전성 상태로 접촉되어 있으며, 다른 반도체 소자의 부극성 면과 열 및 전기 도전성 접촉 상태이며 제2도전성 단자 바와, 소자 작동 동안 상기 제1 및 제2반도체 소자내에서 발생된 열을 수용하기 위해 상기 제2반도체 소자와 상기 제2단자 바 사이에 삽입된 제3열 싱크 수단을 구비하며, 상기 제3열 싱크 수단은 상기 제2단자 바와 전기적 도전 접촉 상태이며, 상기 제2반도체 소자와 전기 도전성 접촉 상태이고, 상기 제3열 싱크 수단은 상기 반도체 소자 제1폴면으로부터 상기 제2단자 바까지, 전기적 도전 통로를 제공하며, 상기 제2 및 제3열 싱크 수단과 상기 제1 및 제2반도체 소자를 압착시키기 위해 상기 제1및 제2단자 양단에서 압착성 장착력을 인가하기 위한 수단을 구비하며, 상기 제1 및 제3열 싱크 수단은 소자의 소정의 과도 및 정상 상태 주기 동안 소정의 최고 접합부 온도로 또는 그 이하로 접합부 온도를 유지하기 위한 제1, 제2 및 제3소정의 열 용량을 가지며, 상기 제1 및 제2반도체 소자는 상기 정상 상태 동작 주기 동안 보다 과도 동작 주기 동안에 더 큰 비율로 열을 발생하는 것을 특징으로 하는 반도체 장치.A semiconductor device comprising: a first disk type semiconductor element and a second disk type semiconductor device, wherein the first and second semiconductor elements each have a positive and a negative pole surface, and face opposite first and second surfaces. And a first conductive terminal bar having a first conductive terminal bar, wherein the first surface is in thermal and electrically conductive contact with an electrode pole surface of the semiconductor, and is in thermal and electrically conductive contact with a negative surface of another semiconductor element. A terminal bar, and third heat sink means inserted between the second semiconductor element and the second terminal bar to receive heat generated within the first and second semiconductor elements during device operation; The heat sink means is in an electrically conductive contact state with the second terminal bar, and is in an electrically conductive contact state with the second semiconductor element, and the third heat sink means is in the second end from the first pole surface of the semiconductor element. To the bar, an electrically conductive passageway for applying a compressive mounting force at both ends of the first and second terminals to compress the second and third heat sink means and the first and second semiconductor elements. Means, wherein the first and third heat sink means comprise first, second, and third predetermined means for maintaining the junction temperature at or below a predetermined maximum junction temperature for a predetermined transient and steady state period of the device. And the first and second semiconductor elements generate heat at a greater rate during a transient operation period than during the steady state operation period. 조절된 전력 공급 시스템에 있어서, AC 전원과, 전기 부하와, 상기 전원으로부터 상기 부하에 흐르는 전력을 조절하기 위한 반도체 회로 수단을 구비하며, 상기 회로 수단은 반도체 장치를 포함하고, 상기 반도체 장치는, 상기 소자의 제1폴면과 전기적 열적 도전 접촉 상태인 제1전도성 단자 수단과, 소자 동작 동안 반도체 소자내에서 발생된 열을 수용하기 위해 상기 제1단자 수단과 열 전도성 접촉 상태인 제1열 싱크 수단과, 소자 동작 동안 반도체 소자내에서 발생된 열을 수용하기 위해 상기 제2폴면과 상기 제2단자 수단 사이에 삽입된 제2열 싱크 수단을 구비하며, 상기 제2열 싱크 수단은 상기 제2단자 수단과 전기적 도전 접촉 상태이며 상기 제2폴면과 열적 전기적 도전 접촉 상태이고 상기 제2열 싱크 수단은 상기 제2폴면으로 부터 상기 제2단자 수단까지 전기적 도전 통로를 제공하며, 상기 제2열 싱크 수단과 상기 반도체 소자 사이를 압착하기 위해 상기 제1 및 제2단자 수단 양단에 압착성 장착력을 인가하는 수단을 구비하며, 상기 제1 및 제2열 싱크 수단은 소자 동작의 소정의 과도 및 정상 동작 상태 주기 동안 반도체 소자 접합부 온도를 소정의 최대 접합부 온도로 또는 그 이하로 유지하기 위해 각각 제1및 제2소정의 열 용량을 가지며, 상기 반도체 소자는 정상 상태 동작 주기 동안, 보다 상기 과도 동작 주기 동안 더 큰 비율로 열을 발생시키는 것을 특징으로 하는 조절된 전력 공급 시스템.A regulated power supply system, comprising: an AC power source, an electrical load, and semiconductor circuit means for regulating power flowing from the power source to the load, the circuit means including a semiconductor device, the semiconductor device comprising: First conductive terminal means in electrical thermally conductive contact with the first pole surface of the device, and first heat sink means in thermally conductive contact with the first terminal means to receive heat generated within the semiconductor device during device operation And second heat sink means inserted between the second pole surface and the second terminal means to receive heat generated in the semiconductor device during device operation, wherein the second heat sink means is connected to the second terminal. An electrical conductive contact with a means and in thermally electrically conductive contact with said second pole surface and said second heat sink means being capable of said second terminal from said second pole surface. A means for applying a compressive mounting force to both ends of said first and second terminal means for crimping between said second heat sink means and said semiconductor element, wherein said first and second The two-row sink means has first and second predetermined heat capacities, respectively, to maintain the semiconductor device junction temperature at or below a predetermined maximum junction temperature during a predetermined transient and normal operating state period of device operation, and the semiconductor And wherein the device generates heat at a greater rate during the steady state operation cycle and during the transient operation cycle. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890018635A 1988-12-29 1989-12-15 System for mounting and cooling power semiconductor device KR970006207B1 (en)

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