KR900019215A - 반도체장치 및 그의 제조방법 - Google Patents
반도체장치 및 그의 제조방법Info
- Publication number
- KR900019215A KR900019215A KR1019890007121A KR890007121A KR900019215A KR 900019215 A KR900019215 A KR 900019215A KR 1019890007121 A KR1019890007121 A KR 1019890007121A KR 890007121 A KR890007121 A KR 890007121A KR 900019215 A KR900019215 A KR 900019215A
- Authority
- KR
- South Korea
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
- H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/27—ROM only
- H10B20/40—ROM only having the source region and drain region on different levels, e.g. vertical channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/911—Light sensitive array adapted to be scanned by electron beam, e.g. vidicon device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Plasma & Fusion (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63129463A JPH07105477B2 (ja) | 1988-05-28 | 1988-05-28 | 半導体装置及びその製造方法 |
JP63-129463 | 1988-05-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900019215A true KR900019215A (ko) | 1990-12-24 |
KR930003277B1 KR930003277B1 (ko) | 1993-04-24 |
Family
ID=15010118
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890007121A KR930003277B1 (ko) | 1988-05-28 | 1989-05-27 | 반도체장치 및 그의 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (2) | US5057896A (ko) |
EP (1) | EP0348046B1 (ko) |
JP (1) | JPH07105477B2 (ko) |
KR (1) | KR930003277B1 (ko) |
DE (1) | DE68927026D1 (ko) |
Families Citing this family (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03187272A (ja) * | 1989-12-15 | 1991-08-15 | Mitsubishi Electric Corp | Mos型電界効果トランジスタ及びその製造方法 |
JPH07112067B2 (ja) * | 1990-01-24 | 1995-11-29 | 株式会社東芝 | 半導体装置 |
JPH07120800B2 (ja) * | 1990-01-25 | 1995-12-20 | 株式会社東芝 | 半導体装置およびその製造方法 |
JPH0834302B2 (ja) * | 1990-04-21 | 1996-03-29 | 株式会社東芝 | 半導体記憶装置 |
US5087581A (en) * | 1990-10-31 | 1992-02-11 | Texas Instruments Incorporated | Method of forming vertical FET device with low gate to source overlap capacitance |
EP0510604A3 (en) * | 1991-04-23 | 2001-05-09 | Canon Kabushiki Kaisha | Semiconductor device and method of manufacturing the same |
US5219793A (en) * | 1991-06-03 | 1993-06-15 | Motorola Inc. | Method for forming pitch independent contacts and a semiconductor device having the same |
KR930011125B1 (ko) * | 1991-06-11 | 1993-11-24 | 삼성전자 주식회사 | 반도체 메모리장치 |
US5398200A (en) * | 1992-03-02 | 1995-03-14 | Motorola, Inc. | Vertically formed semiconductor random access memory device |
US5229312A (en) * | 1992-04-13 | 1993-07-20 | North American Philips Corp. | Nonvolatile trench memory device and self-aligned method for making such a device |
US5324673A (en) * | 1992-11-19 | 1994-06-28 | Motorola, Inc. | Method of formation of vertical transistor |
KR0141218B1 (ko) * | 1993-11-24 | 1998-07-15 | 윤종용 | 고집적 반도체장치의 제조방법 |
KR960016773B1 (en) * | 1994-03-28 | 1996-12-20 | Samsung Electronics Co Ltd | Buried bit line and cylindrical gate cell and forming method thereof |
JPH098290A (ja) * | 1995-06-20 | 1997-01-10 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
DE19621244C2 (de) * | 1996-05-25 | 2003-08-28 | Infineon Technologies Ag | Verfahren zur Herstellung eines MOS-Transistors mit einem mesaförmigen Schichtstapel und MOS-Transistor |
US5936274A (en) * | 1997-07-08 | 1999-08-10 | Micron Technology, Inc. | High density flash memory |
US6072209A (en) * | 1997-07-08 | 2000-06-06 | Micro Technology, Inc. | Four F2 folded bit line DRAM cell structure having buried bit and word lines |
US5909618A (en) | 1997-07-08 | 1999-06-01 | Micron Technology, Inc. | Method of making memory cell with vertical transistor and buried word and body lines |
US6150687A (en) | 1997-07-08 | 2000-11-21 | Micron Technology, Inc. | Memory cell having a vertical transistor with buried source/drain and dual gates |
US5973356A (en) | 1997-07-08 | 1999-10-26 | Micron Technology, Inc. | Ultra high density flash memory |
US6191470B1 (en) | 1997-07-08 | 2001-02-20 | Micron Technology, Inc. | Semiconductor-on-insulator memory cell with buried word and body lines |
US6066869A (en) | 1997-10-06 | 2000-05-23 | Micron Technology, Inc. | Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor |
US5907170A (en) | 1997-10-06 | 1999-05-25 | Micron Technology, Inc. | Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor |
US6528837B2 (en) | 1997-10-06 | 2003-03-04 | Micron Technology, Inc. | Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor |
US5914511A (en) * | 1997-10-06 | 1999-06-22 | Micron Technology, Inc. | Circuit and method for a folded bit line memory using trench plate capacitor cells with body bias contacts |
US6025225A (en) | 1998-01-22 | 2000-02-15 | Micron Technology, Inc. | Circuits with a trench capacitor having micro-roughened semiconductor surfaces and methods for forming the same |
US6246083B1 (en) | 1998-02-24 | 2001-06-12 | Micron Technology, Inc. | Vertical gain cell and array for a dynamic random access memory |
US6304483B1 (en) | 1998-02-24 | 2001-10-16 | Micron Technology, Inc. | Circuits and methods for a static random access memory using vertical transistors |
US5963469A (en) | 1998-02-24 | 1999-10-05 | Micron Technology, Inc. | Vertical bipolar read access for low voltage memory cell |
US6124729A (en) * | 1998-02-27 | 2000-09-26 | Micron Technology, Inc. | Field programmable logic arrays with vertical transistors |
US5991225A (en) * | 1998-02-27 | 1999-11-23 | Micron Technology, Inc. | Programmable memory address decode array with vertical transistors |
US6043527A (en) | 1998-04-14 | 2000-03-28 | Micron Technology, Inc. | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device |
US6169006B1 (en) * | 1998-07-29 | 2001-01-02 | Advanced Micro Devices, Inc. | Semiconductor device having grown oxide spacers and method of manufacture thereof |
US6208164B1 (en) | 1998-08-04 | 2001-03-27 | Micron Technology, Inc. | Programmable logic array with vertical transistors |
US6134175A (en) * | 1998-08-04 | 2000-10-17 | Micron Technology, Inc. | Memory address decode array with vertical transistors |
US6104068A (en) * | 1998-09-01 | 2000-08-15 | Micron Technology, Inc. | Structure and method for improved signal processing |
US6320222B1 (en) | 1998-09-01 | 2001-11-20 | Micron Technology, Inc. | Structure and method for reducing threshold voltage variations due to dopant fluctuations |
DE10013577A1 (de) | 2000-03-18 | 2001-09-20 | Wolff Walsrode Ag | Verwendung von Polysacchariden oder Polysaccharidderivaten, die nach Vergelung und Heiß-Dampf-Mahltrocknung mittels Gas- oder Wasserdampftrocknung hergestellt wurden, in Baustoffgemischen |
US6424001B1 (en) * | 2001-02-09 | 2002-07-23 | Micron Technology, Inc. | Flash memory with ultra thin vertical body transistors |
US6559491B2 (en) * | 2001-02-09 | 2003-05-06 | Micron Technology, Inc. | Folded bit line DRAM with ultra thin body transistors |
US6566682B2 (en) * | 2001-02-09 | 2003-05-20 | Micron Technology, Inc. | Programmable memory address and decode circuits with ultra thin vertical body transistors |
US6496034B2 (en) * | 2001-02-09 | 2002-12-17 | Micron Technology, Inc. | Programmable logic arrays with ultra thin body transistors |
US6531727B2 (en) | 2001-02-09 | 2003-03-11 | Micron Technology, Inc. | Open bit line DRAM with ultra thin body transistors |
US7160577B2 (en) | 2002-05-02 | 2007-01-09 | Micron Technology, Inc. | Methods for atomic-layer deposition of aluminum oxides in integrated circuits |
US7927948B2 (en) | 2005-07-20 | 2011-04-19 | Micron Technology, Inc. | Devices with nanocrystals and methods of formation |
KR100946084B1 (ko) * | 2008-03-27 | 2010-03-10 | 주식회사 하이닉스반도체 | 반도체 소자의 수직형 트랜지스터 및 그 형성방법 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4654680A (en) * | 1980-09-24 | 1987-03-31 | Semiconductor Energy Laboratory Co., Ltd. | Sidewall gate IGFET |
JPS5919366A (ja) * | 1982-07-23 | 1984-01-31 | Hitachi Ltd | 半導体記憶装置 |
JPS59182558A (ja) * | 1983-04-01 | 1984-10-17 | Hitachi Ltd | 半導体記憶装置 |
JPS6042866A (ja) * | 1983-08-19 | 1985-03-07 | Toshiba Corp | 半導体装置及びその製造方法 |
KR920010461B1 (ko) * | 1983-09-28 | 1992-11-28 | 가부시끼가이샤 히다찌세이사꾸쇼 | 반도체 메모리와 그 제조 방법 |
JPS6074638A (ja) * | 1983-09-30 | 1985-04-26 | Toshiba Corp | 半導体装置の製造方法 |
US4737829A (en) * | 1985-03-28 | 1988-04-12 | Nec Corporation | Dynamic random access memory device having a plurality of one-transistor type memory cells |
JPH0682800B2 (ja) * | 1985-04-16 | 1994-10-19 | 株式会社東芝 | 半導体記憶装置 |
JPH0793372B2 (ja) * | 1985-12-16 | 1995-10-09 | 株式会社東芝 | 半導体記憶装置 |
JPS62244164A (ja) * | 1986-04-16 | 1987-10-24 | Sony Corp | 半導体メモリ装置 |
US4947225A (en) * | 1986-04-28 | 1990-08-07 | Rockwell International Corporation | Sub-micron devices with method for forming sub-micron contacts |
US4769786A (en) * | 1986-07-15 | 1988-09-06 | International Business Machines Corporation | Two square memory cells |
FR2603128B1 (fr) * | 1986-08-21 | 1988-11-10 | Commissariat Energie Atomique | Cellule de memoire eprom et son procede de fabrication |
JPS63155660A (ja) * | 1986-12-19 | 1988-06-28 | Fujitsu Ltd | 半導体装置 |
JPS63211750A (ja) * | 1987-02-27 | 1988-09-02 | Mitsubishi Electric Corp | 半導体記憶装置 |
EP0333426B1 (en) * | 1988-03-15 | 1996-07-10 | Kabushiki Kaisha Toshiba | Dynamic RAM |
-
1988
- 1988-05-28 JP JP63129463A patent/JPH07105477B2/ja not_active Expired - Lifetime
-
1989
- 1989-05-26 EP EP89305353A patent/EP0348046B1/en not_active Expired - Lifetime
- 1989-05-26 DE DE68927026T patent/DE68927026D1/de not_active Expired - Lifetime
- 1989-05-27 KR KR1019890007121A patent/KR930003277B1/ko not_active IP Right Cessation
- 1989-05-30 US US07/357,809 patent/US5057896A/en not_active Expired - Lifetime
-
1993
- 1993-06-04 US US08/072,876 patent/US5372964A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR930003277B1 (ko) | 1993-04-24 |
EP0348046B1 (en) | 1996-08-28 |
US5372964A (en) | 1994-12-13 |
US5057896A (en) | 1991-10-15 |
EP0348046A3 (en) | 1991-09-11 |
JPH07105477B2 (ja) | 1995-11-13 |
JPH01300566A (ja) | 1989-12-05 |
EP0348046A2 (en) | 1989-12-27 |
DE68927026D1 (de) | 1996-10-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20040323 Year of fee payment: 12 |
|
LAPS | Lapse due to unpaid annual fee |